1; This is a basic test of the alloca instruction and a call. 2 3; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 5; RUN: | %if --need=target_X8632 --command FileCheck %s 6 7; RUN: %if --need=target_MIPS32 --need=allow_dump \ 8; RUN: --command %p2i --filetype=asm --assemble --disassemble --target \ 9; RUN: mips32 -i %s --args -O2 -allow-externally-defined-symbols \ 10; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 11; RUN: --command FileCheck --check-prefix MIPS32 %s 12 13declare void @copy(i32 %arg1, i8* %arr1, i8* %arr2, i8* %arr3, i8* %arr4); 14 15; Test that alloca base addresses get passed correctly to functions. 16define internal void @caller1(i32 %arg) { 17entry: 18 %a1 = alloca i8, i32 32, align 4 19 %p1 = bitcast i8* %a1 to i32* 20 store i32 %arg, i32* %p1, align 1 21 call void @copy(i32 %arg, i8* %a1, i8* %a1, i8* %a1, i8* %a1) 22 ret void 23} 24 25; CHECK-LABEL: caller1 26; CHECK-NEXT: sub esp,0x4c 27; CHECK-NEXT: mov eax,DWORD PTR [esp+0x50] 28; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax 29; CHECK-NEXT: mov DWORD PTR [esp],eax 30; CHECK-NEXT: lea eax,[esp+0x20] 31; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax 32; CHECK-NEXT: lea eax,[esp+0x20] 33; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax 34; CHECK-NEXT: lea eax,[esp+0x20] 35; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax 36; CHECK-NEXT: lea eax,[esp+0x20] 37; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax 38; CHECK-NEXT: call 39; CHECK-NEXT: add esp,0x4c 40; CHECK-NEXT: ret 41; MIPS32-LABEL: caller1 42; MIPS32: addiu sp,sp,{{.*}} 43; MIPS32: sw ra,{{.*}}(sp) 44; MIPS32: move v0,a0 45; MIPS32: sw v0,{{.*}}(sp) 46; MIPS32: addiu v0,sp,32 47; MIPS32: sw v0,{{.*}}(sp) 48; MIPS32: addiu a1,sp,32 49; MIPS32: addiu a2,sp,32 50; MIPS32: addiu a3,sp,32 51; MIPS32: jal 52; MIPS32: nop 53; MIPS32: lw ra,{{.*}}(sp) 54; MIPS32: addiu sp,sp,{{.*}} 55; MIPS32: jr ra 56 57; Test that alloca base addresses get passed correctly to functions. 58define internal void @caller2(i32 %arg) { 59entry: 60 %a1 = alloca i8, i32 32, align 4 61 %a2 = alloca i8, i32 32, align 4 62 %p1 = bitcast i8* %a1 to i32* 63 %p2 = bitcast i8* %a2 to i32* 64 store i32 %arg, i32* %p1, align 1 65 store i32 %arg, i32* %p2, align 1 66 call void @copy(i32 %arg, i8* %a1, i8* %a2, i8* %a1, i8* %a2) 67 ret void 68} 69 70; CHECK-LABEL: caller2 71; CHECK-NEXT: sub esp,0x6c 72; CHECK-NEXT: mov eax,DWORD PTR [esp+0x70] 73; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax 74; CHECK-NEXT: mov DWORD PTR [esp+0x40],eax 75; CHECK-NEXT: mov DWORD PTR [esp],eax 76; CHECK-NEXT: lea eax,[esp+0x20] 77; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax 78; CHECK-NEXT: lea eax,[esp+0x40] 79; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax 80; CHECK-NEXT: lea eax,[esp+0x20] 81; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax 82; CHECK-NEXT: lea eax,[esp+0x40] 83; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax 84; CHECK-NEXT: call 85; CHECK-NEXT: add esp,0x6c 86; CHECK-NEXT: ret 87; MIPS32-LABEL: caller2 88; MIPS32: addiu sp,sp,{{.*}} 89; MIPS32: sw ra,{{.*}}(sp) 90; MIPS32: move v0,a0 91; MIPS32: sw v0,{{.*}}(sp) 92; MIPS32: move v0,a0 93; MIPS32: sw v0,{{.*}}(sp) 94; MIPS32: addiu v0,sp,64 95; MIPS32: sw v0,{{.*}}(sp) 96; MIPS32: addiu a1,sp,32 97; MIPS32: addiu a2,sp,64 98; MIPS32: addiu a3,sp,32 99; MIPS32: jal 100; MIPS32: nop 101; MIPS32: lw ra,{{.*}}(sp) 102; MIPS32: addiu sp,sp,{{.*}} 103; MIPS32: jr ra 104