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1 /* ----------------------------------------------------------------------- *
2  *
3  *   Pportions of this file taken from the dmidecode project
4  *
5  *   Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
6  *   Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
7  *
8  *   This program is free software; you can redistribute it and/or modify
9  *   it under the terms of the GNU General Public License as published by
10  *   the Free Software Foundation; either version 2 of the License, or
11  *   (at your option) any later version.
12  *
13  *   This program is distributed in the hope that it will be useful,
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *   GNU General Public License for more details.
17  *
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21  *
22  *   For the avoidance of doubt the "preferred form" of this code is one which
23  *   is in an open unpatent encumbered format. Where cryptographic key signing
24  *   forms part of the process of creating an executable the information
25  *   including keys needed to generate an equivalently functional executable
26  *   are deemed to be part of the source code.
27 */
28 
29 #include <dmi/dmi.h>
30 #include <stdio.h>
31 
dmi_processor_type(uint8_t code)32 const char *dmi_processor_type(uint8_t code)
33 {
34     /* 3.3.5.1 */
35     static const char *type[] = {
36 	"Other",		/* 0x01 */
37 	"Unknown",
38 	"Central Processor",
39 	"Math Processor",
40 	"DSP Processor",
41 	"Video Processor"	/* 0x06 */
42     };
43 
44     if (code >= 0x01 && code <= 0x06)
45 	return type[code - 0x01];
46     return out_of_spec;
47 }
48 
dmi_processor_family(uint8_t code,char * manufacturer)49 const char *dmi_processor_family(uint8_t code, char *manufacturer)
50 {
51     /* 3.3.5.2 */
52     /* TODO : Need to implement code/value (see dmidecode) insteed of array to address large index */
53     static const char *family[256] = {
54 	NULL,			/* 0x00 */
55 	"Other",
56 	"Unknown",
57 	"8086",
58 	"80286",
59 	"80386",
60 	"80486",
61 	"8087",
62 	"80287",
63 	"80387",
64 	"80487",
65 	"Pentium",
66 	"Pentium Pro",
67 	"Pentium II",
68 	"Pentium MMX",
69 	"Celeron",
70 	"Pentium II Xeon",
71 	"Pentium III",
72 	"M1",
73 	"M2",
74 	"Celeron M",		/* 0x14 */
75 	"Pentium 4 HT",
76 	NULL,
77 	NULL,			/* 0x17 */
78 	"Duron",
79 	"K5",
80 	"K6",
81 	"K6-2",
82 	"K6-3",
83 	"Athlon",
84 	"AMD2900",
85 	"K6-2+",
86 	"Power PC",
87 	"Power PC 601",
88 	"Power PC 603",
89 	"Power PC 603+",
90 	"Power PC 604",
91 	"Power PC 620",
92 	"Power PC x704",
93 	"Power PC 750",
94 	"Core 2 Duo",		/* 0x28 */
95 	"Core 2 Duo Mobile",
96 	"Core Solo Mobile",
97 	"Atom",
98 	NULL,
99 	NULL,
100 	NULL,
101 	NULL,			/* 0x2F */
102 	"Alpha",
103 	"Alpha 21064",
104 	"Alpha 21066",
105 	"Alpha 21164",
106 	"Alpha 21164PC",
107 	"Alpha 21164a",
108 	"Alpha 21264",
109 	"Alpha 21364",
110 	NULL,			/* 0x38 */
111 	NULL,
112 	NULL,
113 	NULL,
114 	NULL,
115 	NULL,
116 	NULL,
117 	NULL,			/* 0x3F */
118 	"MIPS",
119 	"MIPS R4000",
120 	"MIPS R4200",
121 	"MIPS R4400",
122 	"MIPS R4600",
123 	"MIPS R10000",
124 	NULL,			/* 0x46 */
125 	NULL,
126 	NULL,
127 	NULL,
128 	NULL,
129 	NULL,
130 	NULL,
131 	NULL,
132 	NULL,
133 	NULL,			/* 0x4F */
134 	"SPARC",
135 	"SuperSPARC",
136 	"MicroSPARC II",
137 	"MicroSPARC IIep",
138 	"UltraSPARC",
139 	"UltraSPARC II",
140 	"UltraSPARC IIi",
141 	"UltraSPARC III",
142 	"UltraSPARC IIIi",
143 	NULL,			/* 0x59 */
144 	NULL,
145 	NULL,
146 	NULL,
147 	NULL,
148 	NULL,
149 	NULL,			/* 0x5F */
150 	"68040",
151 	"68xxx",
152 	"68000",
153 	"68010",
154 	"68020",
155 	"68030",
156 	NULL,			/* 0x66 */
157 	NULL,
158 	NULL,
159 	NULL,
160 	NULL,
161 	NULL,
162 	NULL,
163 	NULL,
164 	NULL,
165 	NULL,			/* 0x6F */
166 	"Hobbit",
167 	NULL,			/* 0x71 */
168 	NULL,
169 	NULL,
170 	NULL,
171 	NULL,
172 	NULL,
173 	NULL,			/* 0x77 */
174 	"Crusoe TM5000",
175 	"Crusoe TM3000",
176 	"Efficeon TM8000",
177 	NULL,			/* 0x7B */
178 	NULL,
179 	NULL,
180 	NULL,
181 	NULL,			/* 0x7F */
182 	"Weitek",
183 	NULL,			/* 0x81 */
184 	"Itanium",
185 	"Athlon 64",
186 	"Opteron",
187 	"Sempron",
188 	"Turion 64",		/* 0x86 */
189 	"Dual-Core Opteron",
190 	"Atlhon 64 X2",
191 	"Turion 64 X2",
192 	"Quad-Core Opteron",
193 	"Third-Generation Opteron",
194 	"Phenom FX",
195 	"Phenom X4",
196 	"Phenom X2",
197 	"Athlon X2",		/* 0x8F */
198 	"PA-RISC",
199 	"PA-RISC 8500",
200 	"PA-RISC 8000",
201 	"PA-RISC 7300LC",
202 	"PA-RISC 7200",
203 	"PA-RISC 7100LC",
204 	"PA-RISC 7100",
205 	NULL,			/* 0x97 */
206 	NULL,
207 	NULL,
208 	NULL,
209 	NULL,
210 	NULL,
211 	NULL,
212 	NULL,
213 	NULL,			/* 0x9F */
214 	"V30",
215 	"Quad-Core Xeon 3200",	/* 0xA1 */
216 	"Dual-Core Xeon 3000",
217 	"Quad-Core Xeon 5300",
218 	"Dual-Core Xeon 5100",
219 	"Dual-Core Xeon 5000",
220 	"Dual-Core Xeon LV",
221 	"Dual-Core Xeon ULV",
222 	"Dual-Core Xeon 7100",
223 	"Quad-Core Xeon 5400",
224 	"Quad-Core Xeon",	/* 0xAA */
225 	"Dual-Core Xeon 5200",
226 	"Dual-Core Xeon 7200",
227 	"Quad-Core Xeon 7300",
228 	"Quad-Core Xeon 7400",
229 	"Multi-Core Xeon 7400",			/* 0xAF */
230 	"Pentium III Xeon",
231 	"Pentium III Speedstep",
232 	"Pentium 4",
233 	"Xeon",
234 	"AS400",
235 	"Xeon MP",
236 	"Athlon XP",
237 	"Athlon MP",
238 	"Itanium 2",
239 	"Pentium M",
240 	"Celeron D",		/* 0xBA */
241 	"Pentium D",
242 	"Pentium EE",
243 	"Core Solo",		/* 0xBD */
244 	NULL,
245 	"Core 2 Duo",
246 	"Core 2 Solo",
247 	"Core 2 Extreme",
248 	"Core 2 Quad",
249 	"Core 2 Extreme Mobile",
250 	"Core 2 Duo Mobile",
251 	"Core 2 Solo Mobile",
252 	"Core i7",
253 	"Dual-Core Celeron",		/* 0xC7 */
254 	"IBM390",
255 	"G4",
256 	"G5",
257 	"ESA/390 G6",		/* 0xCB */
258 	"z/Architectur",
259 	NULL,
260 	NULL,
261 	NULL,
262 	NULL,			/*0xD0 */
263 	NULL,
264 	"C7-M",
265 	"C7-D",
266 	"C7",
267 	"Eden",
268 	"Multi-Core Xeon",			/*0xD6 */
269 	"Dual-Core Xeon 3xxx",
270 	"Quad-Core Xeon 3xxx",  /*0xD8 */
271 	NULL,
272 	"Dual-Core Xeon 5xxx", /*0xDA */
273 	"Quad-Core Xeon 5xxx",
274 	NULL,
275 	"Dual-Core Xeon 7xxx", /*0xDD */
276 	"Quad-Core Xeon 7xxx",
277 	"Multi-Core Xeon 7xxx",
278 	NULL,			/*0xE0 */
279 	NULL,
280 	NULL,
281 	NULL,
282 	NULL,
283 	NULL,
284 	"Embedded Opteron Quad-Core",	/* 0xE6 */
285 	"Phenom Triple-Core",
286 	"Turion Ultra Dual-Core Mobile",
287 	"Turion Dual-Core Mobile",
288 	"Athlon Dual-Core",
289 	"Sempron SI",		/*0xEB */
290 	NULL,
291 	NULL,
292 	NULL,
293 	NULL,
294 	NULL,
295 	NULL,
296 	NULL,
297 	NULL,
298 	NULL,
299 	NULL,
300 	NULL,
301 	NULL,
302 	NULL,
303 	NULL,			/* 0xF9 */
304 	"i860",
305 	"i960",
306 	NULL,			/* 0xFC */
307 	NULL,
308 	NULL,
309 	NULL,			/* 0xFF */
310     };
311     /* Special case for ambiguous value 0xBE */
312     if (code == 0xBE) {
313 	/* Best bet based on manufacturer string */
314 	if (strstr(manufacturer, "Intel") != NULL
315 	    || strncasecmp(manufacturer, "Intel", 5) == 0)
316 	    return "Core 2";
317 	if (strstr(manufacturer, "AMD") != NULL
318 	    || strncasecmp(manufacturer, "AMD", 3) == 0)
319 	    return "K7";
320 	return "Core 2 or K7";
321     }
322 
323     if (family[code] != NULL) {
324 	return family[code];
325     }
326     return out_of_spec;
327 }
328 
dmi_processor_status(uint8_t code)329 const char *dmi_processor_status(uint8_t code)
330 {
331     static const char *status[] = {
332 	"Unknown",		/* 0x00 */
333 	"Enabled",
334 	"Disabled By User",
335 	"Disabled By BIOS",
336 	"Idle",			/* 0x04 */
337 	"<OUT OF SPEC>",
338 	"<OUT OF SPEC>",
339 	"Other"			/* 0x07 */
340     };
341 
342     if (code <= 0x04)
343 	return status[code];
344     if (code == 0x07)
345 	return status[0x05];
346     return out_of_spec;
347 }
348 
dmi_processor_upgrade(uint8_t code)349 const char *dmi_processor_upgrade(uint8_t code)
350 {
351     /* 3.3.5.5 */
352     static const char *upgrade[] = {
353 	"Other",		/* 0x01 */
354 	"Unknown",
355 	"Daughter Board",
356 	"ZIF Socket",
357 	"Replaceable Piggy Back",
358 	"None",
359 	"LIF Socket",
360 	"Slot 1",
361 	"Slot 2",
362 	"370-pin Socket",
363 	"Slot A",
364 	"Slot M",
365 	"Socket 423",
366 	"Socket A (Socket 462)",
367 	"Socket 478",
368 	"Socket 754",
369 	"Socket 940",
370 	"Socket 939"		/* 0x12 */
371 	"Socket mPGA604",
372 	"Socket LGA771",
373 	"Socket LGA775",
374 	"Socket S1",
375 	"Socket AM2",
376 	"Socket F (1207)"
377 	"Socket LGA1366"	/* 0x19 */
378     };
379 
380     if (code >= 0x01 && code <= 0x19)
381 	return upgrade[code - 0x01];
382     return out_of_spec;
383 }
384 
dmi_processor_cache(uint16_t code,const char * level,uint16_t ver,char * cache)385 void dmi_processor_cache(uint16_t code, const char *level, uint16_t ver,
386 			 char *cache)
387 {
388     if (code == 0xFFFF) {
389 	if (ver >= 0x0203)
390 	    sprintf(cache, "Not Provided");
391 	else
392 	    sprintf(cache, "No %s Cache", level);
393     } else
394 	sprintf(cache, "0x%04X", code);
395 }
396 
397 /* Intel AP-485 revision 28, table 5 */
398 const char *cpu_flags_strings[PROCESSOR_FLAGS_ELEMENTS] = {
399     "FPU (Floating-point unit on-chip)",	/* 0 */
400     "VME (Virtual mode extension)",
401     "DE (Debugging extension)",
402     "PSE (Page size extension)",
403     "TSC (Time stamp counter)",
404     "MSR (Model specific registers)",
405     "PAE (Physical address extension)",
406     "MCE (Machine check exception)",
407     "CX8 (CMPXCHG8 instruction supported)",
408     "APIC (On-chip APIC hardware supported)",
409     NULL,			/* 10 */
410     "SEP (Fast system call)",
411     "MTRR (Memory type range registers)",
412     "PGE (Page global enable)",
413     "MCA (Machine check architecture)",
414     "CMOV (Conditional move instruction supported)",
415     "PAT (Page attribute table)",
416     "PSE-36 (36-bit page size extension)",
417     "PSN (Processor serial number present and enabled)",
418     "CLFSH (CLFLUSH instruction supported)",
419     NULL,			/* 20 */
420     "DS (Debug store)",
421     "ACPI (ACPI supported)",
422     "MMX (MMX technology supported)",
423     "FXSR (Fast floating-point save and restore)",
424     "SSE (Streaming SIMD extensions)",
425     "SSE2 (Streaming SIMD extensions 2)",
426     "SS (Self-snoop)",
427     "HTT (Hyper-threading technology)",
428     "TM (Thermal monitor supported)",
429     "IA64 (IA64 capabilities)",	/* 30 */
430     "PBE (Pending break enabled)"	/* 31 */
431 };
432