1 // Copyright 2016, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 // * Redistributions of source code must retain the above copyright notice,
8 // this list of conditions and the following disclaimer.
9 // * Redistributions in binary form must reproduce the above copyright notice,
10 // this list of conditions and the following disclaimer in the documentation
11 // and/or other materials provided with the distribution.
12 // * Neither the name of ARM Limited nor the names of its contributors may be
13 // used to endorse or promote products derived from this software without
14 // specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28 // -----------------------------------------------------------------------------
29 // This file is auto generated from the
30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using
31 // tools/generate_tests.py.
32 //
33 // PLEASE DO NOT EDIT.
34 // -----------------------------------------------------------------------------
35
36
37 #include "test-runner.h"
38
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
41
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
44
45 #define BUF_SIZE (4096)
46
47 namespace vixl {
48 namespace aarch32 {
49
50 // List of instruction mnemonics.
51 #define FOREACH_INSTRUCTION(M) \
52 M(add) \
53 M(sub)
54
55
56 // The following definitions are defined again in each generated test, therefore
57 // we need to place them in an anomymous namespace. It expresses that they are
58 // local to this file only, and the compiler is not allowed to share these types
59 // across test files during template instantiation. Specifically, `Operands` has
60 // various layouts across generated tests so it absolutely cannot be shared.
61
62 #ifdef VIXL_INCLUDE_TARGET_T32
63 namespace {
64
65 // Values to be passed to the assembler to produce the instruction under test.
66 struct Operands {
67 Condition cond;
68 Register rd;
69 Register rn;
70 uint32_t immediate;
71 };
72
73 // This structure contains all data needed to test one specific
74 // instruction.
75 struct TestData {
76 // The `operands` field represents what to pass to the assembler to
77 // produce the instruction.
78 Operands operands;
79 // True if we need to generate an IT instruction for this test to be valid.
80 bool in_it_block;
81 // The condition to give the IT instruction, this will be set to "al" by
82 // default.
83 Condition it_condition;
84 // Description of the operands, used for error reporting.
85 const char* operands_description;
86 // Unique identifier, used for generating traces.
87 const char* identifier;
88 };
89
90 struct TestResult {
91 size_t size;
92 const byte* encoding;
93 };
94
95 // Each element of this array produce one instruction encoding.
96 const TestData kTests[] =
97 {{{al, sp, sp, 0x0}, false, al, "al sp sp 0x0", "al_sp_sp_0x0"},
98 {{al, sp, sp, 0x4}, false, al, "al sp sp 0x4", "al_sp_sp_0x4"},
99 {{al, sp, sp, 0x8}, false, al, "al sp sp 0x8", "al_sp_sp_0x8"},
100 {{al, sp, sp, 0xc}, false, al, "al sp sp 0xc", "al_sp_sp_0xc"},
101 {{al, sp, sp, 0x10}, false, al, "al sp sp 0x10", "al_sp_sp_0x10"},
102 {{al, sp, sp, 0x14}, false, al, "al sp sp 0x14", "al_sp_sp_0x14"},
103 {{al, sp, sp, 0x18}, false, al, "al sp sp 0x18", "al_sp_sp_0x18"},
104 {{al, sp, sp, 0x1c}, false, al, "al sp sp 0x1c", "al_sp_sp_0x1c"},
105 {{al, sp, sp, 0x20}, false, al, "al sp sp 0x20", "al_sp_sp_0x20"},
106 {{al, sp, sp, 0x24}, false, al, "al sp sp 0x24", "al_sp_sp_0x24"},
107 {{al, sp, sp, 0x28}, false, al, "al sp sp 0x28", "al_sp_sp_0x28"},
108 {{al, sp, sp, 0x2c}, false, al, "al sp sp 0x2c", "al_sp_sp_0x2c"},
109 {{al, sp, sp, 0x30}, false, al, "al sp sp 0x30", "al_sp_sp_0x30"},
110 {{al, sp, sp, 0x34}, false, al, "al sp sp 0x34", "al_sp_sp_0x34"},
111 {{al, sp, sp, 0x38}, false, al, "al sp sp 0x38", "al_sp_sp_0x38"},
112 {{al, sp, sp, 0x3c}, false, al, "al sp sp 0x3c", "al_sp_sp_0x3c"},
113 {{al, sp, sp, 0x40}, false, al, "al sp sp 0x40", "al_sp_sp_0x40"},
114 {{al, sp, sp, 0x44}, false, al, "al sp sp 0x44", "al_sp_sp_0x44"},
115 {{al, sp, sp, 0x48}, false, al, "al sp sp 0x48", "al_sp_sp_0x48"},
116 {{al, sp, sp, 0x4c}, false, al, "al sp sp 0x4c", "al_sp_sp_0x4c"},
117 {{al, sp, sp, 0x50}, false, al, "al sp sp 0x50", "al_sp_sp_0x50"},
118 {{al, sp, sp, 0x54}, false, al, "al sp sp 0x54", "al_sp_sp_0x54"},
119 {{al, sp, sp, 0x58}, false, al, "al sp sp 0x58", "al_sp_sp_0x58"},
120 {{al, sp, sp, 0x5c}, false, al, "al sp sp 0x5c", "al_sp_sp_0x5c"},
121 {{al, sp, sp, 0x60}, false, al, "al sp sp 0x60", "al_sp_sp_0x60"},
122 {{al, sp, sp, 0x64}, false, al, "al sp sp 0x64", "al_sp_sp_0x64"},
123 {{al, sp, sp, 0x68}, false, al, "al sp sp 0x68", "al_sp_sp_0x68"},
124 {{al, sp, sp, 0x6c}, false, al, "al sp sp 0x6c", "al_sp_sp_0x6c"},
125 {{al, sp, sp, 0x70}, false, al, "al sp sp 0x70", "al_sp_sp_0x70"},
126 {{al, sp, sp, 0x74}, false, al, "al sp sp 0x74", "al_sp_sp_0x74"},
127 {{al, sp, sp, 0x78}, false, al, "al sp sp 0x78", "al_sp_sp_0x78"},
128 {{al, sp, sp, 0x7c}, false, al, "al sp sp 0x7c", "al_sp_sp_0x7c"},
129 {{al, sp, sp, 0x80}, false, al, "al sp sp 0x80", "al_sp_sp_0x80"},
130 {{al, sp, sp, 0x84}, false, al, "al sp sp 0x84", "al_sp_sp_0x84"},
131 {{al, sp, sp, 0x88}, false, al, "al sp sp 0x88", "al_sp_sp_0x88"},
132 {{al, sp, sp, 0x8c}, false, al, "al sp sp 0x8c", "al_sp_sp_0x8c"},
133 {{al, sp, sp, 0x90}, false, al, "al sp sp 0x90", "al_sp_sp_0x90"},
134 {{al, sp, sp, 0x94}, false, al, "al sp sp 0x94", "al_sp_sp_0x94"},
135 {{al, sp, sp, 0x98}, false, al, "al sp sp 0x98", "al_sp_sp_0x98"},
136 {{al, sp, sp, 0x9c}, false, al, "al sp sp 0x9c", "al_sp_sp_0x9c"},
137 {{al, sp, sp, 0xa0}, false, al, "al sp sp 0xa0", "al_sp_sp_0xa0"},
138 {{al, sp, sp, 0xa4}, false, al, "al sp sp 0xa4", "al_sp_sp_0xa4"},
139 {{al, sp, sp, 0xa8}, false, al, "al sp sp 0xa8", "al_sp_sp_0xa8"},
140 {{al, sp, sp, 0xac}, false, al, "al sp sp 0xac", "al_sp_sp_0xac"},
141 {{al, sp, sp, 0xb0}, false, al, "al sp sp 0xb0", "al_sp_sp_0xb0"},
142 {{al, sp, sp, 0xb4}, false, al, "al sp sp 0xb4", "al_sp_sp_0xb4"},
143 {{al, sp, sp, 0xb8}, false, al, "al sp sp 0xb8", "al_sp_sp_0xb8"},
144 {{al, sp, sp, 0xbc}, false, al, "al sp sp 0xbc", "al_sp_sp_0xbc"},
145 {{al, sp, sp, 0xc0}, false, al, "al sp sp 0xc0", "al_sp_sp_0xc0"},
146 {{al, sp, sp, 0xc4}, false, al, "al sp sp 0xc4", "al_sp_sp_0xc4"},
147 {{al, sp, sp, 0xc8}, false, al, "al sp sp 0xc8", "al_sp_sp_0xc8"},
148 {{al, sp, sp, 0xcc}, false, al, "al sp sp 0xcc", "al_sp_sp_0xcc"},
149 {{al, sp, sp, 0xd0}, false, al, "al sp sp 0xd0", "al_sp_sp_0xd0"},
150 {{al, sp, sp, 0xd4}, false, al, "al sp sp 0xd4", "al_sp_sp_0xd4"},
151 {{al, sp, sp, 0xd8}, false, al, "al sp sp 0xd8", "al_sp_sp_0xd8"},
152 {{al, sp, sp, 0xdc}, false, al, "al sp sp 0xdc", "al_sp_sp_0xdc"},
153 {{al, sp, sp, 0xe0}, false, al, "al sp sp 0xe0", "al_sp_sp_0xe0"},
154 {{al, sp, sp, 0xe4}, false, al, "al sp sp 0xe4", "al_sp_sp_0xe4"},
155 {{al, sp, sp, 0xe8}, false, al, "al sp sp 0xe8", "al_sp_sp_0xe8"},
156 {{al, sp, sp, 0xec}, false, al, "al sp sp 0xec", "al_sp_sp_0xec"},
157 {{al, sp, sp, 0xf0}, false, al, "al sp sp 0xf0", "al_sp_sp_0xf0"},
158 {{al, sp, sp, 0xf4}, false, al, "al sp sp 0xf4", "al_sp_sp_0xf4"},
159 {{al, sp, sp, 0xf8}, false, al, "al sp sp 0xf8", "al_sp_sp_0xf8"},
160 {{al, sp, sp, 0xfc}, false, al, "al sp sp 0xfc", "al_sp_sp_0xfc"},
161 {{al, sp, sp, 0x100}, false, al, "al sp sp 0x100", "al_sp_sp_0x100"},
162 {{al, sp, sp, 0x104}, false, al, "al sp sp 0x104", "al_sp_sp_0x104"},
163 {{al, sp, sp, 0x108}, false, al, "al sp sp 0x108", "al_sp_sp_0x108"},
164 {{al, sp, sp, 0x10c}, false, al, "al sp sp 0x10c", "al_sp_sp_0x10c"},
165 {{al, sp, sp, 0x110}, false, al, "al sp sp 0x110", "al_sp_sp_0x110"},
166 {{al, sp, sp, 0x114}, false, al, "al sp sp 0x114", "al_sp_sp_0x114"},
167 {{al, sp, sp, 0x118}, false, al, "al sp sp 0x118", "al_sp_sp_0x118"},
168 {{al, sp, sp, 0x11c}, false, al, "al sp sp 0x11c", "al_sp_sp_0x11c"},
169 {{al, sp, sp, 0x120}, false, al, "al sp sp 0x120", "al_sp_sp_0x120"},
170 {{al, sp, sp, 0x124}, false, al, "al sp sp 0x124", "al_sp_sp_0x124"},
171 {{al, sp, sp, 0x128}, false, al, "al sp sp 0x128", "al_sp_sp_0x128"},
172 {{al, sp, sp, 0x12c}, false, al, "al sp sp 0x12c", "al_sp_sp_0x12c"},
173 {{al, sp, sp, 0x130}, false, al, "al sp sp 0x130", "al_sp_sp_0x130"},
174 {{al, sp, sp, 0x134}, false, al, "al sp sp 0x134", "al_sp_sp_0x134"},
175 {{al, sp, sp, 0x138}, false, al, "al sp sp 0x138", "al_sp_sp_0x138"},
176 {{al, sp, sp, 0x13c}, false, al, "al sp sp 0x13c", "al_sp_sp_0x13c"},
177 {{al, sp, sp, 0x140}, false, al, "al sp sp 0x140", "al_sp_sp_0x140"},
178 {{al, sp, sp, 0x144}, false, al, "al sp sp 0x144", "al_sp_sp_0x144"},
179 {{al, sp, sp, 0x148}, false, al, "al sp sp 0x148", "al_sp_sp_0x148"},
180 {{al, sp, sp, 0x14c}, false, al, "al sp sp 0x14c", "al_sp_sp_0x14c"},
181 {{al, sp, sp, 0x150}, false, al, "al sp sp 0x150", "al_sp_sp_0x150"},
182 {{al, sp, sp, 0x154}, false, al, "al sp sp 0x154", "al_sp_sp_0x154"},
183 {{al, sp, sp, 0x158}, false, al, "al sp sp 0x158", "al_sp_sp_0x158"},
184 {{al, sp, sp, 0x15c}, false, al, "al sp sp 0x15c", "al_sp_sp_0x15c"},
185 {{al, sp, sp, 0x160}, false, al, "al sp sp 0x160", "al_sp_sp_0x160"},
186 {{al, sp, sp, 0x164}, false, al, "al sp sp 0x164", "al_sp_sp_0x164"},
187 {{al, sp, sp, 0x168}, false, al, "al sp sp 0x168", "al_sp_sp_0x168"},
188 {{al, sp, sp, 0x16c}, false, al, "al sp sp 0x16c", "al_sp_sp_0x16c"},
189 {{al, sp, sp, 0x170}, false, al, "al sp sp 0x170", "al_sp_sp_0x170"},
190 {{al, sp, sp, 0x174}, false, al, "al sp sp 0x174", "al_sp_sp_0x174"},
191 {{al, sp, sp, 0x178}, false, al, "al sp sp 0x178", "al_sp_sp_0x178"},
192 {{al, sp, sp, 0x17c}, false, al, "al sp sp 0x17c", "al_sp_sp_0x17c"},
193 {{al, sp, sp, 0x180}, false, al, "al sp sp 0x180", "al_sp_sp_0x180"},
194 {{al, sp, sp, 0x184}, false, al, "al sp sp 0x184", "al_sp_sp_0x184"},
195 {{al, sp, sp, 0x188}, false, al, "al sp sp 0x188", "al_sp_sp_0x188"},
196 {{al, sp, sp, 0x18c}, false, al, "al sp sp 0x18c", "al_sp_sp_0x18c"},
197 {{al, sp, sp, 0x190}, false, al, "al sp sp 0x190", "al_sp_sp_0x190"},
198 {{al, sp, sp, 0x194}, false, al, "al sp sp 0x194", "al_sp_sp_0x194"},
199 {{al, sp, sp, 0x198}, false, al, "al sp sp 0x198", "al_sp_sp_0x198"},
200 {{al, sp, sp, 0x19c}, false, al, "al sp sp 0x19c", "al_sp_sp_0x19c"},
201 {{al, sp, sp, 0x1a0}, false, al, "al sp sp 0x1a0", "al_sp_sp_0x1a0"},
202 {{al, sp, sp, 0x1a4}, false, al, "al sp sp 0x1a4", "al_sp_sp_0x1a4"},
203 {{al, sp, sp, 0x1a8}, false, al, "al sp sp 0x1a8", "al_sp_sp_0x1a8"},
204 {{al, sp, sp, 0x1ac}, false, al, "al sp sp 0x1ac", "al_sp_sp_0x1ac"},
205 {{al, sp, sp, 0x1b0}, false, al, "al sp sp 0x1b0", "al_sp_sp_0x1b0"},
206 {{al, sp, sp, 0x1b4}, false, al, "al sp sp 0x1b4", "al_sp_sp_0x1b4"},
207 {{al, sp, sp, 0x1b8}, false, al, "al sp sp 0x1b8", "al_sp_sp_0x1b8"},
208 {{al, sp, sp, 0x1bc}, false, al, "al sp sp 0x1bc", "al_sp_sp_0x1bc"},
209 {{al, sp, sp, 0x1c0}, false, al, "al sp sp 0x1c0", "al_sp_sp_0x1c0"},
210 {{al, sp, sp, 0x1c4}, false, al, "al sp sp 0x1c4", "al_sp_sp_0x1c4"},
211 {{al, sp, sp, 0x1c8}, false, al, "al sp sp 0x1c8", "al_sp_sp_0x1c8"},
212 {{al, sp, sp, 0x1cc}, false, al, "al sp sp 0x1cc", "al_sp_sp_0x1cc"},
213 {{al, sp, sp, 0x1d0}, false, al, "al sp sp 0x1d0", "al_sp_sp_0x1d0"},
214 {{al, sp, sp, 0x1d4}, false, al, "al sp sp 0x1d4", "al_sp_sp_0x1d4"},
215 {{al, sp, sp, 0x1d8}, false, al, "al sp sp 0x1d8", "al_sp_sp_0x1d8"},
216 {{al, sp, sp, 0x1dc}, false, al, "al sp sp 0x1dc", "al_sp_sp_0x1dc"},
217 {{al, sp, sp, 0x1e0}, false, al, "al sp sp 0x1e0", "al_sp_sp_0x1e0"},
218 {{al, sp, sp, 0x1e4}, false, al, "al sp sp 0x1e4", "al_sp_sp_0x1e4"},
219 {{al, sp, sp, 0x1e8}, false, al, "al sp sp 0x1e8", "al_sp_sp_0x1e8"},
220 {{al, sp, sp, 0x1ec}, false, al, "al sp sp 0x1ec", "al_sp_sp_0x1ec"},
221 {{al, sp, sp, 0x1f0}, false, al, "al sp sp 0x1f0", "al_sp_sp_0x1f0"},
222 {{al, sp, sp, 0x1f4}, false, al, "al sp sp 0x1f4", "al_sp_sp_0x1f4"},
223 {{al, sp, sp, 0x1f8}, false, al, "al sp sp 0x1f8", "al_sp_sp_0x1f8"},
224 {{al, sp, sp, 0x1fc}, false, al, "al sp sp 0x1fc", "al_sp_sp_0x1fc"}};
225
226 // These headers each contain an array of `TestResult` with the reference output
227 // values. The reference arrays are names `kReference{mnemonic}`.
228 #include "aarch32/traces/assembler-cond-sp-sp-operand-imm7-t32-add.h"
229 #include "aarch32/traces/assembler-cond-sp-sp-operand-imm7-t32-sub.h"
230
231
232 // The maximum number of errors to report in detail for each test.
233 const unsigned kErrorReportLimit = 8;
234
235 typedef void (MacroAssembler::*Fn)(Condition cond,
236 Register rd,
237 Register rn,
238 const Operand& op);
239
TestHelper(Fn instruction,const char * mnemonic,const TestResult reference[])240 void TestHelper(Fn instruction,
241 const char* mnemonic,
242 const TestResult reference[]) {
243 unsigned total_error_count = 0;
244 MacroAssembler masm(BUF_SIZE);
245
246 masm.UseT32();
247
248 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
249 // Values to pass to the macro-assembler.
250 Condition cond = kTests[i].operands.cond;
251 Register rd = kTests[i].operands.rd;
252 Register rn = kTests[i].operands.rn;
253 uint32_t immediate = kTests[i].operands.immediate;
254 Operand op(immediate);
255
256 int32_t start = masm.GetCursorOffset();
257 {
258 // We never generate more that 4 bytes, as IT instructions are only
259 // allowed for narrow encodings.
260 ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize);
261 if (kTests[i].in_it_block) {
262 masm.it(kTests[i].it_condition);
263 }
264 (masm.*instruction)(cond, rd, rn, op);
265 }
266 int32_t end = masm.GetCursorOffset();
267
268 const byte* result_ptr =
269 masm.GetBuffer()->GetOffsetAddress<const byte*>(start);
270 VIXL_ASSERT(start < end);
271 uint32_t result_size = end - start;
272
273 if (Test::generate_test_trace()) {
274 // Print the result bytes.
275 printf("const byte kInstruction_%s_%s[] = {\n",
276 mnemonic,
277 kTests[i].identifier);
278 for (uint32_t j = 0; j < result_size; j++) {
279 if (j == 0) {
280 printf(" 0x%02" PRIx8, result_ptr[j]);
281 } else {
282 printf(", 0x%02" PRIx8, result_ptr[j]);
283 }
284 }
285 // This comment is meant to be used by external tools to validate
286 // the encoding. We can parse the comment to figure out what
287 // instruction this corresponds to.
288 if (kTests[i].in_it_block) {
289 printf(" // It %s; %s %s\n};\n",
290 kTests[i].it_condition.GetName(),
291 mnemonic,
292 kTests[i].operands_description);
293 } else {
294 printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description);
295 }
296 } else {
297 // Check we've emitted the exact same encoding as present in the
298 // trace file. Only print up to `kErrorReportLimit` errors.
299 if (((result_size != reference[i].size) ||
300 (memcmp(result_ptr, reference[i].encoding, reference[i].size) !=
301 0)) &&
302 (++total_error_count <= kErrorReportLimit)) {
303 printf("Error when testing \"%s\" with operands \"%s\":\n",
304 mnemonic,
305 kTests[i].operands_description);
306 printf(" Expected: ");
307 for (uint32_t j = 0; j < reference[i].size; j++) {
308 if (j == 0) {
309 printf("0x%02" PRIx8, reference[i].encoding[j]);
310 } else {
311 printf(", 0x%02" PRIx8, reference[i].encoding[j]);
312 }
313 }
314 printf("\n");
315 printf(" Found: ");
316 for (uint32_t j = 0; j < result_size; j++) {
317 if (j == 0) {
318 printf("0x%02" PRIx8, result_ptr[j]);
319 } else {
320 printf(", 0x%02" PRIx8, result_ptr[j]);
321 }
322 }
323 printf("\n");
324 }
325 }
326 }
327
328 masm.FinalizeCode();
329
330 if (Test::generate_test_trace()) {
331 // Finalize the trace file by writing the final `TestResult` array
332 // which links all generated instruction encodings.
333 printf("const TestResult kReference%s[] = {\n", mnemonic);
334 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
335 printf(" {\n");
336 printf(" ARRAY_SIZE(kInstruction_%s_%s),\n",
337 mnemonic,
338 kTests[i].identifier);
339 printf(" kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier);
340 printf(" },\n");
341 }
342 printf("};\n");
343 } else {
344 if (total_error_count > kErrorReportLimit) {
345 printf("%u other errors follow.\n",
346 total_error_count - kErrorReportLimit);
347 }
348 // Crash if the test failed.
349 VIXL_CHECK(total_error_count == 0);
350 }
351 }
352
353 // Instantiate tests for each instruction in the list.
354 #define TEST(mnemonic) \
355 void Test_##mnemonic() { \
356 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
357 } \
358 Test test_##mnemonic( \
359 "AARCH32_ASSEMBLER_COND_SP_SP_OPERAND_IMM7_T32_" #mnemonic, \
360 &Test_##mnemonic);
361 FOREACH_INSTRUCTION(TEST)
362 #undef TEST
363
364 } // namespace
365 #endif
366
367 } // namespace aarch32
368 } // namespace vixl
369