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1 #ifndef BCC_CONFIG_CONFIG_H
2 #define BCC_CONFIG_CONFIG_H
3 
4 //---------------------------------------------------------------------------
5 // Configuration for Disassembler
6 //---------------------------------------------------------------------------
7 
8 #if DEBUG_MC_DISASSEMBLER
9 #define USE_DISASSEMBLER 1
10 #else
11 #define USE_DISASSEMBLER 0
12 #endif
13 
14 #if defined(__HOST__)
15 #define DEBUG_DISASSEMBLER_FILE "/tmp/mc-dis.s"
16 #else
17 #define DEBUG_DISASSEMBLER_FILE "/data/local/tmp/mc-dis.s"
18 #endif // defined(__HOST__)
19 
20 //---------------------------------------------------------------------------
21 // Configuration for CodeGen and CompilerRT
22 //---------------------------------------------------------------------------
23 
24 #if defined(FORCE_ARM_CODEGEN)
25   #define PROVIDE_ARM_CODEGEN
26   #define DEFAULT_ARM_CODEGEN
27 
28 #elif defined(FORCE_ARM64_CODEGEN)
29   #define PROVIDE_ARM_CODEGEN
30   #define PROVIDE_ARM64_CODEGEN
31   #define DEFAULT_ARM64_CODEGEN
32 
33 #elif defined(FORCE_MIPS_CODEGEN)
34   #define PROVIDE_MIPS_CODEGEN
35   #define DEFAULT_MIPS_CODEGEN
36 
37 #elif defined(FORCE_MIPS64_CODEGEN)
38   #define PROVIDE_MIPS_CODEGEN
39   #define PROVIDE_MIPS64_CODEGEN
40   #define DEFAULT_MIPS64_CODEGEN
41 
42 #elif defined(FORCE_X86_CODEGEN)
43   #define PROVIDE_X86_CODEGEN
44   #define DEFAULT_X86_CODEGEN
45 
46 #elif defined(FORCE_X86_64_CODEGEN)
47   // There is no separate X86_64 code generation target. It is all part of X86.
48   #define PROVIDE_X86_CODEGEN
49   #define DEFAULT_X86_64_CODEGEN
50 
51 #else
52   #define PROVIDE_ARM_CODEGEN
53   #define PROVIDE_ARM64_CODEGEN
54   #define PROVIDE_MIPS_CODEGEN
55   #define PROVIDE_MIPS64_CODEGEN
56   #define PROVIDE_X86_CODEGEN
57   #define PROVIDE_X86_64_CODEGEN
58 
59   #if defined(__arm__)
60     #define DEFAULT_ARM_CODEGEN
61   #elif defined(__aarch64__)
62     #define DEFAULT_ARM64_CODEGEN
63   #elif defined(__mips__)
64     #if defined(__LP64__)
65       #define DEFAULT_MIPS64_CODEGEN
66     #else
67       #define DEFAULT_MIPS_CODEGEN
68     #endif
69   #elif defined(__i386__)
70     #define DEFAULT_X86_CODEGEN
71   #elif defined(__x86_64__)
72     #define DEFAULT_X86_64_CODEGEN
73   #endif
74 #endif
75 
76 #define DEFAULT_ARM_TRIPLE_STRING      "armv7-none-linux-gnueabi"
77 #define DEFAULT_THUMB_TRIPLE_STRING    "thumbv7-none-linux-gnueabi"
78 #define DEFAULT_ARM64_TRIPLE_STRING    "aarch64-none-linux-gnueabi"
79 #define DEFAULT_MIPS_TRIPLE_STRING     "mipsel-none-linux-gnueabi"
80 #define DEFAULT_MIPS64_TRIPLE_STRING   "mips64el-none-linux-gnueabi"
81 #define DEFAULT_X86_TRIPLE_STRING      "i686-unknown-linux"
82 #define DEFAULT_X86_64_TRIPLE_STRING   "x86_64-unknown-linux"
83 
84 // Custom DataLayout string for X86 with i64 and f64 set to match the ARM32
85 // alignment requirement of 64-bits.
86 #define X86_CUSTOM_DL_STRING "e-m:e-p:32:32-i64:64-f64:64:64-f80:32-n8:16:32-S128"
87 // Default DataLayout string for X86.  Present to detect future LLVM datalayout
88 // changes so X86_CUSTOM_DL_STRING above can be modified appropriately.
89 #define X86_DEFAULT_DL_STRING "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
90 
91 #if defined(DEFAULT_ARM_CODEGEN)
92   #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_ARM_TRIPLE_STRING
93 #elif defined(DEFAULT_ARM64_CODEGEN)
94   #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_ARM64_TRIPLE_STRING
95 #elif defined(DEFAULT_MIPS_CODEGEN)
96   #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_MIPS_TRIPLE_STRING
97 #elif defined(DEFAULT_MIPS64_CODEGEN)
98   #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_MIPS64_TRIPLE_STRING
99 #elif defined(DEFAULT_X86_CODEGEN)
100   #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_X86_TRIPLE_STRING
101 #elif defined(DEFAULT_X86_64_CODEGEN)
102   #define DEFAULT_TARGET_TRIPLE_STRING DEFAULT_X86_64_TRIPLE_STRING
103 #endif
104 
105 #if (defined(__VFP_FP__) && !defined(__SOFTFP__))
106   #define ARM_USE_VFP
107 #endif
108 
109 //---------------------------------------------------------------------------
110 
111 #endif // BCC_CONFIG_CONFIG_H
112