/art/compiler/utils/arm/ |
D | assembler_arm_vixl.cc | 157 ___ Add(temp, base, add_to_base); in AdjustLoadStoreOffset() local 161 ___ Add(temp, temp, base); in AdjustLoadStoreOffset() local 326 ___ Add(dest, dest, (dest.Is(base)) ? temp : base); in LoadFromOffset() local 396 ___ Add(base, sp, Operand::From(stack_offset)); in StoreRegisterList() local 416 ___ Add(base, sp, Operand::From(stack_offset)); in LoadRegisterList() local 444 ___ Add(rd, rn, value); in AddConstant() local
|
D | assembler_arm_vixl.h | 125 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add() function
|
/art/runtime/ |
D | signal_set.h | 34 void Add(int signal) { in Add() function
|
D | indirect_reference_table-inl.h | 109 inline void IrtEntry::Add(ObjPtr<mirror::Object> obj) { in Add() function
|
D | reference_table.cc | 49 void ReferenceTable::Add(ObjPtr<mirror::Object> obj) { in Add() function in art::ReferenceTable
|
D | indirect_reference_table.cc | 239 IndirectRef IndirectReferenceTable::Add(IRTSegmentState previous_state, in Add() function in art::IndirectReferenceTable
|
/art/runtime/gc/collector/ |
D | object_byte_pair.h | 29 void Add(const ObjectBytePair& other) { in Add() function
|
/art/runtime/interpreter/ |
D | safe_math_test.cc | 26 TEST(SafeMath, Add) { in TEST() argument
|
/art/compiler/linker/arm/ |
D | relative_patcher_thumb2.cc | 196 __ Add(lr, lr, raw_ldr_offset); in EmitGrayCheckAndFastPath() local 200 __ Add(base_reg, base_reg, Operand(ip, LSR, 32)); in EmitGrayCheckAndFastPath() local 266 __ Add(ep_reg, // Adjust the entrypoint address to the entrypoint in CompileBakerReadBarrierThunk() local 343 __ Add(ep_reg, ep_reg, Operand(entrypoint_offset)); in CompileBakerReadBarrierThunk() local
|
/art/runtime/jdwp/ |
D | object_registry.cc | 53 JDWP::ObjectId ObjectRegistry::Add(ObjPtr<mirror::Object> o) { in Add() function in art::ObjectRegistry 64 JDWP::ObjectId ObjectRegistry::Add(Handle<T> obj_h) { in Add() function in art::ObjectRegistry
|
/art/compiler/optimizing/ |
D | intrinsics_arm64.cc | 1221 __ Add(tmp_ptr, base.X(), Operand(offset)); in GenCas() local 1405 __ Add(temp1, temp1, char_size * 4); in VisitStringCompareTo() local 1472 __ Add(temp1, temp1, Operand(value_offset)); in VisitStringCompareTo() local 1473 __ Add(temp2, temp2, Operand(value_offset)); in VisitStringCompareTo() local 1689 __ Add(temp1, temp1, Operand(sizeof(uint64_t))); in VisitStringEquals() local 2089 __ Add(dst_ptr, dstObj, Operand(data_offset)); in VisitStringGetCharsNoCheck() local 2090 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, LSL, 1)); in VisitStringGetCharsNoCheck() local 2093 __ Add(src_ptr, srcObj, Operand(value_offset)); in VisitStringGetCharsNoCheck() local 2102 __ Add(src_ptr, src_ptr, Operand(srcBegin, LSL, 1)); in VisitStringGetCharsNoCheck() local 2139 __ Add(src_ptr, src_ptr, Operand(srcBegin)); in VisitStringGetCharsNoCheck() local [all …]
|
D | intrinsics_arm_vixl.cc | 143 __ Add(base, array, element_size * constant + data_offset); in GenSystemArrayCopyBaseAddress() local 145 __ Add(base, array, Operand(RegisterFrom(pos), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyBaseAddress() local 146 __ Add(base, base, data_offset); in GenSystemArrayCopyBaseAddress() local 165 __ Add(end, base, element_size * constant); in GenSystemArrayCopyEndAddress() local 167 __ Add(end, base, Operand(RegisterFrom(copy_length), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyEndAddress() local 364 __ Add(out, out, 32); in GenNumberOfLeadingZeros() local 408 __ Add(out, out, 32); in GenNumberOfTrailingZeros() local 490 __ Add(out_reg, in_reg, mask); in GenAbsInteger() local 1008 __ Add(temp_reg, base, offset); in GenUnsafeGet() local 1177 __ Add(temp_reg, base, offset); in GenUnsafePut() local [all …]
|
D | code_generator_vector_arm64.cc | 410 __ Add(dst.V16B(), lhs.V16B(), rhs.V16B()); in VisitVecAdd() local 415 __ Add(dst.V8H(), lhs.V8H(), rhs.V8H()); in VisitVecAdd() local 419 __ Add(dst.V4S(), lhs.V4S(), rhs.V4S()); in VisitVecAdd() local 423 __ Add(dst.V2D(), lhs.V2D(), rhs.V2D()); in VisitVecAdd() local 1182 __ Add(acc.V4S(), acc.V4S(), tmp.V4S()); in VisitVecSADAccumulate() local 1203 __ Add(acc.V2D(), acc.V2D(), tmp.V2D()); in VisitVecSADAccumulate() local 1276 __ Add(*scratch, base, Operand(WRegisterFrom(index), LSL, shift)); in VecAddress() local
|
D | code_generator_arm_vixl.cc | 222 __ Add(base, sp, Operand::From(stack_offset)); in SaveContiguousSRegisterList() local 270 __ Add(base, sp, Operand::From(stack_offset)); in RestoreContiguousSRegisterList() local 955 __ Add(obj_, obj_, Operand(temp_, ShiftType::LSR, 32)); in EmitNativeCode() local 1097 __ Add(obj_, obj_, Operand(temp1_, ShiftType::LSR, 32)); in EmitNativeCode() local 1155 __ Add(tmp_ptr, base, offset); in EmitNativeCode() local 1319 __ Add(index_reg, index_reg, offset_); in EmitNativeCode() local 1570 __ Add(out, first, second); in GenerateDataProcInstruction() local 2492 __ Add(temp, temp, 1); in GenerateFrameEntry() local 2573 __ Add(sp, sp, adjust); in GenerateFrameExit() local 2822 __ Add(temp, temp, 1); in HandleGoto() local [all …]
|
D | code_generator_arm64.cc | 202 __ Add(new_base, base, Operand(spill_offset + core_spill_size)); in SaveRestoreLiveRegistersHelper() local 832 __ Add(obj_.X(), obj_.X(), Operand(temp_.X(), LSR, 32)); in EmitNativeCode() local 984 __ Add(obj_.X(), obj_.X(), Operand(temp_.X(), LSR, 32)); in EmitNativeCode() local 1045 __ Add(tmp_ptr, base.X(), Operand(offset)); in EmitNativeCode() local 1209 __ Add(index_reg, index_reg, Operand(offset_)); in EmitNativeCode() local 1495 __ Add(temp, temp, 1); in GenerateFrameEntry() local 1912 __ Add(temp_base, src.GetBaseRegister(), OperandFromMemOperand(src)); in LoadAcquire() local 2022 __ Add(temp_base, dst.GetBaseRegister(), op); in StoreRelease() local 2124 __ Add(temp, class_reg, status_byte_offset); in GenerateClassInitializationCheck() local 2368 __ Add(dst, lhs, rhs); in HandleBinaryOp() local [all …]
|
D | code_generator_vector_arm_vixl.cc | 848 __ Add(*scratch, base, Operand(RegisterFrom(index), ShiftType::LSL, shift)); in VecAddress() local 871 __ Add(*scratch, base, offset); in VecAddressUnaligned() local 874 __ Add(*scratch, base, offset); in VecAddressUnaligned() local 875 __ Add(*scratch, *scratch, Operand(RegisterFrom(index), ShiftType::LSL, shift)); in VecAddressUnaligned() local
|
D | gvn.cc | 87 void Add(HInstruction* instruction) { in Add() function in art::ValueSet
|
D | nodes.cc | 733 void HLoopInformation::Add(HBasicBlock* block) { in Add() function in art::HLoopInformation 988 static void Add(HInstructionList* instruction_list, in Add() function 2050 void HInstructionList::Add(const HInstructionList& instruction_list) { in Add() function in art::HInstructionList
|
D | locations.h | 438 void Add(Location loc) { in Add() function
|
D | bounds_check_elimination.cc | 238 ValueBound Add(int32_t c, /* out */ bool* overflow, /* out */ bool* underflow) const { in Add() function in art::ValueBound 336 ValueRange* Add(int32_t constant) const { in Add() function in art::ValueRange
|
/art/compiler/linker/arm64/ |
D | relative_patcher_arm64.cc | 384 __ Add(lr, lr, BAKER_MARK_INTROSPECTION_FIELD_LDR_OFFSET); in EmitGrayCheckAndFastPath() local 388 __ Add(base_reg, base_reg, Operand(ip0, LSR, 32)); in EmitGrayCheckAndFastPath() local 501 __ Add(ip1, ip1, Operand(BAKER_MARK_INTROSPECTION_GC_ROOT_ENTRYPOINT_OFFSET)); in CompileBakerReadBarrierThunk() local
|
/art/compiler/linker/ |
D | elf_builder.h | 246 Elf_Word Add(const void* data, size_t length) { in Add() function 289 Elf_Word Add(const std::string& name) { in Add() function 357 void Add(Elf_Word name, in Add() function 375 void Add(Elf_Word name, in Add() function
|
/art/test/660-clinit/src/ |
D | Main.java | 179 class Add { class
|
/art/compiler/utils/arm64/ |
D | jni_macro_assembler_arm64.cc | 82 ___ Add(reg_x(rd), reg_x(rn), value); in AddConstant() local 89 ___ Add(temp, reg_x(rn), value); in AddConstant() local
|
/art/runtime/gc/allocator/ |
D | rosalloc.h | 191 void Add(Slot* slot) { in Add() function
|