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Searched defs:Add (Results 1 – 25 of 30) sorted by relevance

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/art/compiler/utils/arm/
Dassembler_arm_vixl.cc157 ___ Add(temp, base, add_to_base); in AdjustLoadStoreOffset() local
161 ___ Add(temp, temp, base); in AdjustLoadStoreOffset() local
326 ___ Add(dest, dest, (dest.Is(base)) ? temp : base); in LoadFromOffset() local
396 ___ Add(base, sp, Operand::From(stack_offset)); in StoreRegisterList() local
416 ___ Add(base, sp, Operand::From(stack_offset)); in LoadRegisterList() local
444 ___ Add(rd, rn, value); in AddConstant() local
Dassembler_arm_vixl.h125 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add() function
/art/runtime/
Dsignal_set.h34 void Add(int signal) { in Add() function
Dindirect_reference_table-inl.h109 inline void IrtEntry::Add(ObjPtr<mirror::Object> obj) { in Add() function
Dreference_table.cc49 void ReferenceTable::Add(ObjPtr<mirror::Object> obj) { in Add() function in art::ReferenceTable
Dindirect_reference_table.cc239 IndirectRef IndirectReferenceTable::Add(IRTSegmentState previous_state, in Add() function in art::IndirectReferenceTable
/art/runtime/gc/collector/
Dobject_byte_pair.h29 void Add(const ObjectBytePair& other) { in Add() function
/art/runtime/interpreter/
Dsafe_math_test.cc26 TEST(SafeMath, Add) { in TEST() argument
/art/compiler/linker/arm/
Drelative_patcher_thumb2.cc196 __ Add(lr, lr, raw_ldr_offset); in EmitGrayCheckAndFastPath() local
200 __ Add(base_reg, base_reg, Operand(ip, LSR, 32)); in EmitGrayCheckAndFastPath() local
266 __ Add(ep_reg, // Adjust the entrypoint address to the entrypoint in CompileBakerReadBarrierThunk() local
343 __ Add(ep_reg, ep_reg, Operand(entrypoint_offset)); in CompileBakerReadBarrierThunk() local
/art/runtime/jdwp/
Dobject_registry.cc53 JDWP::ObjectId ObjectRegistry::Add(ObjPtr<mirror::Object> o) { in Add() function in art::ObjectRegistry
64 JDWP::ObjectId ObjectRegistry::Add(Handle<T> obj_h) { in Add() function in art::ObjectRegistry
/art/compiler/optimizing/
Dintrinsics_arm64.cc1221 __ Add(tmp_ptr, base.X(), Operand(offset)); in GenCas() local
1405 __ Add(temp1, temp1, char_size * 4); in VisitStringCompareTo() local
1472 __ Add(temp1, temp1, Operand(value_offset)); in VisitStringCompareTo() local
1473 __ Add(temp2, temp2, Operand(value_offset)); in VisitStringCompareTo() local
1689 __ Add(temp1, temp1, Operand(sizeof(uint64_t))); in VisitStringEquals() local
2089 __ Add(dst_ptr, dstObj, Operand(data_offset)); in VisitStringGetCharsNoCheck() local
2090 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, LSL, 1)); in VisitStringGetCharsNoCheck() local
2093 __ Add(src_ptr, srcObj, Operand(value_offset)); in VisitStringGetCharsNoCheck() local
2102 __ Add(src_ptr, src_ptr, Operand(srcBegin, LSL, 1)); in VisitStringGetCharsNoCheck() local
2139 __ Add(src_ptr, src_ptr, Operand(srcBegin)); in VisitStringGetCharsNoCheck() local
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Dintrinsics_arm_vixl.cc143 __ Add(base, array, element_size * constant + data_offset); in GenSystemArrayCopyBaseAddress() local
145 __ Add(base, array, Operand(RegisterFrom(pos), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyBaseAddress() local
146 __ Add(base, base, data_offset); in GenSystemArrayCopyBaseAddress() local
165 __ Add(end, base, element_size * constant); in GenSystemArrayCopyEndAddress() local
167 __ Add(end, base, Operand(RegisterFrom(copy_length), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyEndAddress() local
364 __ Add(out, out, 32); in GenNumberOfLeadingZeros() local
408 __ Add(out, out, 32); in GenNumberOfTrailingZeros() local
490 __ Add(out_reg, in_reg, mask); in GenAbsInteger() local
1008 __ Add(temp_reg, base, offset); in GenUnsafeGet() local
1177 __ Add(temp_reg, base, offset); in GenUnsafePut() local
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Dcode_generator_vector_arm64.cc410 __ Add(dst.V16B(), lhs.V16B(), rhs.V16B()); in VisitVecAdd() local
415 __ Add(dst.V8H(), lhs.V8H(), rhs.V8H()); in VisitVecAdd() local
419 __ Add(dst.V4S(), lhs.V4S(), rhs.V4S()); in VisitVecAdd() local
423 __ Add(dst.V2D(), lhs.V2D(), rhs.V2D()); in VisitVecAdd() local
1182 __ Add(acc.V4S(), acc.V4S(), tmp.V4S()); in VisitVecSADAccumulate() local
1203 __ Add(acc.V2D(), acc.V2D(), tmp.V2D()); in VisitVecSADAccumulate() local
1276 __ Add(*scratch, base, Operand(WRegisterFrom(index), LSL, shift)); in VecAddress() local
Dcode_generator_arm_vixl.cc222 __ Add(base, sp, Operand::From(stack_offset)); in SaveContiguousSRegisterList() local
270 __ Add(base, sp, Operand::From(stack_offset)); in RestoreContiguousSRegisterList() local
955 __ Add(obj_, obj_, Operand(temp_, ShiftType::LSR, 32)); in EmitNativeCode() local
1097 __ Add(obj_, obj_, Operand(temp1_, ShiftType::LSR, 32)); in EmitNativeCode() local
1155 __ Add(tmp_ptr, base, offset); in EmitNativeCode() local
1319 __ Add(index_reg, index_reg, offset_); in EmitNativeCode() local
1570 __ Add(out, first, second); in GenerateDataProcInstruction() local
2492 __ Add(temp, temp, 1); in GenerateFrameEntry() local
2573 __ Add(sp, sp, adjust); in GenerateFrameExit() local
2822 __ Add(temp, temp, 1); in HandleGoto() local
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Dcode_generator_arm64.cc202 __ Add(new_base, base, Operand(spill_offset + core_spill_size)); in SaveRestoreLiveRegistersHelper() local
832 __ Add(obj_.X(), obj_.X(), Operand(temp_.X(), LSR, 32)); in EmitNativeCode() local
984 __ Add(obj_.X(), obj_.X(), Operand(temp_.X(), LSR, 32)); in EmitNativeCode() local
1045 __ Add(tmp_ptr, base.X(), Operand(offset)); in EmitNativeCode() local
1209 __ Add(index_reg, index_reg, Operand(offset_)); in EmitNativeCode() local
1495 __ Add(temp, temp, 1); in GenerateFrameEntry() local
1912 __ Add(temp_base, src.GetBaseRegister(), OperandFromMemOperand(src)); in LoadAcquire() local
2022 __ Add(temp_base, dst.GetBaseRegister(), op); in StoreRelease() local
2124 __ Add(temp, class_reg, status_byte_offset); in GenerateClassInitializationCheck() local
2368 __ Add(dst, lhs, rhs); in HandleBinaryOp() local
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Dcode_generator_vector_arm_vixl.cc848 __ Add(*scratch, base, Operand(RegisterFrom(index), ShiftType::LSL, shift)); in VecAddress() local
871 __ Add(*scratch, base, offset); in VecAddressUnaligned() local
874 __ Add(*scratch, base, offset); in VecAddressUnaligned() local
875 __ Add(*scratch, *scratch, Operand(RegisterFrom(index), ShiftType::LSL, shift)); in VecAddressUnaligned() local
Dgvn.cc87 void Add(HInstruction* instruction) { in Add() function in art::ValueSet
Dnodes.cc733 void HLoopInformation::Add(HBasicBlock* block) { in Add() function in art::HLoopInformation
988 static void Add(HInstructionList* instruction_list, in Add() function
2050 void HInstructionList::Add(const HInstructionList& instruction_list) { in Add() function in art::HInstructionList
Dlocations.h438 void Add(Location loc) { in Add() function
Dbounds_check_elimination.cc238 ValueBound Add(int32_t c, /* out */ bool* overflow, /* out */ bool* underflow) const { in Add() function in art::ValueBound
336 ValueRange* Add(int32_t constant) const { in Add() function in art::ValueRange
/art/compiler/linker/arm64/
Drelative_patcher_arm64.cc384 __ Add(lr, lr, BAKER_MARK_INTROSPECTION_FIELD_LDR_OFFSET); in EmitGrayCheckAndFastPath() local
388 __ Add(base_reg, base_reg, Operand(ip0, LSR, 32)); in EmitGrayCheckAndFastPath() local
501 __ Add(ip1, ip1, Operand(BAKER_MARK_INTROSPECTION_GC_ROOT_ENTRYPOINT_OFFSET)); in CompileBakerReadBarrierThunk() local
/art/compiler/linker/
Delf_builder.h246 Elf_Word Add(const void* data, size_t length) { in Add() function
289 Elf_Word Add(const std::string& name) { in Add() function
357 void Add(Elf_Word name, in Add() function
375 void Add(Elf_Word name, in Add() function
/art/test/660-clinit/src/
DMain.java179 class Add { class
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc82 ___ Add(reg_x(rd), reg_x(rn), value); in AddConstant() local
89 ___ Add(temp, reg_x(rn), value); in AddConstant() local
/art/runtime/gc/allocator/
Drosalloc.h191 void Add(Slot* slot) { in Add() function

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