Searched refs:MIRROR_WIDE_ARRAY_DATA_OFFSET (Results 1 – 23 of 23) sorted by relevance
/art/runtime/interpreter/mterp/mips64/ |
D | op_aput_wide.S | 18 sw a2, MIRROR_WIDE_ARRAY_DATA_OFFSET(a0) 20 sw a2, (MIRROR_WIDE_ARRAY_DATA_OFFSET+4)(a0) # vBB[vCC] <- a2
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D | op_aget_wide.S | 16 lw a2, MIRROR_WIDE_ARRAY_DATA_OFFSET(a0) 17 lw a3, (MIRROR_WIDE_ARRAY_DATA_OFFSET+4)(a0)
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/art/runtime/interpreter/mterp/arm64/ |
D | op_aput_wide.S | 20 str x1, [x0, #MIRROR_WIDE_ARRAY_DATA_OFFSET]
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D | op_aget_wide.S | 18 ldr x2, [x0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] // x2<- vBB[vCC]
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/art/runtime/interpreter/mterp/x86/ |
D | op_aput_wide.S | 14 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax
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D | op_aget_wide.S | 13 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax
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/art/runtime/interpreter/mterp/mips/ |
D | op_aget_wide.S | 20 LOAD64_off(a2, a3, a0, MIRROR_WIDE_ARRAY_DATA_OFFSET)
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D | op_aput_wide.S | 23 STORE64_off(a2, a3, a0, MIRROR_WIDE_ARRAY_DATA_OFFSET) # a2/a3 <- vBB[vCC]
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/art/runtime/interpreter/mterp/arm/ |
D | op_aput_wide.S | 23 strd r2, [r0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] @ r2/r3<- vBB[vCC]
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D | op_aget_wide.S | 21 ldrd r2, [r0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] @ r2/r3<- vBB[vCC]
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/art/runtime/ |
D | asm_support.h | 193 #define MIRROR_WIDE_ARRAY_DATA_OFFSET (8 + MIRROR_OBJECT_HEADER_SIZE) macro 194 ADD_TEST_EQ(MIRROR_WIDE_ARRAY_DATA_OFFSET,
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/art/runtime/arch/x86/ |
D | quick_entrypoints_x86.S | 1178 cmpl LITERAL((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_WIDE_ARRAY_DATA_OFFSET) / 8), %ecx 1192 #if MIRROR_WIDE_ARRAY_DATA_OFFSET != MIRROR_INT_ARRAY_DATA_OFFSET + 4 1235 cmpl LITERAL((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_WIDE_ARRAY_DATA_OFFSET) / 8), %ecx 1238 leal ((MIRROR_WIDE_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK) / 8)(%ecx), %edx
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/art/runtime/arch/arm/ |
D | quick_entrypoints_arm.S | 1459 movw r2, #((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_WIDE_ARRAY_DATA_OFFSET) / 8) 1472 #if MIRROR_WIDE_ARRAY_DATA_OFFSET != MIRROR_INT_ARRAY_DATA_OFFSET + 4 1523 add r2, r2, #(MIRROR_WIDE_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK)
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/art/runtime/arch/mips/ |
D | quick_entrypoints_mips.S | 1952 li $a2, ((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_WIDE_ARRAY_DATA_OFFSET) / 8) 1963 #if MIRROR_WIDE_ARRAY_DATA_OFFSET != MIRROR_INT_ARRAY_DATA_OFFSET + 4 2008 addiu $a2, $a2, (MIRROR_WIDE_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK)
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/art/runtime/arch/mips64/ |
D | quick_entrypoints_mips64.S | 1883 #if MIRROR_WIDE_ARRAY_DATA_OFFSET != MIRROR_INT_ARRAY_DATA_OFFSET + 4 1912 daddiu $a2, $a2, (MIRROR_WIDE_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK)
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/art/runtime/interpreter/mterp/out/ |
D | mterp_mips64.S | 1848 lw a2, MIRROR_WIDE_ARRAY_DATA_OFFSET(a0) 1849 lw a3, (MIRROR_WIDE_ARRAY_DATA_OFFSET+4)(a0) 2075 sw a2, MIRROR_WIDE_ARRAY_DATA_OFFSET(a0) 2077 sw a2, (MIRROR_WIDE_ARRAY_DATA_OFFSET+4)(a0) # vBB[vCC] <- a2
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D | mterp_x86_64.S | 1717 movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1720 movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %eax 1920 movq rINSTq, MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8)
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D | mterp_arm64.S | 1800 ldr x2, [x0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] // x2<- vBB[vCC] 2021 str x1, [x0, #MIRROR_WIDE_ARRAY_DATA_OFFSET]
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D | mterp_arm.S | 1849 ldrd r2, [r0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] @ r2/r3<- vBB[vCC] 2080 strd r2, [r0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] @ r2/r3<- vBB[vCC]
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D | mterp_mips.S | 2288 LOAD64_off(a2, a3, a0, MIRROR_WIDE_ARRAY_DATA_OFFSET) 2509 STORE64_off(a2, a3, a0, MIRROR_WIDE_ARRAY_DATA_OFFSET) # a2/a3 <- vBB[vCC]
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D | mterp_x86.S | 1811 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax 1982 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax
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/art/runtime/arch/x86_64/ |
D | quick_entrypoints_x86_64.S | 1243 addq MACRO_LITERAL(MIRROR_WIDE_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK), %r9
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/art/runtime/arch/arm64/ |
D | quick_entrypoints_arm64.S | 1990 add \xTemp1, \xTemp1, #(MIRROR_WIDE_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK)
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