/art/compiler/optimizing/ |
D | code_generator_mips64.cc | 2196 Location out_loc = locations->Out(); in VisitArrayGet() local 2207 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in VisitArrayGet() 2220 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in VisitArrayGet() 2233 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in VisitArrayGet() 2285 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in VisitArrayGet() 2299 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in VisitArrayGet() 2332 out_loc, in VisitArrayGet() 2339 out_loc, in VisitArrayGet() 2347 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in VisitArrayGet() 2355 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet() [all …]
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D | code_generator_arm_vixl.cc | 5941 Location out_loc, in LoadFromShiftedRegOffset() argument 5951 __ Ldrb(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset() 5954 __ Ldrsb(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset() 5957 __ Ldrh(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset() 5960 __ Ldrsh(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset() 5964 __ Ldr(cond, RegisterFrom(out_loc), mem_address); in LoadFromShiftedRegOffset() 6069 Location out_loc = locations->Out(); in VisitArrayGet() local 6101 RegisterFrom(out_loc), in VisitArrayGet() 6107 RegisterFrom(out_loc), in VisitArrayGet() 6117 GetAssembler()->LoadFromOffset(load_type, RegisterFrom(out_loc), obj, full_offset); in VisitArrayGet() [all …]
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D | code_generator_x86_64.cc | 4673 Location out_loc = locations->Out(); in VisitArrayGet() local 4680 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet() 4686 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet() 4692 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet() 4714 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet() 4720 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet() 4735 instruction, out_loc, obj, data_offset, index, /* needs_null_check */ true); in VisitArrayGet() 4737 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet() 4746 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet() 4749 instruction, out_loc, out_loc, obj_loc, data_offset, index); in VisitArrayGet() [all …]
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D | code_generator_x86.cc | 5223 Location out_loc = locations->Out(); in VisitArrayGet() local 5230 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 5236 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 5242 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 5266 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 5272 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 5287 instruction, out_loc, obj, data_offset, index, /* needs_null_check */ true); in VisitArrayGet() 5289 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 5298 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet() 5301 instruction, out_loc, out_loc, obj_loc, data_offset, index); in VisitArrayGet() [all …]
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D | code_generator_mips.cc | 2595 Location out_loc = locations->Out(); in VisitArrayGet() local 2606 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 2619 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 2632 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 2687 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 2704 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 2738 out_loc, in VisitArrayGet() 2745 out_loc, in VisitArrayGet() 2753 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet() 2761 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet() [all …]
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D | code_generator_arm64.cc | 3890 Location out_loc = locations->Out(); in VisitInstanceOf() local 3915 out_loc, in VisitInstanceOf() 3933 out_loc, in VisitInstanceOf() 3944 out_loc, in VisitInstanceOf() 3964 out_loc, in VisitInstanceOf() 3976 out_loc, in VisitInstanceOf() 3996 out_loc, in VisitInstanceOf() 4008 out_loc, in VisitInstanceOf() 4027 out_loc, in VisitInstanceOf() 4849 Location out_loc = cls->GetLocations()->Out(); in VisitLoadClass() local [all …]
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D | intrinsics_arm_vixl.cc | 516 Location out_loc = invoke->GetLocations()->Out(); in GenMinMaxFloat() local 520 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder. in GenMinMaxFloat() 602 Location out_loc = invoke->GetLocations()->Out(); in GenMinMaxDouble() local 606 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in. in GenMinMaxDouble() 668 Location out_loc = invoke->GetLocations()->Out(); in GenMinMaxLong() local 672 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder. in GenMinMaxLong() 680 vixl32::Register out_lo = LowRegisterFrom(out_loc); in GenMinMaxLong() 681 vixl32::Register out_hi = HighRegisterFrom(out_loc); in GenMinMaxLong() 1315 Location out_loc = locations->Out(); in GenCas() local 1343 out_loc, // Unused, used only as a "temporary" within the read barrier. in GenCas()
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D | code_generator_arm_vixl.h | 478 Location out_loc, 483 Location out_loc,
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D | intrinsics_x86.cc | 498 Location out_loc = locations->Out(); in GenMinMaxFP() local 499 XmmRegister out = out_loc.AsFpuRegister<XmmRegister>(); in GenMinMaxFP() 503 DCHECK(out_loc.Equals(op1_loc)); in GenMinMaxFP() 1844 Location out_loc = locations->Out(); in GenPeek() local 1849 __ movsxb(out_loc.AsRegister<Register>(), Address(address, 0)); in GenPeek() 1852 __ movsxw(out_loc.AsRegister<Register>(), Address(address, 0)); in GenPeek() 1855 __ movl(out_loc.AsRegister<Register>(), Address(address, 0)); in GenPeek() 1858 __ movl(out_loc.AsRegisterPairLow<Register>(), Address(address, 0)); in GenPeek() 1859 __ movl(out_loc.AsRegisterPairHigh<Register>(), Address(address, 4)); in GenPeek()
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D | intrinsics_x86_64.cc | 342 Location out_loc = locations->Out(); in GenMinMaxFP() local 343 XmmRegister out = out_loc.AsFpuRegister<XmmRegister>(); in GenMinMaxFP() 347 DCHECK(out_loc.Equals(op1_loc)); in GenMinMaxFP() 2414 Location out_loc = locations->Out(); in GenCAS() local 2415 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in GenCAS() 2437 out_loc, // Unused, used only as a "temporary" within the read barrier. in GenCAS()
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D | intrinsics_mips64.cc | 1480 Location out_loc = locations->Out(); in GenCas() local 1481 GpuRegister out = out_loc.AsRegister<GpuRegister>(); in GenCas() 1503 out_loc, // Unused, used only as a "temporary" within the read barrier. in GenCas()
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D | intrinsics_arm64.cc | 1181 Location out_loc = locations->Out(); in GenCas() local 1182 Register out = WRegisterFrom(out_loc); // Boolean result. in GenCas() 1206 out_loc, // Unused, used only as a "temporary" within the read barrier. in GenCas()
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D | intrinsics_mips.cc | 1912 Location out_loc = locations->Out(); in GenCas() local 1913 Register out = out_loc.AsRegister<Register>(); in GenCas() 1935 out_loc, // Unused, used only as a "temporary" within the read barrier. in GenCas()
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