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Searched refs:trg_loc (Results 1 – 4 of 4) sorted by relevance

/art/compiler/optimizing/
Dintrinsics_mips.cc1551 Location trg_loc = locations->Out(); in GenUnsafeGet() local
1567 Register trg_lo = trg_loc.AsRegisterPairLow<Register>(); in GenUnsafeGet()
1568 Register trg_hi = trg_loc.AsRegisterPairHigh<Register>(); in GenUnsafeGet()
1583 Register trg = trg_loc.AsRegister<Register>(); in GenUnsafeGet()
1597 Register trg = trg_loc.AsRegister<Register>(); in GenUnsafeGet()
1602 trg_loc, in GenUnsafeGet()
1623 trg_loc, in GenUnsafeGet()
1624 trg_loc, in GenUnsafeGet()
Dintrinsics_arm_vixl.cc963 Location trg_loc = locations->Out(); in GenUnsafeGet() local
967 vixl32::Register trg = RegisterFrom(trg_loc); in GenUnsafeGet()
976 vixl32::Register trg = RegisterFrom(trg_loc); in GenUnsafeGet()
981 invoke, trg_loc, base, 0U, offset_loc, TIMES_1, temp, /* needs_null_check */ false); in GenUnsafeGet()
990 codegen->GenerateReadBarrierSlow(invoke, trg_loc, trg_loc, base_loc, 0U, offset_loc); in GenUnsafeGet()
1003 vixl32::Register trg_lo = LowRegisterFrom(trg_loc); in GenUnsafeGet()
1004 vixl32::Register trg_hi = HighRegisterFrom(trg_loc); in GenUnsafeGet()
Dintrinsics_mips64.cc1147 Location trg_loc = locations->Out(); in GenUnsafeGet() local
1148 GpuRegister trg = trg_loc.AsRegister<GpuRegister>(); in GenUnsafeGet()
1180 trg_loc, in GenUnsafeGet()
1196 trg_loc, in GenUnsafeGet()
1197 trg_loc, in GenUnsafeGet()
Dintrinsics_arm64.cc912 Location trg_loc = locations->Out(); in GenUnsafeGet() local
913 Register trg = RegisterFrom(trg_loc, type); in GenUnsafeGet()
919 trg_loc, in GenUnsafeGet()
938 codegen->MaybeGenerateReadBarrierSlow(invoke, trg_loc, trg_loc, base_loc, 0u, offset_loc); in GenUnsafeGet()