| /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 61 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
70 << ", " << getRegisterName(MO1.getReg()); in printInst()
81 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
89 << ", " << getRegisterName(MO1.getReg()); in printInst()
226 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2LdrLabelOperand() local
227 if (MO1.isExpr()) in printT2LdrLabelOperand()
228 O << *MO1.getExpr(); in printT2LdrLabelOperand()
229 else if (MO1.isImm()) in printT2LdrLabelOperand()
230 O << "[pc, #" << MO1.getImm() << "]"; in printT2LdrLabelOperand()
242 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand() local
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 81 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
92 printRegName(O, MO1.getReg()); in printInst()
104 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
114 printRegName(O, MO1.getReg()); in printInst()
315 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand() local
316 if (MO1.isExpr()) { in printThumbLdrLabelOperand()
317 MO1.getExpr()->print(O, &MAI); in printThumbLdrLabelOperand()
323 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand()
345 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand() local
349 printRegName(O, MO1.getReg()); in printSORegRegOperand()
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| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 55 static inline bool isIdenticalOp(const MachineOperand &MO1,
60 static bool isSimilarDispOp(const MachineOperand &MO1,
181 static inline bool isIdenticalOp(const MachineOperand &MO1, in isIdenticalOp() argument
183 return MO1.isIdenticalTo(MO2) && in isIdenticalOp()
184 (!MO1.isReg() || in isIdenticalOp()
185 !TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); in isIdenticalOp()
195 static bool isSimilarDispOp(const MachineOperand &MO1, in isSimilarDispOp() argument
197 assert(isValidDispOp(MO1) && isValidDispOp(MO2) && in isSimilarDispOp()
199 return (MO1.isImm() && MO2.isImm()) || in isSimilarDispOp()
200 (MO1.isCPI() && MO2.isCPI() && MO1.getIndex() == MO2.getIndex()) || in isSimilarDispOp()
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| D | X86FloatingPoint.cpp | 1399 const MachineOperand &MO1 = MI.getOperand(1); in handleSpecialFP() local
1401 bool KillsSrc = MI.killsRegister(MO1.getReg()); in handleSpecialFP()
1405 unsigned SrcFP = getFPReg(MO1); in handleSpecialFP()
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| D | X86InstrInfo.cpp | 6452 MachineOperand &MO1 = DataMI->getOperand(1); in unfoldMemoryOperand() local
6453 if (MO1.getImm() == 0) { in unfoldMemoryOperand()
6466 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 434 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
438 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
690 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
692 unsigned Rn = getARMRegisterNumbering(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
823 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
825 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue()
894 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
897 unsigned Rm = getARMRegisterNumbering(MO1.getReg()); in getLdStSORegOpValue()
940 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
941 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86CodeEmitter.cpp | 826 const MachineOperand &MO1 = MI.getOperand(CurOp++); in emitInstruction() local
828 if (MO1.isImm()) { in emitInstruction()
829 emitConstant(MO1.getImm(), Size); in emitInstruction()
840 if (MO1.isGlobal()) { in emitInstruction()
841 bool Indirect = gvNeedsNonLazyPtr(MO1, TM); in emitInstruction()
842 emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0, in emitInstruction()
844 } else if (MO1.isSymbol()) in emitInstruction()
845 emitExternalSymbolAddress(MO1.getSymbolName(), rt); in emitInstruction()
846 else if (MO1.isCPI()) in emitInstruction()
847 emitConstPoolAddress(MO1.getIndex(), rt); in emitInstruction()
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| D | X86FloatingPoint.cpp | 1320 const MachineOperand &MO1 = MI->getOperand(1); in handleSpecialFP() local
1323 unsigned SrcST = MO1.getReg() - X86::ST0; in handleSpecialFP()
1324 bool KillsSrc = MI->killsRegister(MO1.getReg()); in handleSpecialFP()
1328 unsigned SrcFP = getFPReg(MO1); in handleSpecialFP()
1381 unsigned SrcFP = getFPReg(MO1); in handleSpecialFP()
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| D | X86InstrInfo.cpp | 2973 MachineOperand &MO1 = DataMI->getOperand(1); in unfoldMemoryOperand() local
2974 if (MO1.getImm() == 0) { in unfoldMemoryOperand()
2986 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 555 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
559 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
863 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
865 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
1003 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
1005 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue()
1070 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
1073 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue()
1107 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
1108 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue()
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| /external/capstone/arch/ARM/ |
| D | ARMInstPrinter.c | 445 MCOperand *MO1 = MCInst_getOperand(MI, 1); in ARM_printInst() local
462 printRegName(MI->csh, O, MCOperand_getReg(MO1)); in ARM_printInst()
466 …->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); in ARM_printInst()
484 MCOperand *MO1 = MCInst_getOperand(MI, 1); in ARM_printInst() local
500 printRegName(MI->csh, O, MCOperand_getReg(MO1)); in ARM_printInst()
503 …->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); in ARM_printInst()
795 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); in printThumbLdrLabelOperand() local
800 OffImm = (int32_t)MCOperand_getImm(MO1); in printThumbLdrLabelOperand()
834 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); in printSORegRegOperand() local
839 printRegName(MI->csh, O, MCOperand_getReg(MO1)); in printSORegRegOperand()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 837 const MachineOperand &MO1 = MI.getOperand(1); in expandMI() local
838 unsigned Flags = MO1.getTargetFlags(); in expandMI()
846 if (MO1.isGlobal()) { in expandMI()
847 MIB1.addGlobalAddress(MO1.getGlobal(), 0, Flags | AArch64II::MO_PAGE); in expandMI()
848 MIB2.addGlobalAddress(MO1.getGlobal(), 0, in expandMI()
850 } else if (MO1.isSymbol()) { in expandMI()
851 MIB1.addExternalSymbol(MO1.getSymbolName(), Flags | AArch64II::MO_PAGE); in expandMI()
852 MIB2.addExternalSymbol(MO1.getSymbolName(), in expandMI()
855 assert(MO1.isCPI() && in expandMI()
857 MIB1.addConstantPoolIndex(MO1.getIndex(), MO1.getOffset(), in expandMI()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 250 const MachineOperand &MO1 = MI.getOperand(Op + 1); in getAddrModeImm12OpValue() local
256 int32_t Imm12 = MO1.getImm(); in getAddrModeImm12OpValue()
292 const MachineOperand &MO1 = MI.getOperand(Op + 1); in getAddrMode5OpValue() local
298 int32_t Imm12 = MO1.getImm(); in getAddrMode5OpValue()
686 const MachineOperand &MO1 = MI.getOperand(1); in emitMOVi32immInstruction() local
691 unsigned Lo16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movw) & 0xFFFF; in emitMOVi32immInstruction()
704 unsigned Hi16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movt) >> 16; in emitMOVi32immInstruction()
722 const MachineOperand &MO1 = MI.getOperand(1); in emitMOVi2piecesInstruction() local
723 assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1.getImm()) && in emitMOVi2piecesInstruction()
725 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm()); in emitMOVi2piecesInstruction()
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| D | ARMExpandPseudoInsts.cpp | 923 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
924 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
925 unsigned TF = MO1.getTargetFlags(); in ExpandMI()
939 .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) in ExpandMI()
944 .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) in ExpandMI()
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| D | ARMBaseInstrInfo.cpp | 1182 const MachineOperand &MO1 = MI1->getOperand(1); in produceSameValue() local
1183 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1192 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1197 int CPI1 = MO1.getIndex(); in produceSameValue()
1238 const MachineOperand &MO1 = MI1->getOperand(i); in produceSameValue() local
1239 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
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| D | ARMAsmPrinter.cpp | 906 const MachineOperand &MO1 = MI->getOperand(OpNum); in EmitJumpTable() local
908 unsigned JTI = MO1.getIndex(); in EmitJumpTable()
950 const MachineOperand &MO1 = MI->getOperand(OpNum); in EmitJump2Table() local
952 unsigned JTI = MO1.getIndex(); in EmitJump2Table()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ProcessImplicitDefs.cpp | 66 MachineOperand &MO1 = MI->getOperand(1); in isUndefCopy() local
67 if (MO1.getReg() != Reg) in isUndefCopy()
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 249 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getAddSubImmOpValue() local
250 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
252 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 412 MCOperand &MO1 = MappedInst.getOperand(1); in HexagonProcessInstruction() local
413 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction()
414 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::subreg_loreg); in HexagonProcessInstruction()
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1178 const MCOperand MO1 = MI->getOperand(OpNum + 1); in printAMIndexedWB() local
1180 if (MO1.isImm()) { in printAMIndexedWB()
1181 O << ", #" << formatImm(MO1.getImm() * Scale); in printAMIndexedWB()
1183 assert(MO1.isExpr() && "Unexpected operand type!"); in printAMIndexedWB()
1185 MO1.getExpr()->print(O, &MAI); in printAMIndexedWB()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 1272 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
1273 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
1325 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
1326 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
1327 unsigned TF = MO1.getTargetFlags(); in ExpandMI()
1338 .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) in ExpandMI()
1343 .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) in ExpandMI()
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| D | ARMAsmPrinter.cpp | 1009 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableAddrs() local
1010 unsigned JTI = MO1.getIndex(); in EmitJumpTableAddrs()
1056 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableInsts() local
1057 unsigned JTI = MO1.getIndex(); in EmitJumpTableInsts()
1082 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableTBInst() local
1083 unsigned JTI = MO1.getIndex(); in EmitJumpTableTBInst()
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| D | ARMBaseInstrInfo.cpp | 1470 const MachineOperand &MO1 = MI1.getOperand(1); in produceSameValue() local
1471 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1481 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1486 int CPI1 = MO1.getIndex(); in produceSameValue()
1527 const MachineOperand &MO1 = MI1.getOperand(i); in produceSameValue() local
1528 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
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| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 1461 MCOperand &MO1, MCOperand &MO2) { in makeCombineInst() argument
1465 TmpInst.addOperand(MO1); in makeCombineInst()
1808 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1816 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction()
1823 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1825 if (MO1.getExpr()->evaluateAsAbsolute(Value)) { in processInstruction()
1831 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); in processInstruction()
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1840 machine operand, ``MO1``, is extracted. The helper methods such as
1853 const MachineOperand &MO1 = MI.getOperand(CurOp++);
1855 if (MO1.isImmediate())
1856 emitConstant(MO1.getImm(), Size);
1862 if (MO1.isGlobalAddress()) {
1863 bool NeedStub = isa<Function>(MO1.getGlobal());
1864 bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
1865 emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
1867 } else if (MO1.isExternalSymbol())
1868 emitExternalSymbolAddress(MO1.getSymbolName(), rt);
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