/external/llvm/lib/Target/XCore/ |
D | XCoreISelDAGToDAG.cpp | 153 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in Select() local 154 MemOp[0] = in Select() 157 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1); in Select()
|
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreISelDAGToDAG.cpp | 175 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in Select() local 176 MemOp[0] = MF->getMachineMemOperand( in Select() 178 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1); in Select()
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1655 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectVLD() local 1656 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectVLD() 1657 cast<MachineSDNode>(VLd)->setMemRefs(MemOp, MemOp + 1); in SelectVLD() 1688 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectVST() local 1689 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectVST() 1767 cast<MachineSDNode>(VSt)->setMemRefs(MemOp, MemOp + 1); in SelectVST() 1790 cast<MachineSDNode>(VStA)->setMemRefs(MemOp, MemOp + 1); in SelectVST() 1809 cast<MachineSDNode>(VStB)->setMemRefs(MemOp, MemOp + 1); in SelectVST() 1826 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectVLDSTLane() local 1827 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectVLDSTLane() [all …]
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 301 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectIndexedLoad() local 302 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoad() 333 L->setMemRefs(MemOp, MemOp+1); in SelectIndexedLoad() 344 L->setMemRefs(MemOp, MemOp+1); in SelectIndexedLoad() 595 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectIndexedStore() local 596 MemOp[0] = ST->getMemOperand(); in SelectIndexedStore() 607 S->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore() 614 S->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1920 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectVLD() local 1921 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectVLD() 1922 cast<MachineSDNode>(VLd)->setMemRefs(MemOp, MemOp + 1); in SelectVLD() 1957 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectVST() local 1958 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectVST() 2045 cast<MachineSDNode>(VSt)->setMemRefs(MemOp, MemOp + 1); in SelectVST() 2069 cast<MachineSDNode>(VStA)->setMemRefs(MemOp, MemOp + 1); in SelectVST() 2088 cast<MachineSDNode>(VStB)->setMemRefs(MemOp, MemOp + 1); in SelectVST() 2105 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectVLDSTLane() local 2106 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectVLDSTLane() [all …]
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1334 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectAtomic64() local 1335 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomic64() 1340 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); in SelectAtomic64() 1479 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectAtomicLoadAdd() local 1480 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadAdd() 1484 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadAdd() 1490 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadAdd() 1641 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectAtomicLoadArith() local 1642 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadArith() 1645 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadArith()
|
D | X86InstrInfo.h | 149 unsigned RegOp, unsigned MemOp, unsigned Flags);
|
D | X86InstrInfo.cpp | 264 unsigned MemOp = OpTbl2Addr[i][1]; in X86InstrInfo() local 267 RegOp, MemOp, in X86InstrInfo() 374 unsigned MemOp = OpTbl0[i][1]; in X86InstrInfo() local 377 RegOp, MemOp, TB_INDEX_0 | Flags); in X86InstrInfo() 534 unsigned MemOp = OpTbl1[i][1]; in X86InstrInfo() local 537 RegOp, MemOp, in X86InstrInfo() 895 unsigned MemOp = OpTbl2[i][1]; in X86InstrInfo() local 898 RegOp, MemOp, in X86InstrInfo() 907 unsigned RegOp, unsigned MemOp, unsigned Flags) { in AddTableEntry() argument 910 R2MTable[RegOp] = std::make_pair(MemOp, Flags); in AddTableEntry() [all …]
|
/external/llvm/lib/CodeGen/ |
D | MachineLICM.cpp | 337 for (const MachineMemOperand *MemOp : MI->memoperands()) { in InstructionStoresToFI() local 338 if (!MemOp->isStore() || !MemOp->getPseudoValue()) in InstructionStoresToFI() 341 dyn_cast<FixedStackPseudoSourceValue>(MemOp->getPseudoValue())) { in InstructionStoresToFI() 847 for (MachineMemOperand *MemOp : MI.memoperands()) in mayLoadFromGOTOrConstantPool() 848 if (const PseudoSourceValue *PSV = MemOp->getPseudoValue()) in mayLoadFromGOTOrConstantPool()
|
D | RegAllocGreedy.cpp | 560 static unsigned MemOp = 0; in enqueue() local 561 Prio = MemOp++; in enqueue()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1376 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectStoreLane() local 1377 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectStoreLane() 1378 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in SelectStoreLane() 1411 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectPostStoreLane() local 1412 MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand(); in SelectPostStoreLane() 1413 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in SelectPostStoreLane() 2546 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in SelectCMP_SWAP() local 2547 MemOp[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectCMP_SWAP() 2548 cast<MachineSDNode>(CmpSwap)->setMemRefs(MemOp, MemOp + 1); in SelectCMP_SWAP() 2715 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in Select() local [all …]
|
/external/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 70 X86MemOperand MemOp = !cast<X86MemOperand>(TypeVariantName # Size # "mem"); 446 (ins To.RC:$src1, From.MemOp:$src2, i32u8imm:$src3), 583 (ins To.MemOp:$dst, From.RC:$src1, i32u8imm:$idx), 592 (ins To.MemOp:$dst, To.KRCWM:$mask, 964 (ins _Src.MemOp:$src), OpcodeStr, "$src", "$src", 1085 (ins _.RC:$src2, _.MemOp:$src3), 1164 (ins IdxVT.RC:$src2, _.MemOp:$src3), 1258 (ins _.RC:$src1, _.MemOp:$src2), 1263 (ins _.KRCWM:$mask, _.RC:$src1, _.MemOp:$src2), 1272 (ins _.KRCWM:$mask, _.RC:$src1, _.MemOp:$src2), [all …]
|
D | X86ISelDAGToDAG.cpp | 2248 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in Select() local 2249 MemOp[0] = LoadNode->getMemOperand(); in Select() 2250 CNode->setMemRefs(MemOp, MemOp + 1); in Select() 2674 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(2); in Select() local 2675 MemOp[0] = StoreNode->getMemOperand(); in Select() 2676 MemOp[1] = LoadNode->getMemOperand(); in Select() 2683 Result->setMemRefs(MemOp, MemOp + 2); in Select()
|
D | X86InstrInfo.h | 165 uint16_t RegOp, uint16_t MemOp, uint16_t Flags);
|
D | X86InstrInfo.cpp | 108 uint16_t MemOp; member 289 Entry.RegOp, Entry.MemOp, in X86InstrInfo() 444 Entry.RegOp, Entry.MemOp, TB_INDEX_0 | Entry.Flags); in X86InstrInfo() 881 Entry.RegOp, Entry.MemOp, in X86InstrInfo() 1754 Entry.RegOp, Entry.MemOp, in X86InstrInfo() 1991 Entry.RegOp, Entry.MemOp, in X86InstrInfo() 2040 Entry.RegOp, Entry.MemOp, in X86InstrInfo() 2049 uint16_t RegOp, uint16_t MemOp, uint16_t Flags) { in AddTableEntry() argument 2052 R2MTable[RegOp] = std::make_pair(MemOp, Flags); in AddTableEntry() 2055 assert(!M2RTable.count(MemOp) && in AddTableEntry() [all …]
|
/external/llvm/lib/Target/X86/AsmParser/ |
D | X86Operand.h | 52 struct MemOp { struct 66 struct MemOp Mem;
|
D | X86AsmInstrumentation.cpp | 418 X86Operand &MemOp = static_cast<X86Operand &>(Op); in InstrumentMOV() local 423 RegCtx.AddBusyRegs(MemOp); in InstrumentMOV() 425 InstrumentMemOperand(MemOp, AccessSize, IsWrite, RegCtx, Ctx, Out); in InstrumentMOV()
|
/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 615 SDValue MemOp; in LowerCCCCallTo() local 620 MemOp = DAG.getMemcpy(Chain, dl, PtrOff, Arg, SizeNode, in LowerCCCCallTo() 628 MemOp = DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo(), in LowerCCCCallTo() 632 MemOpChains.push_back(MemOp); in LowerCCCCallTo()
|
/external/llvm/lib/Target/SystemZ/AsmParser/ |
D | SystemZAsmParser.cpp | 95 struct MemOp { struct in __anonbed2cedd0111::SystemZOperand 117 MemOp Mem;
|
/external/llvm/lib/Target/Lanai/AsmParser/ |
D | LanaiAsmParser.cpp | 113 struct MemOp { struct 124 struct MemOp Mem;
|
/external/llvm/lib/CodeGen/MIRParser/ |
D | MIParser.cpp | 641 MachineMemOperand *MemOp = nullptr; in parse() local 642 if (parseMachineMemoryOperand(MemOp)) in parse() 644 MemOperands.push_back(MemOp); in parse()
|
/external/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 210 struct MemOp { struct in __anoncfa315510111::SparcOperand 220 struct MemOp Mem;
|
/external/llvm/include/llvm/Target/ |
D | TargetInstrInfo.h | 1021 virtual bool getMemOpBaseRegImmOfs(MachineInstr &MemOp, unsigned &BaseReg, in getMemOpBaseRegImmOfs() argument
|
/external/swiftshader/third_party/subzero/src/ |
D | IceInstX86Base.h | 671 if (auto *MemOp = llvm::dyn_cast<X86OperandMem>(this->getSrc(0))) { in deoptLeaToAddOrNull() local 673 MemOp->getBase()->getRegNum() == this->getDest()->getRegNum() && in deoptLeaToAddOrNull() 674 MemOp->getIndex() == nullptr && MemOp->getShift() == 0) { in deoptLeaToAddOrNull() 676 const_cast<Cfg *>(Func), this->getDest(), MemOp->getOffset()); in deoptLeaToAddOrNull()
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 2414 MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); in transferMemOperands() local 2415 MemOp[0] = cast<MemSDNode>(N)->getMemOperand(); in transferMemOperands() 2416 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in transferMemOperands()
|