Home
last modified time | relevance | path

Searched refs:N0 (Results 1 – 25 of 209) sorted by relevance

123456789

/external/clang/test/CXX/temp/temp.spec/temp.expl.spec/
Dp2.cpp21 namespace N0 { namespace
39 template<> void N0::f0(int) { } // okay in f0()
42 template<> void N0::f0(long) { } // expected-error{{does not enclose namespace}} in f0()
45 template<> void N0::f0(double);
50 template<> void N0::f0(double) { } in f0()
59 namespace N0 { namespace
101 void N0::X0<T>::ft1(T t, U u) { in ft1()
105 template<typename T> T N0::X0<T>::member;
107 template<> struct N0::X0<void> { };
111 N0::X0<void> test_X0;
[all …]
Dp2-0x.cpp20 namespace N0 { namespace
35 template<> void N0::f0(int) { } // okay in f0()
38 template<> void N0::f0(long) { } // expected-error{{does not enclose namespace}} in f0()
41 template<> void N0::f0(double) { } in f0()
50 namespace N0 { namespace
74 void N0::X0<T>::ft1(T t, U u) { in ft1()
78 template<typename T> T N0::X0<T>::member;
80 template<> struct N0::X0<void> { };
81 N0::X0<void> test_X0;
84 …template<> struct N0::X0<const void> { }; // expected-error{{class template specialization of 'X0'…
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp230 SDValue SimplifySelect(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2);
231 SDValue SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2,
234 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
242 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
244 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
525 SDValue N0, N1, N2; in isOneUseSetCC() local
526 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) in isOneUseSetCC()
532 SDValue N0, SDValue N1) { in ReassociateOps() argument
533 EVT VT = N0.getValueType(); in ReassociateOps()
534 if (N0.getOpcode() == Opc && isa<ConstantSDNode>(N0.getOperand(1))) { in ReassociateOps()
[all …]
DTargetLowering.cpp1908 TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, in SimplifySetCC() argument
1924 if (isa<ConstantSDNode>(N0.getNode())) in SimplifySetCC()
1925 return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond)); in SimplifySetCC()
1933 if (N0.getOpcode() == ISD::SRL && (C1 == 0 || C1 == 1) && in SimplifySetCC()
1934 N0.getOperand(0).getOpcode() == ISD::CTLZ && in SimplifySetCC()
1935 N0.getOperand(1).getOpcode() == ISD::Constant) { in SimplifySetCC()
1937 = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); in SimplifySetCC()
1939 ShAmt == Log2_32(N0.getValueType().getSizeInBits())) { in SimplifySetCC()
1949 SDValue Zero = DAG.getConstant(0, N0.getValueType()); in SimplifySetCC()
1950 return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0), in SimplifySetCC()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp252 SDValue visitANDLike(SDValue N0, SDValue N1, SDNode *LocReference);
254 SDValue visitORLike(SDValue N0, SDValue N1, SDNode *LocReference);
339 SDValue SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2);
340 SDValue SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1,
343 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
367 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
369 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
762 SDValue N0, N1, N2; in isOneUseSetCC() local
763 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) in isOneUseSetCC()
816 SDValue DAGCombiner::ReassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, in ReassociateOps() argument
[all …]
DTargetLowering.cpp1281 SDValue TargetLowering::simplifySetCCWithAnd(EVT VT, SDValue N0, SDValue N1, in simplifySetCCWithAnd() argument
1288 if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND) in simplifySetCCWithAnd()
1289 std::swap(N0, N1); in simplifySetCCWithAnd()
1291 EVT OpVT = N0.getValueType(); in simplifySetCCWithAnd()
1292 if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() || in simplifySetCCWithAnd()
1297 if (N0.getOperand(0) == N1) { in simplifySetCCWithAnd()
1298 X = N0.getOperand(1); in simplifySetCCWithAnd()
1299 Y = N0.getOperand(0); in simplifySetCCWithAnd()
1300 } else if (N0.getOperand(1) == N1) { in simplifySetCCWithAnd()
1301 X = N0.getOperand(0); in simplifySetCCWithAnd()
[all …]
/external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/
DStringSwitch.h105 template<unsigned N0, unsigned N1>
107 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
112 template<unsigned N0, unsigned N1, unsigned N2>
114 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
119 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3>
121 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
127 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4>
129 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
135 template <unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4,
138 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
[all …]
/external/llvm/include/llvm/ADT/
DStringSwitch.h89 template<unsigned N0, unsigned N1>
91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
94 (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || in Cases()
102 template<unsigned N0, unsigned N1, unsigned N2>
104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
107 (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || in Cases()
116 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3>
118 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
122 (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || in Cases()
132 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4>
[all …]
/external/llvm/unittests/Transforms/Utils/
DValueMapperTest.cpp76 MDNode *N0; // !0 = !{!1} in TEST() local
83 N0 = MDNode::replaceWithUniqued(std::move(T0)); in TEST()
87 ASSERT_FALSE(N0->isResolved()); in TEST()
89 N0->resolveCycles(); in TEST()
90 ASSERT_TRUE(N0->isResolved()); in TEST()
97 MDNode *MappedN0 = ValueMapper(VM).mapMDNode(*N0); in TEST()
99 EXPECT_NE(N0, MappedN0); in TEST()
202 auto *N0 = MDTuple::get(C, None); in TEST() local
203 auto *N1 = MDTuple::get(C, N0); in TEST()
208 EXPECT_EQ(N0, ValueMapper(VM).mapMetadata(*N0)); in TEST()
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/ADT/
DStringSwitch.h84 template<unsigned N0, unsigned N1>
85 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
90 template<unsigned N0, unsigned N1, unsigned N2>
91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
96 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3>
97 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
103 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4>
104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
/external/llvm/unittests/IR/
DMDBuilderTest.cpp85 MDNode *N0 = MDHelper.createTBAANode("Node", R); in TEST_F() local
89 EXPECT_EQ(N0, N3); in TEST_F()
90 EXPECT_NE(N0, N1); in TEST_F()
91 EXPECT_NE(N0, N2); in TEST_F()
92 EXPECT_GE(N0->getNumOperands(), 2U); in TEST_F()
95 EXPECT_TRUE(isa<MDString>(N0->getOperand(0))); in TEST_F()
98 EXPECT_EQ(cast<MDString>(N0->getOperand(0))->getString(), "Node"); in TEST_F()
101 EXPECT_EQ(N0->getOperand(1), R); in TEST_F()
/external/boringssl/src/crypto/fipsmodule/bn/asm/
Darmv4-mont.pl296 my ($N0,$N1,$N2,$N3)=map("d$_",(4..7));
345 vld1.32 {$N0-$N3}, [$nptr]!
351 vmlal.u32 @ACC[0],$Ni,${N0}[0]
353 vmlal.u32 @ACC[1],$Ni,${N0}[1]
400 vmlal.u32 @ACC[0],$Ni,${N0}[0]
401 vmlal.u32 @ACC[1],$Ni,${N0}[1]
473 vld1.32 {$N0-$N3},[$nptr]!
493 vmlal.u32 @ACC[0],$Ni,${N0}[0]
495 vmlal.u32 @ACC[1],$Ni,${N0}[1]
530 vmlal.u32 @ACC[0],$Ni,${N0}[0]
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelDAGToDAG.cpp619 SDValue N0 = N.getOperand(0); in MatchWrapper() local
632 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
640 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
649 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
652 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper()
656 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper()
657 AM.SymbolFlags = cast<BlockAddressSDNode>(N0)->getTargetFlags(); in MatchWrapper()
671 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
675 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
680 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp746 SDValue N0 = N.getOperand(0); in matchWrapper() local
759 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in matchWrapper()
767 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in matchWrapper()
776 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in matchWrapper()
779 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) { in matchWrapper()
781 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in matchWrapper()
784 } else if (BlockAddressSDNode *BA = dyn_cast<BlockAddressSDNode>(N0)) { in matchWrapper()
807 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in matchWrapper()
811 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in matchWrapper()
816 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in matchWrapper()
[all …]
/external/libopus/celt/
Dbands.c275 int N0; in anti_collapse() local
283 N0 = m->eBands[i+1]-m->eBands[i]; in anti_collapse()
293 t = N0<<LM; in anti_collapse()
300 sqrt_1 = celt_rsqrt(N0<<LM); in anti_collapse()
349 for (j=0;j<N0;j++) in anti_collapse()
359 renormalise_vector(X, N0<<LM, Q15ONE, arch); in anti_collapse()
483 int i, c, N0; in spreading_decision() local
491 N0 = M*m->shortMdctSize; in spreading_decision()
500 const celt_norm * OPUS_RESTRICT x = X+M*eBands[i]+c*N0; in spreading_decision()
583 static void deinterleave_hadamard(celt_norm *X, int N0, int stride, int hadamard) in deinterleave_hadamard() argument
[all …]
Drate.c150 int N0; in compute_pulse_cache() local
152 N0 = m->eBands[j+1]-m->eBands[j]; in compute_pulse_cache()
154 if (N0<<i == 1) in compute_pulse_cache()
170 if (N0 > 2) in compute_pulse_cache()
172 N0>>=1; in compute_pulse_cache()
176 else if (N0 <= 1) in compute_pulse_cache()
179 N0<<=LM0; in compute_pulse_cache()
186 N = N0; in compute_pulse_cache()
437 int N0, N, den; in interp_bits2pulses() local
443 N0 = m->eBands[j+1]-m->eBands[j]; in interp_bits2pulses()
[all …]
Dvq.c142 int N0; in extract_collapse_mask() local
148 N0 = celt_udiv(N, B); in extract_collapse_mask()
154 tmp |= iy[i*N0+j]; in extract_collapse_mask()
155 } while (++j<N0); in extract_collapse_mask()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp660 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset() local
663 if (isDSOffsetLegal(N0, C1->getSExtValue(), 16)) { in SelectDS1Addr1Offset()
665 Base = N0; in SelectDS1Addr1Offset()
724 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned() local
730 if (isDSOffsetLegal(N0, DWordOffset1, 8)) { in SelectDS64Bit4ByteAligned()
731 Base = N0; in SelectDS64Bit4ByteAligned()
816 SDValue N0 = Addr.getOperand(0); in SelectMUBUF() local
820 if (N0.getOpcode() == ISD::ADD) { in SelectMUBUF()
822 SDValue N2 = N0.getOperand(0); in SelectMUBUF()
823 SDValue N3 = N0.getOperand(1); in SelectMUBUF()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp4602 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local
4604 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubSExt()
4605 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt()
4613 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local
4615 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubZExt()
4616 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); in isAddSubZExt()
4626 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local
4630 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL()
4635 bool isN0ZExt = isZeroExtended(N0, DAG); in LowerMUL()
4642 if (isN1SExt && isAddSubSExt(N0, DAG)) { in LowerMUL()
[all …]
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp140 SDValue N0 = N.getOperand(0); in MatchWrapper() local
142 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
146 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
151 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
154 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper()
158 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper()
/external/llvm/test/CodeGen/AArch64/
Darm64-2013-01-13-ffast-fcmp.ll15 define <4 x i32> @_Z9example25v( <4 x float> %N0, <4 x float> %N1) {
16 %A = fcmp olt <4 x float> %N0, %N1
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp145 SDValue N0 = N.getOperand(0); in MatchWrapper() local
147 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
151 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
156 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
159 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper()
163 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp4707 SDValue N0 = DAG.getNode(ISD::BITCAST, DL, VT8Bit, N->getOperand(0)); in getCTPOP16BitCounts() local
4708 SDValue N1 = DAG.getNode(ISD::CTPOP, DL, VT8Bit, N0); in getCTPOP16BitCounts()
4767 SDValue N0 = DAG.getNode(ARMISD::VREV32, DL, VT16Bit, Counts16); in lowerCTPOP32BitElements() local
4768 SDValue N1 = DAG.getNode(ISD::ADD, DL, VT16Bit, Counts16, N0); in lowerCTPOP32BitElements()
6616 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local
6618 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubSExt()
6619 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt()
6627 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local
6629 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubZExt()
6630 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); in isAddSubZExt()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreISelLowering.cpp596 SDValue N0 = Op.getOperand(0); in isADDADDMUL() local
600 if (N0.getOpcode() == ISD::ADD) { in isADDADDMUL()
601 AddOp = N0; in isADDADDMUL()
605 OtherOp = N0; in isADDADDMUL()
1331 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
1334 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0); in PerformDAGCombine()
1336 EVT VT = N0.getValueType(); in PerformDAGCombine()
1340 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); in PerformDAGCombine()
1360 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2); in PerformDAGCombine()
1368 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
[all …]
/external/clang/test/CXX/basic/basic.lookup/basic.lookup.unqual/
Dp3.cpp6 namespace N0 { namespace

123456789