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Searched refs:Outs (Results 1 – 25 of 90) sorted by relevance

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/external/llvm/lib/Target/Mips/
DMipsCCState.h38 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
43 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
73 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
77 PreAnalyzeCallOperands(Outs, FuncArgs, CallNode); in AnalyzeCallOperands()
78 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
87 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
89 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
110 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
112 PreAnalyzeReturnForF128(Outs); in AnalyzeReturn()
113 CCState::AnalyzeReturn(Outs, Fn); in AnalyzeReturn()
DMipsCCState.cpp87 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128() argument
89 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForF128()
100 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands() argument
103 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeCallOperands()
105 originalTypeIsF128(FuncArgs[Outs[i].OrigArgIndex].Ty, CallNode)); in PreAnalyzeCallOperands()
107 FuncArgs[Outs[i].OrigArgIndex].Ty->isFloatingPointTy()); in PreAnalyzeCallOperands()
108 CallOperandIsFixed.push_back(Outs[i].IsFixed); in PreAnalyzeCallOperands()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DCallingConvLower.cpp88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
91 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
92 MVT VT = Outs[i].VT; in CheckReturn()
93 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
105 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
106 MVT VT = Outs[i].VT; in AnalyzeReturn()
107 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
122 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h59 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
63 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
64 ArgIsFixed.push_back(Outs[i].IsFixed); in AnalyzeCallOperands()
67 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
68 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
70 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
75 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
/external/llvm/lib/CodeGen/
DCallingConvLower.cpp89 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
92 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
93 MVT VT = Outs[i].VT; in CheckReturn()
94 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
103 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
106 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
107 MVT VT = Outs[i].VT; in AnalyzeReturn()
108 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
121 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
123 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXISelLowering.cpp261 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
271 assert(Outs.size() == 0 && "Kernel must return void."); in LowerReturn()
274 assert(Outs.size() <= 1 && "Can at most return one value."); in LowerReturn()
286 assert(Outs.size() < 2 && "Device functions can return at most one value"); in LowerReturn()
288 if (Outs.size() == 1) { in LowerReturn()
298 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in LowerReturn()
299 EVT RegVT = Outs[i].VT; in LowerReturn()
348 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall() argument
363 Ops.resize(Outs.size() + Ins.size() + 4); in LowerCall()
DPTXISelLowering.h61 const SmallVectorImpl<ISD::OutputArg> &Outs,
70 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm/lib/Target/PowerPC/
DPPCCCState.cpp18 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands() argument
19 for (const auto &I : Outs) { in PreAnalyzeCallOperands()
DPPCISelLowering.h789 const SmallVectorImpl<ISD::OutputArg> &Outs,
864 const SmallVectorImpl<ISD::OutputArg> &Outs,
868 const SmallVectorImpl<ISD::OutputArg> &Outs,
897 const SmallVectorImpl<ISD::OutputArg> &Outs,
906 const SmallVectorImpl<ISD::OutputArg> &Outs,
915 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelLowering.h97 const SmallVectorImpl<ISD::OutputArg> &Outs,
126 const SmallVectorImpl<ISD::OutputArg> &Outs,
135 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.h442 const SmallVectorImpl<ISD::OutputArg> &Outs,
451 const SmallVectorImpl<ISD::OutputArg> &Outs,
457 const SmallVectorImpl<ISD::OutputArg> &Outs,
477 const SmallVectorImpl<ISD::OutputArg> &Outs,
485 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp308 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
310 for (unsigned i = 0; i < Outs.size(); ++i) { in LowerCall()
311 const ISD::OutputArg &Out = Outs[i]; in LowerCall()
435 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn() argument
438 return Outs.size() <= 1; in CanLowerReturn()
443 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
446 assert(Outs.size() <= 1 && "WebAssembly can only return up to one value"); in LowerReturn()
455 for (const ISD::OutputArg &Out : Outs) { in LowerReturn()
DWebAssemblyISelLowering.h67 const SmallVectorImpl<ISD::OutputArg> &Outs,
70 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelLowering.h128 const SmallVectorImpl<ISD::OutputArg> &Outs,
157 const SmallVectorImpl<ISD::OutputArg> &Outs,
166 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinISelLowering.h68 const SmallVectorImpl<ISD::OutputArg> &Outs,
77 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcISelLowering.h83 const SmallVectorImpl<ISD::OutputArg> &Outs,
92 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreISelLowering.h120 const SmallVectorImpl<ISD::OutputArg> &Outs,
181 const SmallVectorImpl<ISD::OutputArg> &Outs,
190 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/clang/soong/
Dtblgen.go48 Outs []string member
73 for _, o := range t.properties.Outs {
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaISelLowering.h127 const SmallVectorImpl<ISD::OutputArg> &Outs,
136 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.h155 const SmallVectorImpl<ISD::OutputArg> &Outs,
160 const SmallVectorImpl<ISD::OutputArg> &Outs,
165 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm/soong/
Dtblgen.go48 Outs []string member
72 for _, o := range t.properties.Outs {
/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp219 auto &Outs = CLI.Outs; in LowerCall() local
244 CCInfo.AnalyzeCallOperands(Outs, CC_BPF64); in LowerCall()
248 if (Outs.size() > MaxArgs) in LowerCall()
251 for (auto &Arg : Outs) { in LowerCall()
347 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
365 CCInfo.AnalyzeReturn(Outs, RetCC_BPF64); in LowerReturn()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp261 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeVarArgs() argument
262 State.AnalyzeCallOperands(Outs, CC_MSP430_AssignStack); in AnalyzeVarArgs()
346 const SmallVectorImpl<ISD::OutputArg> &Outs) { in AnalyzeRetResult() argument
347 State.AnalyzeReturn(Outs, RetCC_MSP430); in AnalyzeRetResult()
384 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
402 Outs, OutVals, Ins, dl, DAG, InVals); in LowerCall()
507 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
515 if (CallConv == CallingConv::MSP430_INTR && !Outs.empty()) in LowerReturn()
523 AnalyzeReturnValues(CCInfo, RVLocs, Outs); in LowerReturn()
559 bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCCCCallTo() argument
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeISelLowering.h138 const SmallVectorImpl<ISD::OutputArg> &Outs,
147 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelLowering.h166 const SmallVectorImpl<ISD::OutputArg> &Outs,
175 const SmallVectorImpl<ISD::OutputArg> &Outs,

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