/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | Analysis.cpp | 158 case FCmpInst::FCMP_OLT: FOC = ISD::SETLT; FPC = ISD::SETOLT; break; in getFCmpCondCode() 166 case FCmpInst::FCMP_ULT: FOC = ISD::SETLT; FPC = ISD::SETULT; break; in getFCmpCondCode() 192 case ICmpInst::ICMP_SLT: return ISD::SETLT; in getICmpCondCode()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 735 SETLT, // 1 X 1 0 0 True if less than enumerator 746 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 873 SETLT, // 1 X 1 0 0 True if less than enumerator 884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonSelectCCInfo.td | 43 IntRegs:$fval, SETLT)), 113 DoubleRegs:$fval, SETLT)),
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 557 case ISD::SETLT: return PPC::PRED_LT; in getPredicateForSetCC() 584 case ISD::SETLT: return 0; // Bit #0 = SETOLT in getCRIdxForSetCC() 637 case ISD::SETLT: { in SelectSETCC() 670 case ISD::SETLT: { in SelectSETCC()
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 188 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN() 207 case ICmpInst::ICMP_SLT: return ISD::SETLT; in getICmpCondCode()
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D | TargetLoweringBase.cpp | 775 CCs[RTLIB::OLT_F32] = ISD::SETLT; in InitCmpLibcallCCs() 776 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs() 777 CCs[RTLIB::OLT_F128] = ISD::SETLT; in InitCmpLibcallCCs() 778 CCs[RTLIB::OLT_PPCF128] = ISD::SETLT; in InitCmpLibcallCCs()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrInteger.td | 46 defm LT_S : ComparisonInt<SETLT, "lt_s">;
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 531 CCs[RTLIB::OLT_F32] = ISD::SETLT; in InitCmpLibcallCCs() 532 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs() 2092 case ISD::SETLT: in SimplifySetCC() 2252 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); in SimplifySetCC() 2255 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal) in SimplifySetCC() 2268 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MaxVal) in SimplifySetCC() 2272 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal+1) in SimplifySetCC() 2290 ISD::SETLT); in SimplifySetCC() 2553 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X in SimplifySetCC()
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D | LegalizeIntegerTypes.cpp | 829 case ISD::SETLT: in PromoteSetCCOperands() 2499 if ((CCCode == ISD::SETLT && CST->isNullValue()) || // X < 0 in IntegerExpandSetCCOperands() 2510 case ISD::SETLT: in IntegerExpandSetCCOperands() 2547 (CCCode == ISD::SETLT || CCCode == ISD::SETGT || in IntegerExpandSetCCOperands() 2792 ISD::SETLT); in ExpandIntOp_UINT_TO_FP()
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D | LegalizeDAG.cpp | 1933 ISD::SETLT); in ExpandFCOPYSIGN() 1999 case ISD::SETOLT: CC1 = ISD::SETLT; CC2 = ISD::SETO; Opc = ISD::AND; break; in LegalizeSetCCCondCode() 2005 case ISD::SETULT: CC1 = ISD::SETLT; CC2 = ISD::SETUO; Opc = ISD::OR; break; in LegalizeSetCCCondCode() 2565 Op0, DAG.getConstant(0, MVT::i64), ISD::SETLT); in ExpandLegalINT_TO_FP() 2604 ISD::SETLT); in ExpandLegalINT_TO_FP() 3150 Tmp1, ISD::SETLT); in ExpandNode()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 179 case ISD::SETLT: in softenSetCCOperands() 1587 case ISD::SETLT: in SimplifySetCC() 1767 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; in SimplifySetCC() 1778 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal) in SimplifySetCC() 1791 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MaxVal) in SimplifySetCC() 1795 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal+1) in SimplifySetCC() 1813 ISD::SETLT); in SimplifySetCC() 2149 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X in SimplifySetCC() 3143 DAG.getConstant(0, dl, NVT), Ret, ISD::SETLT); in expandFP_TO_SINT()
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D | LegalizeIntegerTypes.cpp | 982 case ISD::SETLT: in PromoteSetCCOperands() 1685 return std::make_pair(ISD::SETLT, ISD::UMIN); in getExpandedMinMaxOps() 2822 if ((CCCode == ISD::SETLT && CST->isNullValue()) || // X < 0 in IntegerExpandSetCCOperands() 2833 case ISD::SETLT: in IntegerExpandSetCCOperands() 2875 (CCCode == ISD::SETLT || CCCode == ISD::SETGT || in IntegerExpandSetCCOperands() 2902 case ISD::SETGT: CCCode = ISD::SETLT; FlipOperands = true; break; in IntegerExpandSetCCOperands() 3171 ISD::SETLT); in ExpandIntOp_UINT_TO_FP()
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D | SelectionDAGDumper.cpp | 350 case ISD::SETLT: return "setlt"; in getOperationName()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 106 [{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}] 142 def COND_SLT : PatLeaf <(cond), [{return N->get() == ISD::SETLT;}]>;
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D | AMDGPUISelLowering.cpp | 987 case ISD::SETLT: { in CombineFMinMaxLegacy() 1560 SDValue LHSign = DAG.getSelectCC(DL, LHS, Zero, NegOne, Zero, ISD::SETLT); in LowerSDIVREM() 1561 SDValue RHSign = DAG.getSelectCC(DL, RHS, Zero, NegOne, Zero, ISD::SETLT); in LowerSDIVREM() 1683 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT); in LowerFTRUNC() 1795 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT); in LowerFROUND64()
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaISelDAGToDAG.cpp | 313 case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: in Select()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrQPX.td | 1030 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLT), 1077 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLT), 1117 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLT)), 1138 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLT)), 1159 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLT)),
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D | PPCInstrInfo.td | 2948 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETLT)), 3088 defm : ExtSetCCPat<SETLT, 3120 defm : ExtSetCCPat<SETLT, 3155 def : Pat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETLT)), 3200 def : Pat<(i1 (setcc i32:$s1, i32:$s2, SETLT)), 3223 def : Pat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETLT)), 3268 def : Pat<(i1 (setcc i64:$s1, i64:$s2, SETLT)), 3291 def : Pat<(i1 (setcc f32:$s1, f32:$s2, SETLT)), 3322 def : Pat<(i1 (setcc f64:$s1, f64:$s2, SETLT)), 3358 def : Pat <(i1 (selectcc i1:$lhs, i1:$rhs, i1:$tval, i1:$fval, SETLT)), [all …]
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D | PPCISelDAGToDAG.cpp | 2102 case ISD::SETLT: return PPC::PRED_LT; in getPredicateForSetCC() 2125 case ISD::SETLT: return 0; // Bit #0 = SETOLT in getCRIdxForSetCC() 2161 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst() 2207 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst() 2292 case ISD::SETLT: { in trySETCC() 2331 case ISD::SETLT: { in trySETCC()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeInstrInfo.td | 763 def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLT), 800 (i32 GPR:$T), (i32 GPR:$F), SETLT), 836 def : Pat<(brcond (setcc (i32 GPR:$L), (i32 GPR:$R), SETLT), bb:$T),
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D | MBlazeInstrFPU.td | 160 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETLT),
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/external/llvm/lib/Target/BPF/ |
D | BPFISelLowering.cpp | 428 case ISD::SETLT: in NegateCC()
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/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 1866 X86_INTRINSIC_DATA(sse_comilt_ss, COMI, X86ISD::COMI, ISD::SETLT), 1878 X86_INTRINSIC_DATA(sse_ucomilt_ss, COMI, X86ISD::UCOMI, ISD::SETLT), 1884 X86_INTRINSIC_DATA(sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT), 1928 X86_INTRINSIC_DATA(sse2_ucomilt_sd, COMI, X86ISD::UCOMI, ISD::SETLT),
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 650 case ISD::SETLT: return SPCC::ICC_L; in IntCondCCodeToICC() 670 case ISD::SETLT: in FPCondCCodeToFCC()
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