| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 728 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 321 case ISD::SETNE: case ISD::SETONE: case ISD::SETUNE: in Select()
337 case ISD::SETUNE: case ISD::SETUGT: case ISD::SETUGE: in Select()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 866 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | README.txt | 80 SETUNE unimplemented
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 178 case FCmpInst::FCMP_UNE: return ISD::SETUNE; in getFCmpCondCode()
187 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 123 def COND_UNE : PatLeaf <(cond), [{return N->get() == ISD::SETUNE;}]>;
133 [{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
156 [{return N->get() == ISD::SETNE || N->get() == ISD::SETUNE;}]
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 55 defm NE : ComparisonFP<SETUNE, "ne ">;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 168 case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break; in getFCmpCondCode()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 554 case ISD::SETUNE: in getPredicateForSetCC()
594 case ISD::SETUNE: in getCRIdxForSetCC()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrFPU.td | 185 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETUNE),
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 345 case ISD::SETUNE: return "setune"; in getOperationName()
|
| D | TargetLowering.cpp | 168 case ISD::SETUNE: in softenSetCCOperands()
1951 if (Cond == ISD::SETUNE && in SimplifySetCC()
1964 if (Cond == ISD::SETUNE && in SimplifySetCC()
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| D | LegalizeDAG.cpp | 1596 assert(TLI.getCondCodeAction(ISD::SETUNE, OpVT) in LegalizeSetCCCondCode()
1599 CC1 = ISD::SETUNE; CC2 = ISD::SETUNE; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
1607 case ISD::SETUNE: in LegalizeSetCCCondCode()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2099 case ISD::SETUNE: in getPredicateForSetCC()
2135 case ISD::SETUNE: in getCRIdxForSetCC()
2171 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break; in getVCmpInst()
2215 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break; in getVCmpInst()
|
| D | PPCInstrQPX.td | 1019 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUNE),
1066 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUNE),
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 495 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
796 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 628 case ISD::SETUNE: in SoftenSetCCOperands()
1315 LHSHi, RHSHi, ISD::SETUNE); in FloatExpandSetCCOperands()
|
| D | SelectionDAG.cpp | 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT in getSetCCOrOperation()
1501 case ISD::SETUNE: in FoldSetCC()
1566 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); in FoldSetCC()
6114 case ISD::SETUNE: return "setune"; in getOperationName()
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| D | TargetLowering.cpp | 2370 if (Cond == ISD::SETUNE && in SimplifySetCC()
2383 if (Cond == ISD::SETUNE && in SimplifySetCC()
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 630 case ISD::SETUNE: in EmitCmp()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 595 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
999 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXInstrInfo.td | 587 defm SETPNEf32 : PTX_SETP_FP<RegF32, "f32", f32imm, SETUNE, SETONE, "ne">;
596 defm SETPNEf64 : PTX_SETP_FP<RegF64, "f64", f64imm, SETUNE, SETONE, "ne">;
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 669 case ISD::SETUNE: return SPCC::FCC_NE; in FPCondCCodeToFCC()
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 840 case ISD::SETUNE: in IntCondCCodeToICC()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1053 case ISD::SETUNE: CondCode = ARMCC::NE; break; in FPCCToARMCC()
2908 else if (CC == ISD::SETUNE) in OptimizeVFPBrcond()
2955 CC == ISD::SETNE || CC == ISD::SETUNE)) { in LowerBR_CC()
3446 case ISD::SETUNE: in LowerVSETCC()
|