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Searched refs:SetCC (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Dsetcc-takes-i32.ll4 ; correctly. Previously LLVM thought that i64 was the appropriate SetCC output,
8 ; It was expecting the smallest legal promotion of i1 to be the preferred SetCC
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrCMovSetCC.td1 //===- X86InstrCMovSetCC.td - Conditional Move and SetCC ---*- tablegen -*-===//
16 // SetCC instructions.
76 // SetCC instructions.
/external/v8/src/arm/
Dcodegen-arm.cc81 __ sub(chars, chars, Operand(64), SetCC); in CreateMemCopyUint8Function()
140 __ bic(temp1, chars, Operand(0x3), SetCC); in CreateMemCopyUint8Function()
148 __ bic(temp2, chars, Operand(0x3), SetCC); in CreateMemCopyUint8Function()
160 __ mov(chars, Operand(chars, LSL, 31), SetCC); in CreateMemCopyUint8Function()
244 __ mov(chars, Operand(chars, LSL, 31), SetCC); // bit0 => ne, bit1 => cs in CreateMemCopyUint16Uint8Function()
Dmacro-assembler-arm.cc1252 rsb(scratch, shift, Operand(32), SetCC); in LslPair()
1298 rsb(scratch, shift, Operand(32), SetCC); in LsrPair()
1345 rsb(scratch, shift, Operand(32), SetCC); in AsrPair()
2041 and_(result_end, result, Operand(kDoubleAlignmentMask), SetCC); in Allocate()
2145 and_(result_end, result, Operand(kDoubleAlignmentMask), SetCC); in Allocate()
2161 add(result_end, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC); in Allocate()
2163 add(result_end, result, Operand(object_size), SetCC); in Allocate()
2203 and_(result_end, result, Operand(kDoubleAlignmentMask), SetCC); in FastAllocate()
2214 add(result_end, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC); in FastAllocate()
2216 add(result_end, result, Operand(object_size), SetCC); in FastAllocate()
[all …]
Dcode-stubs-arm.cc133 __ rsb(scratch, scratch, Operand(51), SetCC); in Generate()
261 __ orr(r0, r3, Operand(r2), SetCC); in EmitIdenticalObjectComparison()
737 __ mov(scratch, Operand(scratch, LSR, 1), SetCC); in Generate()
1260 SetCC); in Generate()
1298 __ mov(r3, Operand(r0, ASR, 3), SetCC); in Generate()
1482 __ sub(r1, r1, Operand(1), SetCC); in Generate()
1839 __ sub(scratch3, scratch1, Operand(scratch2), SetCC); in GenerateCompareFlatOneByteStrings()
1855 __ mov(r0, Operand(length_delta), SetCC); in GenerateCompareFlatOneByteStrings()
1886 __ add(index, index, Operand(1), SetCC); in GenerateOneByteCharsCompareLoop()
1950 __ sub(r0, r0, r1, SetCC); in GenerateSmis()
Dconstants-arm.h243 SetCC = 1 << 20, // Set condition code. enumerator
/external/v8/src/builtins/arm/
Dbuiltins-arm.cc146 __ sub(r4, r4, Operand(1), SetCC); in Generate_MathMaxMin()
240 __ sub(r0, r0, Operand(1), SetCC); in Generate_NumberConstructor()
286 __ sub(r0, r0, Operand(1), SetCC); in Generate_NumberConstructor_ConstructStub()
362 __ sub(r0, r0, Operand(1), SetCC); in Generate_StringConstructor()
433 __ sub(r0, r0, Operand(1), SetCC); in Generate_StringConstructor_ConstructStub()
628 __ sub(r4, r4, Operand(2), SetCC); in Generate_JSConstructStubHelper()
820 __ sub(r3, r3, Operand(Smi::FromInt(1)), SetCC); in Generate_ResumeGeneratorTrampoline()
1111 __ sub(r4, r4, Operand(kPointerSize), SetCC); in Generate_InterpreterEntryTrampoline()
1892 __ sub(r4, r0, Operand(1), SetCC); in Generate_FunctionPrototypeApply()
1894 __ sub(r4, r4, Operand(1), SetCC, ge); in Generate_FunctionPrototypeApply()
[all …]
/external/llvm/test/Transforms/ConstProp/
D2002-09-03-SetCC-Bools.ll1 ; SetCC on boolean values was not implemented!
/external/swiftshader/third_party/LLVM/test/Transforms/ConstProp/
D2002-09-03-SetCC-Bools.ll1 ; SetCC on boolean values was not implemented!
/external/llvm/lib/Target/X86/
DX86InstrCMovSetCC.td1 //===-- X86InstrCMovSetCC.td - Conditional Move and SetCC --*- tablegen -*-===//
82 // SetCC instructions.
DX86ISelLowering.cpp15613 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerSETCC() local
15617 SetCC = DAG.getNode(ISD::AssertZext, dl, MVT::i8, SetCC, in LowerSETCC()
15619 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, SetCC); in LowerSETCC()
15621 return SetCC; in LowerSETCC()
15642 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerSETCC() local
15645 SetCC = DAG.getNode(ISD::AssertZext, dl, MVT::i8, SetCC, in LowerSETCC()
15647 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, SetCC); in LowerSETCC()
15649 return SetCC; in LowerSETCC()
15665 SDValue SetCC = DAG.getNode(X86ISD::SETCC, DL, MVT::i8, in LowerSETCCE() local
15668 SetCC = DAG.getNode(ISD::AssertZext, DL, MVT::i8, SetCC, in LowerSETCCE()
[all …]
/external/v8/src/crankshaft/arm/
Dlithium-codegen-arm.cc805 __ sub(r1, r1, Operand(1), SetCC); in DeoptimizeIf()
985 __ rsb(dividend, dividend, Operand::Zero(), SetCC); in DoModByPowerOf2I()
1012 __ sub(result, dividend, result, SetCC); in DoModByConstI()
1121 __ sub(result_reg, left_reg, scratch, SetCC); in DoModI()
1202 __ sub(scratch0(), scratch0(), dividend, SetCC); in DoDivByConstI()
1314 __ rsb(result, dividend, Operand::Zero(), SetCC); in DoFlooringDivByPowerOf2I()
1470 __ rsb(result, left, Operand::Zero(), SetCC); in DoMulI()
1609 __ mov(result, Operand(left, LSR, scratch), SetCC); in DoShiftI()
1658 __ SmiTag(result, result, SetCC); in DoShiftI()
1660 __ SmiTag(result, left, SetCC); in DoShiftI()
[all …]
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp582 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
584 if ((SetCC.getOpcode() != ISD::SETCC) || in performSELECTCombine()
585 !SetCC.getOperand(0).getValueType().isInteger()) in performSELECTCombine()
609 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); in performSELECTCombine()
612 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0), in performSELECTCombine()
613 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true)); in performSELECTCombine()
615 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True); in performSELECTCombine()
638 return DAG.getNode(ISD::ADD, DL, SetCC.getValueType(), SetCC, False); in performSELECTCombine()
645 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); in performSELECTCombine()
646 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0), in performSELECTCombine()
[all …]
DMipsSEISelLowering.cpp1027 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
1029 if (SetCC.getOpcode() != MipsISD::SETCC_DSP) in performVSELECTCombine()
1033 SetCC.getOperand(0), SetCC.getOperand(1), in performVSELECTCombine()
1034 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2)); in performVSELECTCombine()
/external/v8/src/regexp/arm/
Dregexp-macro-assembler-arm.cc216 __ sub(r1, r1, r0, SetCC); // Length of capture. in CheckNotBackReferenceIgnoreCase()
359 __ sub(r1, r1, r0, SetCC); // Length to check. in CheckNotBackReference()
656 __ sub(r0, sp, r0, SetCC); in GetCode()
719 __ sub(r2, r2, Operand(1), SetCC); in GetCode()
/external/v8/src/compiler/arm/
Dcode-generator-arm.cc36 return SetCC; in OutputSBit()
1024 DCHECK_EQ(SetCC, i.OutputSBit()); in AssembleArchInstruction()
1028 DCHECK_EQ(SetCC, i.OutputSBit()); in AssembleArchInstruction()
1032 DCHECK_EQ(SetCC, i.OutputSBit()); in AssembleArchInstruction()
1036 DCHECK_EQ(SetCC, i.OutputSBit()); in AssembleArchInstruction()
1044 SBit::SetCC); in AssembleArchInstruction()
1055 SBit::SetCC); in AssembleArchInstruction()
1118 DCHECK_EQ(SetCC, i.OutputSBit()); in AssembleArchInstruction()
1169 DCHECK_EQ(SetCC, i.OutputSBit()); in AssembleArchInstruction()
/external/v8/src/x87/
Ddisasm-x87.cc325 int SetCC(byte* data);
648 int DisassemblerX87::SetCC(byte* data) { in SetCC() function in disasm::DisassemblerX87
1148 data += SetCC(data); in InstructionDecode()
/external/v8/src/full-codegen/arm/
Dfull-codegen-arm.cc171 __ sub(r2, r2, Operand(1), SetCC); in Generate()
346 __ sub(r3, r3, Operand(Smi::FromInt(delta)), SetCC); in EmitProfilingCounterDecrement()
1616 __ add(scratch1, left, Operand(right), SetCC); in EmitInlineSmiBinaryOp()
1621 __ sub(scratch1, left, Operand(right), SetCC); in EmitInlineSmiBinaryOp()
1634 __ add(scratch2, right, Operand(left), SetCC); in EmitInlineSmiBinaryOp()
2428 __ add(r0, r0, Operand(Smi::FromInt(count_value)), SetCC); in VisitCountOperation()
/external/v8/src/ia32/
Ddisasm-ia32.cc388 int SetCC(byte* data);
712 int DisassemblerIA32::SetCC(byte* data) { in SetCC() function in disasm::DisassemblerIA32
1495 data += SetCC(data); in InstructionDecode()
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
Dselect.ll22 ; A SetCC whose result is used should produce instructions to
/external/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp1261 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
1264 Hi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, Hi); in LowerSRL_PARTS()
1267 Lo = DAG.getSelect(dl, MVT::i32, SetCC, Hi, Lo); in LowerSRL_PARTS()
/external/llvm/test/CodeGen/Generic/
Dselect.ll22 ; A SetCC whose result is used should produce instructions to
/external/v8/src/x64/
Ddisasm-x64.cc478 int SetCC(byte* data);
870 int DisassemblerX64::SetCC(byte* data) { in SetCC() function in disasm::DisassemblerX64
2148 current = data + SetCC(data); in TwoByteOpcodeInstruction()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp1368 SDNode *SetCC = nullptr; in LowerBRCOND() local
1372 SetCC = Intr; in LowerBRCOND()
1373 Intr = SetCC->getOperand(0).getNode(); in LowerBRCOND()
1386 assert(!SetCC || in LowerBRCOND()
1387 (SetCC->getConstantOperandVal(1) == 1 && in LowerBRCOND()
1388 cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() == in LowerBRCOND()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp3933 SDNode *SetCC = SetCCs[i]; in ExtendSetCCUses() local
3937 SDValue SOp = SetCC->getOperand(j); in ExtendSetCCUses()
3944 Ops.push_back(SetCC->getOperand(2)); in ExtendSetCCUses()
3945 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0), in ExtendSetCCUses()
5751 SDValue SetCC = in visitBRCOND() local
5758 MVT::Other, Chain, SetCC, N2); in visitBRCOND()
5769 DAG.ReplaceAllUsesOfValueWith(N1, SetCC, &DeadNodes); in visitBRCOND()
5818 SDValue SetCC = DAG.getSetCC(TheXor->getDebugLoc(), in visitBRCOND() local
5824 DAG.ReplaceAllUsesOfValueWith(N1, SetCC, &DeadNodes); in visitBRCOND()
5828 MVT::Other, Chain, SetCC, N2); in visitBRCOND()

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