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Searched refs:TEX (Results 1 – 25 of 32) sorted by relevance

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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
Dregalloc_tex_1d_swizzle.test2 0: TEX temp[8].xyz, input[1].xy__, 2D[0];
3 1: TEX temp[10].xyz, input[2].xyz_, CUBE[2];
4 2: TEX temp[12].xyz, input[1].xy__, 2D[1];
11 9: TEX temp[18].x, temp[0].x___, 1D[3];
/external/mesa3d/src/gallium/state_trackers/nine/
Dnine_shader.c2815 DECL_SPECIAL(TEX) in DECL_SPECIAL() argument
2958 _OPI(TEX, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 0, SPECIAL(TEX)),
2959 _OPI(TEX, TEX, V(0,0), V(0,0), V(1,4), V(1,4), 1, 1, SPECIAL(TEXLD_14)),
2960 _OPI(TEX, TEX, V(0,0), V(0,0), V(2,0), V(3,0), 1, 2, SPECIAL(TEXLD)),
2961 _OPI(TEXBEM, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXBEM)),
2962 _OPI(TEXBEML, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXBEM)),
2963 _OPI(TEXREG2AR, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXREG2AR)),
2964 _OPI(TEXREG2GB, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXREG2GB)),
2965 _OPI(TEXM3x2PAD, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x2PAD)),
2966 _OPI(TEXM3x2TEX, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x2TEX)),
[all …]
/external/hyphenation-patterns/la/
Dhyph-la.lic.txt82 % ITALAT.TEX; this is substantially the same code, but the file has been
85 % A corresponding file (ITHYPH.TEX) has been extracted in order to eliminate
87 % ITHYPH.TEX has been further extended with many new patterns in order to
/external/llvm/test/CodeGen/AMDGPU/
Dvtx-fetch-branch.ll11 ; CHECK: TEX
Dtex-clause-antidep.ll3 ;CHECK: TEX
Drv7x0_count3.ll3 ; CHECK: TEX 9 @6 ; encoding: [0x06,0x00,0x00,0x00,0x00,0x04,0x88,0x80]
/external/llvm/lib/Target/AMDGPU/
DR600Defines.h33 TEX = (1 << 1), enumerator
DEvergreenInstructions.td649 "TEX $COUNT @$ADDR"> {
/external/swiftshader/src/Shader/
DVertexProgram.hpp110 void TEX(Vector4f &dst, Vector4f &src, const Src&);
DPixelPipeline.hpp88 void TEX(Vector4s &dst, Float4 &u, Float4 &v, Float4 &s, int stage, bool project);
DPixelProgram.hpp109 void TEX(Vector4f &dst, Vector4f &src0, const Src &src1, bool project, bool bias);
DPixelPipeline.cpp166 TEX(d, x, y, z, dst.index, false); in applyShader()
174TEX(d, x, y, z, dst.index, src0.modifier == Shader::MODIFIER_DZ || src0.modifier == Shader::MODIFI… in applyShader()
178TEX(d, x, y, w, dst.index, src0.modifier == Shader::MODIFIER_DZ || src0.modifier == Shader::MODIFI… in applyShader()
1677 void PixelPipeline::TEX(Vector4s &dst, Float4 &u, Float4 &v, Float4 &s, int sampler, bool project) in TEX() function in sw::PixelPipeline
DVertexProgram.cpp332 case Shader::OPCODE_TEX: TEX(d, s0, src1); break; in program()
1515 void VertexProgram::TEX(Vector4f &dst, Vector4f &src0, const Src &src1) in TEX() function in sw::VertexProgram
DPixelProgram.cpp286 case Shader::OPCODE_TEX: TEX(d, s0, src1, project, bias); break; in applyShader()
1118 void PixelProgram::TEX(Vector4f &dst, Vector4f &src0, const Src &src1, bool project, bool bias) in TEX() function in sw::PixelProgram
/external/mesa3d/src/mesa/program/
Dprogram_lexer.l226 TEX{sat} { return_opcode(require_ARB_fp, SAMPLE_OP, TEX, 3); }
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h103 OP12_TEX(TEX)
/external/mesa3d/src/gallium/docs/source/cso/
Dsampler.rst94 the texture coordinates and/or the fragment shader TEX/TXB/TXL
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp746 NV50_IR_OPCODE_CASE(TEX, TEX); in translateOpcode()
748 NV50_IR_OPCODE_CASE(TXP, TEX); in translateOpcode()
838 NV50_IR_OPCODE_CASE(SAMPLE, TEX); in translateOpcode()
840 NV50_IR_OPCODE_CASE(SAMPLE_C, TEX); in translateOpcode()
841 NV50_IR_OPCODE_CASE(SAMPLE_C_LZ, TEX); in translateOpcode()
860 NV50_IR_OPCODE_CASE(TEX2, TEX); in translateOpcode()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_fragprog.c754 nvfx_fp_emit(fpc, tex(sat, TEX, unit, dst, mask, src[0], none, none)); in nvfx_fragprog_parse_instruction()
776 nvfx_fp_emit(fpc, tex(sat, TEX, unit, dst, mask, src[0], none, none)); in nvfx_fragprog_parse_instruction()
/external/mesa3d/docs/relnotes/
D5.145 - the TEX and TXP instructions both do perspective correction
/external/mesa3d/src/gallium/docs/source/
Dtgsi.rst544 .. opcode:: TEX - Texture Lookup
572 this is the same as TEX, but uses another reg to encode the
1004 used. Set W to zero. It behaves like the TEX instruction, but a filtered
3376 For TEX\* style texture sample opcodes (as opposed to SAMPLE\* opcodes
3386 NOTE: It is NOT legal to mix SAMPLE\* style opcodes and TEX\* opcodes
3561 by TGSI texture instructions, such as :opcode:`TEX`, :opcode:`TXD`, and
Dscreen.rst38 can do the depth texture / Z comparison operation in TEX instructions
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_bc_fmt_def.inc479 // TEX
Dnotes.markdown322 vector operand in the CF/TEX/VTX instructions is represented with 4
/external/mesa3d/docs/
DVERSIONS1261 - frag prog TEX instruction no longer incorrectly divides s,t,r by q
1262 - ARB frag prog TEX and TEXP instructions now use LOD=0

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