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Searched refs:imm19 (Results 1 – 18 of 18) sorted by relevance

/external/v8/src/arm64/
Dassembler-arm64-inl.h981 Instr Assembler::ImmCondBranch(int imm19) {
982 CHECK(is_int19(imm19));
983 return truncate_to_int19(imm19) << ImmCondBranch_offset;
987 Instr Assembler::ImmCmpBranch(int imm19) {
988 CHECK(is_int19(imm19));
989 return truncate_to_int19(imm19) << ImmCmpBranch_offset;
1061 Instr Assembler::ImmLLiteral(int imm19) {
1062 CHECK(is_int19(imm19));
1063 return truncate_to_int19(imm19) << ImmLLiteral_offset;
Dassembler-arm64.h988 void b(int imm19, Condition cond);
996 void cbz(const Register& rt, int imm19);
1000 void cbnz(const Register& rt, int imm19);
1396 void ldr_pcrel(const CPURegister& rt, int imm19);
1757 inline static Instr ImmCondBranch(int imm19);
1758 inline static Instr ImmCmpBranch(int imm19);
1769 inline static Instr ImmLLiteral(int imm19);
Dassembler-arm64.cc1008 void Assembler::b(int imm19, Condition cond) { in b() argument
1009 Emit(B_cond | ImmCondBranch(imm19) | cond); in b()
1029 int imm19) { in cbz() argument
1030 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt)); in cbz()
1041 int imm19) { in cbnz() argument
1042 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt)); in cbnz()
1678 void Assembler::ldr_pcrel(const CPURegister& rt, int imm19) { in ldr_pcrel() argument
1682 Emit(LoadLiteralOpFor(rt) | ImmLLiteral(imm19) | Rt(rt)); in ldr_pcrel()
/external/vixl/src/aarch64/
Dassembler-aarch64.h504 void b(int64_t imm19, Condition cond);
516 void cbz(const Register& rt, int64_t imm19);
522 void cbnz(const Register& rt, int64_t imm19);
1099 void ldr(const CPURegister& rt, int64_t imm19);
1102 void ldrsw(const Register& xt, int64_t imm19);
1190 void prfm(PrefetchOperation op, int64_t imm19);
2665 static Instr ImmCondBranch(int64_t imm19) { in ImmCondBranch() argument
2666 VIXL_ASSERT(IsInt19(imm19)); in ImmCondBranch()
2667 return TruncateToUint19(imm19) << ImmCondBranch_offset; in ImmCondBranch()
2670 static Instr ImmCmpBranch(int64_t imm19) { in ImmCmpBranch() argument
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Dassembler-aarch64.cc122 ptrdiff_t imm19 = ldr->GetImmLLiteral(); in place() local
123 VIXL_ASSERT(imm19 <= 0); in place()
124 done = (imm19 == 0); in place()
125 offset += imm19 * kLiteralEntrySize; in place()
201 void Assembler::b(int64_t imm19, Condition cond) { in b() argument
202 Emit(B_cond | ImmCondBranch(imm19) | cond); in b()
230 void Assembler::cbz(const Register& rt, int64_t imm19) { in cbz() argument
231 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt)); in cbz()
242 void Assembler::cbnz(const Register& rt, int64_t imm19) { in cbnz() argument
243 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt)); in cbnz()
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/external/llvm/lib/Target/Sparc/
DSparcInstrInfo.td792 def CC : F2_3<0b001, 0, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond),
793 !strconcat("b$cond ", !strconcat(regstr, ", $imm19")),
796 def CCA : F2_3<0b001, 1, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond),
797 !strconcat("b$cond,a ", !strconcat(regstr, ", $imm19")),
800 def CCNT : F2_3<0b001, 0, 0, (outs), (ins bprtarget:$imm19, CCOp:$cond),
801 !strconcat("b$cond,pn ", !strconcat(regstr, ", $imm19")),
804 def CCANT : F2_3<0b001, 1, 0, (outs), (ins bprtarget:$imm19, CCOp:$cond),
805 !strconcat("b$cond,a,pn ", !strconcat(regstr, ", $imm19")),
851 def CC : F2_3<0b101, 0, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond,
853 "fb$cond $cc, $imm19", [], IIC_fpu_normal_instr>;
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DSparcInstrFormats.td75 bits<19> imm19;
84 let Inst{18-0} = imm19;
DSparcInstr64Bit.td312 defm BPX : IPredBranch<"%xcc", [(SPbrxcc bb:$imm19, imm:$cond)]>;
/external/v8/src/mips/
Ddisasm-mips.cc330 int32_t imm19 = instr->Imm19Value(); in PrintSImm19() local
332 imm19 <<= (32 - kImm19Bits); in PrintSImm19()
333 imm19 >>= (32 - kImm19Bits); in PrintSImm19()
334 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19); in PrintSImm19()
Dsimulator-mips.cc4553 int32_t imm19 = instr_.Imm19Value(); in DecodeTypeImmediate() local
4559 imm19 <<= (kOpcodeBits + kRsBits + 2); in DecodeTypeImmediate()
4560 imm19 >>= (kOpcodeBits + kRsBits + 2); in DecodeTypeImmediate()
4561 addr = current_pc + (imm19 << 2); in DecodeTypeImmediate()
4567 int32_t se_imm19 = imm19 | ((imm19 & 0x40000) ? 0xfff80000 : 0); in DecodeTypeImmediate()
Dassembler-mips.cc1965 void Assembler::addiupc(Register rs, int32_t imm19) { in addiupc() argument
1967 DCHECK(rs.is_valid() && is_int19(imm19)); in addiupc()
1968 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); in addiupc()
Dassembler-mips.h785 void addiupc(Register rs, int32_t imm19);
/external/v8/src/mips64/
Ddisasm-mips64.cc333 int32_t imm19 = instr->Imm19Value(); in PrintSImm19() local
335 imm19 <<= (32 - kImm19Bits); in PrintSImm19()
336 imm19 >>= (32 - kImm19Bits); in PrintSImm19()
337 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19); in PrintSImm19()
Dsimulator-mips64.cc4815 int32_t imm19 = instr_.Imm19Value(); in DecodeTypeImmediate() local
4830 imm19 <<= (kOpcodeBits + kRsBits + 2); in DecodeTypeImmediate()
4831 imm19 >>= (kOpcodeBits + kRsBits + 2); in DecodeTypeImmediate()
4832 addr = current_pc + (imm19 << 2); in DecodeTypeImmediate()
4839 imm19 <<= (kOpcodeBits + kRsBits + 2); in DecodeTypeImmediate()
4840 imm19 >>= (kOpcodeBits + kRsBits + 2); in DecodeTypeImmediate()
4841 addr = current_pc + (imm19 << 2); in DecodeTypeImmediate()
4848 imm19 | ((imm19 & 0x40000) ? 0xfffffffffff80000 : 0); in DecodeTypeImmediate()
Dassembler-mips64.cc2201 void Assembler::addiupc(Register rs, int32_t imm19) { in addiupc() argument
2203 DCHECK(rs.is_valid() && is_int19(imm19)); in addiupc()
2204 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); in addiupc()
Dassembler-mips64.h830 void addiupc(Register rs, int32_t imm19);
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md100 void b(int64_t imm19, Condition cond)
207 void cbnz(const Register& rt, int64_t imm19)
221 void cbz(const Register& rt, int64_t imm19)
580 Load integer or FP register from pc + imm19 << 2.
582 void ldr(const CPURegister& rt, int64_t imm19)
639 Load word with sign extension from pc + imm19 << 2.
641 void ldrsw(const Register& xt, int64_t imm19)
897 Prefetch from pc + imm19 << 2.
899 void prfm(PrefetchOperation op, int64_t imm19)
/external/valgrind/VEX/priv/
Dguest_arm64_toIR.c5080 UInt imm19 = INSN(23,5); in dis_ARM64_load_store() local
5083 ULong ea = guest_PC_curr_instr + sx_to_64(imm19 << 2, 21); in dis_ARM64_load_store()
5786 UInt imm19 = INSN(23,5); in dis_ARM64_load_store() local
5788 ULong ea = guest_PC_curr_instr + sx_to_64(imm19 << 2, 21); in dis_ARM64_load_store()