Home
last modified time | relevance | path

Searched refs:ioaddr (Results 1 – 25 of 66) sorted by relevance

123

/external/syslinux/gpxe/src/drivers/net/
Dsmc9000.c70 static word smc_read_phy_register(int ioaddr, byte phyaddr, byte phyreg) in smc_read_phy_register() argument
134 oldBank = inw( ioaddr+BANK_SELECT ); in smc_read_phy_register()
137 SMC_SELECT_BANK(ioaddr, 3); in smc_read_phy_register()
140 mii_reg = inw( ioaddr+MII_REG ); in smc_read_phy_register()
149 outw( mii_reg | bits[i], ioaddr+MII_REG ); in smc_read_phy_register()
154 outw( mii_reg | bits[i] | MII_MCLK, ioaddr+MII_REG ); in smc_read_phy_register()
156 bits[i] |= inw( ioaddr+MII_REG ) & MII_MDI; in smc_read_phy_register()
161 outw( mii_reg, ioaddr+MII_REG ); in smc_read_phy_register()
165 SMC_SELECT_BANK(ioaddr, oldBank); in smc_read_phy_register()
189 static void smc_write_phy_register(int ioaddr, in smc_write_phy_register() argument
[all …]
D3c5x9.c42 outw(RX_DISABLE, nic->ioaddr + EP_COMMAND); in t5x9_disable()
43 outw(RX_DISCARD_TOP_PACK, nic->ioaddr + EP_COMMAND); in t5x9_disable()
44 while (inw(nic->ioaddr + EP_STATUS) & S_COMMAND_IN_PROGRESS) in t5x9_disable()
46 outw(TX_DISABLE, nic->ioaddr + EP_COMMAND); in t5x9_disable()
47 outw(STOP_TRANSCEIVER, nic->ioaddr + EP_COMMAND); in t5x9_disable()
49 outw(RX_RESET, nic->ioaddr + EP_COMMAND); in t5x9_disable()
50 outw(TX_RESET, nic->ioaddr + EP_COMMAND); in t5x9_disable()
51 outw(C_INTR_LATCH, nic->ioaddr + EP_COMMAND); in t5x9_disable()
52 outw(SET_RD_0_MASK, nic->ioaddr + EP_COMMAND); in t5x9_disable()
53 outw(SET_INTR_MASK, nic->ioaddr + EP_COMMAND); in t5x9_disable()
[all …]
Deepro.c267 #define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(255); argument
270 #define eepro_sel_reset(ioaddr) \ argument
272 outb ( SEL_RESET_CMD, ioaddr ); \
278 #define eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG) argument
281 #define eepro_en_rx(ioaddr) outb(RCV_ENABLE_CMD, ioaddr) argument
284 #define eepro_dis_rx(ioaddr) outb(RCV_DISABLE_CMD, ioaddr) argument
287 #define eepro_sw2bank0(ioaddr) outb(BANK0_SELECT, ioaddr) argument
288 #define eepro_sw2bank1(ioaddr) outb(BANK1_SELECT, ioaddr) argument
289 #define eepro_sw2bank2(ioaddr) outb(BANK2_SELECT, ioaddr) argument
305 eepro_sw2bank2(nic->ioaddr); /* be careful, bank2 now */ in eepro_reset()
[all …]
Dr8169.c50 static void mdio_write(void *ioaddr, int reg_addr, int value) in mdio_write() argument
69 static int mdio_read(void *ioaddr, int reg_addr) in mdio_read() argument
91 static void mdio_patch(void *ioaddr, int reg_addr, int value) in mdio_patch() argument
95 mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value); in mdio_patch()
98 static void rtl_ephy_write(void *ioaddr, int reg_addr, int value) in rtl_ephy_write() argument
114 static u16 rtl_ephy_read(void *ioaddr, int reg_addr) in rtl_ephy_read() argument
134 static void rtl_csi_write(void *ioaddr, int addr, int value) in rtl_csi_write() argument
151 static u32 rtl_csi_read(void *ioaddr, int addr) in rtl_csi_read() argument
172 static void rtl8169_irq_mask_and_ack(void *ioaddr) in rtl8169_irq_mask_and_ack() argument
181 static unsigned int rtl8169_tbi_reset_pending(void *ioaddr) in rtl8169_tbi_reset_pending() argument
[all …]
D3c515.c100 outw(SelectWindow + (win_num), nic->ioaddr + EL3_CMD)
278 static int corkscrew_found_device(int ioaddr, int irq, int product_index,
280 static int corkscrew_probe1(int ioaddr, int irq, int product_index,
300 outb(0x20, nic->ioaddr + Wn3_MAC_Ctrl); /* Set the full-duplex bit. */ in t515_reset()
301 config.i = inl(nic->ioaddr + Wn3_Config); in t515_reset()
320 outl(config.i, nic->ioaddr + Wn3_Config); in t515_reset()
325 outw(TxReset, nic->ioaddr + EL3_CMD); in t515_reset()
327 if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress)) in t515_reset()
330 outw(RxReset, nic->ioaddr + EL3_CMD); in t515_reset()
333 if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress)) in t515_reset()
[all …]
Dvia-rhine.c56 #define byPAR0 ioaddr
57 #define byRCR ioaddr + 6
58 #define byTCR ioaddr + 7
59 #define byCR0 ioaddr + 8
60 #define byCR1 ioaddr + 9
61 #define byISR0 ioaddr + 0x0c
62 #define byISR1 ioaddr + 0x0d
63 #define byIMR0 ioaddr + 0x0e
64 #define byIMR1 ioaddr + 0x0f
65 #define byMAR0 ioaddr + 0x10
[all …]
Dtulip.c399 static u32 ioaddr; variable
495 static int read_eeprom(unsigned long ioaddr, int location, int addr_len);
587 long mdio_addr = ioaddr + CSR9; in mdio_read()
595 outl(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0); in mdio_read()
596 inl(ioaddr + 0xA0); in mdio_read()
597 inl(ioaddr + 0xA0); in mdio_read()
599 if ( ! ((retval = inl(ioaddr + 0xA0)) & 0x80000000)) in mdio_read()
607 return inl(ioaddr + 0xB4 + (location<<2)); in mdio_read()
609 return inl(ioaddr + 0xD0); in mdio_read()
611 return inl(ioaddr + 0xD4 + ((location-29)<<2)); in mdio_read()
[all …]
Dpcnet32.c56 static u32 ioaddr; /* Globally used for the card's io address */ variable
419 lp->a.reset(ioaddr); in pcnet32_reset()
422 lp->a.write_bcr(ioaddr, 20, 2); in pcnet32_reset()
425 val = lp->a.read_bcr(ioaddr, 2) & ~2; in pcnet32_reset()
428 lp->a.write_bcr(ioaddr, 2, val); in pcnet32_reset()
432 val = lp->a.read_bcr(ioaddr, 9) & ~3; in pcnet32_reset()
441 read_csr(ioaddr, in pcnet32_reset()
442 88) | (lp->a.read_csr(ioaddr, in pcnet32_reset()
448 lp->a.write_bcr(ioaddr, 9, val); in pcnet32_reset()
452 val = lp->a.read_csr(ioaddr, 124) & ~0x10; in pcnet32_reset()
[all …]
Dnatsemi.c111 eereg = inb ( np->ioaddr + EE_REG ); in natsemi_spi_read_bit()
122 eereg = inb ( np->ioaddr + EE_REG ); in natsemi_spi_write_bit()
125 outb ( eereg, np->ioaddr + EE_REG ); in natsemi_spi_write_bit()
192 np->ioaddr = pci->ioaddr; in natsemi_probe()
267 cfg = inl (np->ioaddr + ChipConfig) & CFG_RESET_SAVE; in natsemi_reset()
270 wcsr = inl (np->ioaddr + WOLCmd) & WCSR_RESET_SAVE; in natsemi_reset()
273 rfcr = inl (np->ioaddr + RxFilterAddr) & RFCR_RESET_SAVE; in natsemi_reset()
277 outl(i*2, np->ioaddr + RxFilterAddr); in natsemi_reset()
278 pmatch[i] = inw(np->ioaddr + RxFilterData); in natsemi_reset()
283 outl(0xa+(i*2), np->ioaddr + RxFilterAddr); in natsemi_reset()
[all …]
Ddmfe.c127ioaddr) outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr);udelay(5);outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SR… argument
227 static u16 read_srom_word(long ioaddr, int offset);
229 static void dmfe_descriptor_init(struct nic *, unsigned long ioaddr);
278 unsigned long ioaddr = BASE; in dmfe_init_dm910x() local
281 outl(DM910X_RESET, ioaddr + DCR0); /* RESET MAC */ in dmfe_init_dm910x()
283 outl(db->cr0_data, ioaddr + DCR0); in dmfe_init_dm910x()
294 outl(0x180, ioaddr + DCR12); /* Let bit 7 output port */ in dmfe_init_dm910x()
296 outl(0x80, ioaddr + DCR12); /* Issue RESET signal */ in dmfe_init_dm910x()
299 outl(0x0, ioaddr + DCR12); /* Clear RESET signal */ in dmfe_init_dm910x()
310 dmfe_descriptor_init(nic, ioaddr); in dmfe_init_dm910x()
[all …]
Dsis900.c61 static unsigned long ioaddr; variable
217 long ee_addr = ioaddr + mear; in sis96x_get_mac_addr()
302 rfcrSave = inl(rfcr + ioaddr); in sis635_get_mac_addr()
304 outl(rfcrSave | RELOAD, ioaddr + cr); in sis635_get_mac_addr()
305 outl(0, ioaddr + cr); in sis635_get_mac_addr()
308 outl(rfcrSave & ~RFEN, rfcr + ioaddr); in sis635_get_mac_addr()
312 outl((i << RFADDR_shift), ioaddr + rfcr); in sis635_get_mac_addr()
313 *( ((u16 *)nic->node_addr) + i) = inw(ioaddr + rfdr); in sis635_get_mac_addr()
317 outl(rfcrSave | RFEN, rfcr + ioaddr); in sis635_get_mac_addr()
344 if (pci->ioaddr == 0) in sis900_probe()
[all …]
Dsis190.c82 static void __mdio_cmd(void *ioaddr, u32 ctl) in __mdio_cmd() argument
100 static void mdio_write(void *ioaddr, int phy_id, int reg, int val) in mdio_write() argument
102 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIwrite | in mdio_write()
107 static int mdio_read(void *ioaddr, int phy_id, int reg) in mdio_read() argument
109 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIread | in mdio_read()
129 static u16 mdio_read_latched(void *ioaddr, int phy_id, int reg) in mdio_read_latched() argument
131 mdio_read(ioaddr, phy_id, reg); in mdio_read_latched()
132 return mdio_read(ioaddr, phy_id, reg); in mdio_read_latched()
135 static u16 sis190_read_eeprom(void *ioaddr, u32 reg) in sis190_read_eeprom() argument
156 static void sis190_irq_mask_and_ack(void *ioaddr) in sis190_irq_mask_and_ack() argument
[all …]
Ddepca.c471 #define STOP_DEPCA(ioaddr) \
472 outw(CSR0, ioaddr + DEPCA_ADDR);\
473 outw(STOP, ioaddr + DEPCA_DATA)
504 outw(CSR1, nic->ioaddr + DEPCA_ADDR); /* initialisation block address LSW */
505 outw((u16) (lp.sh_mem & LA_MASK), nic->ioaddr + DEPCA_DATA);
506 outw(CSR2, nic->ioaddr + DEPCA_ADDR); /* initialisation block address MSW */
507 outw((u16) ((lp.sh_mem & LA_MASK) >> 16), nic->ioaddr + DEPCA_DATA);
508 outw(CSR3, nic->ioaddr + DEPCA_ADDR); /* ALE control */
509 outw(ACON, nic->ioaddr + DEPCA_DATA);
510 outw(CSR0, nic->ioaddr + DEPCA_ADDR); /* Point back to CSR0 */
[all …]
Ddavicom.c132 static unsigned long ioaddr; variable
158 static int read_eeprom(unsigned long ioaddr, int location, int addr_len);
219 io_dcr9 = ioaddr + CSR9; in phy_read()
263 io_dcr9 = ioaddr + CSR9; in phy_write()
358 outl(csr6, ioaddr + CSR6); in davicom_media_chk()
378 outl(csr6, ioaddr + CSR6); in davicom_media_chk()
393 static int read_eeprom(unsigned long ioaddr, int location, int addr_len) in read_eeprom() argument
397 long ee_addr = ioaddr + CSR9; in read_eeprom()
486 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); in davicom_reset()
489 outl(0x00000001, ioaddr + CSR0); in davicom_reset()
[all …]
Deepro100.c179 if ( pci->ioaddr == 0 ) in ifec_pci_probe()
198 priv->ioaddr = pci->ioaddr; in ifec_pci_probe()
260 unsigned long ioaddr = priv->ioaddr; in ifec_net_close() local
269 intr_status = inw ( ioaddr + SCBStatus ); in ifec_net_close()
270 outw ( intr_status, ioaddr + SCBStatus ); in ifec_net_close()
271 inw ( ioaddr + SCBStatus ); in ifec_net_close()
293 unsigned long ioaddr = priv->ioaddr; in ifec_net_irq() local
297 outw ( enable ? INTERRUPT_MASK : SCBMaskAll, ioaddr + SCBCmd ); in ifec_net_irq()
409 intr_status = inw ( priv->ioaddr + SCBStatus ); in ifec_net_poll()
410 outw ( intr_status, priv->ioaddr + SCBStatus ); in ifec_net_poll()
[all …]
Depic100.c67 static int ioaddr; variable
115 if (pci->ioaddr == 0) in epic100_probe()
123 ioaddr = pci->ioaddr; in epic100_probe()
126 nic->ioaddr = pci->ioaddr & ~3; in epic100_probe()
129 command = ioaddr + COMMAND; /* Control Register */ in epic100_probe()
130 intstat = ioaddr + INTSTAT; /* Interrupt Status */ in epic100_probe()
131 intmask = ioaddr + INTMASK; /* Interrupt Mask */ in epic100_probe()
132 genctl = ioaddr + GENCTL; /* General Control */ in epic100_probe()
133 eectl = ioaddr + EECTL; /* EEPROM Control */ in epic100_probe()
134 test = ioaddr + TEST; /* Test register (clocks) */ in epic100_probe()
[all …]
Drtl8139.c101 unsigned short ioaddr; member
231 eereg = inb ( rtl->ioaddr + Cfg9346 ); in rtl_spi_read_bit()
242 eereg = inb ( rtl->ioaddr + Cfg9346 ); in rtl_spi_write_bit()
245 outb ( eereg, rtl->ioaddr + Cfg9346 ); in rtl_spi_write_bit()
280 ee9356 = ( inw ( rtl->ioaddr + RxConfig ) & Eeprom9356 ); in rtl_init_eeprom()
291 vpd = ( inw ( rtl->ioaddr + Config1 ) & VPDEnable ); in rtl_init_eeprom()
312 outb ( CmdReset, rtl->ioaddr + ChipCmd ); in rtl_reset()
330 outb ( netdev->ll_addr[i], rtl->ioaddr + MAC0 + i ); in rtl_open()
336 outl ( virt_to_bus ( rtl->rx.ring ), rtl->ioaddr + RxBuf ); in rtl_open()
341 outb ( ( CmdRxEnb | CmdTxEnb ), rtl->ioaddr + ChipCmd ); in rtl_open()
[all …]
Dvirtio-net.c82 vp_del_vq(nic->ioaddr, i); in virtnet_disable()
84 vp_reset(nic->ioaddr); in virtnet_disable()
129 vring_kick(nic->ioaddr, &virtqueue[RX_INDEX], 1); in virtnet_poll()
177 vring_kick(nic->ioaddr, &virtqueue[TX_INDEX], 1); in virtnet_transmit()
227 vring_kick(nic->ioaddr, &virtqueue[RX_INDEX], i); in provide_buffers()
251 nic->ioaddr = pci->ioaddr & ~3; in virtnet_probe()
257 printf("I/O address 0x%08x, IRQ #%d\n", nic->ioaddr, nic->irqno); in virtnet_probe()
261 vp_reset(nic->ioaddr); in virtnet_probe()
263 features = vp_get_features(nic->ioaddr); in virtnet_probe()
265 vp_get(nic->ioaddr, offsetof(struct virtio_net_config, mac), in virtnet_probe()
[all …]
Dmtd80x.c359 int ioaddr; member
418 outl(0x00000001, mtdx.ioaddr + BCR); in mtd_reset()
422 outl(virt_to_bus(mtdx.rx_ring), mtdx.ioaddr + RXLBA); in mtd_reset()
423 outl(virt_to_bus(mtdx.tx_ring), mtdx.ioaddr + TXLBA); in mtd_reset()
435 outl( mtdx.bcrvalue, mtdx.ioaddr + BCR); in mtd_reset()
438 outl(0, mtdx.ioaddr + RXPDR); in mtd_reset()
455 outl(FBE | TUNF | CNTOVF | RBU | TI | RI, mtdx.ioaddr + ISR); in mtd_reset()
456 outl( 0, mtdx.ioaddr + IMR); in mtd_reset()
506 outl(0, mtdx.ioaddr + RXPDR); in mtd_poll()
543 outl(virt_to_bus(mtdx.tx_ring), mtdx.ioaddr + TXLBA); in mtd_transmit()
[all …]
Dw89c840.c254 static int ioaddr; variable
261 static int eeprom_read(long ioaddr, int location);
306 writel(0x00000001, ioaddr + PCIBusCfg); in w89c840_reset()
310 writel(virt_to_bus(w840private.rx_ring), ioaddr + RxRingPtr); in w89c840_reset()
311 writel(virt_to_bus(w840private.tx_ring), ioaddr + TxRingPtr); in w89c840_reset()
314 writeb(nic->node_addr[i], ioaddr + StationAddr + i); in w89c840_reset()
328 writel(0xE010, ioaddr + PCIBusCfg); in w89c840_reset()
330 writel(0, ioaddr + RxStartDemand); in w89c840_reset()
353 writel(intr_stat & 0x001ffff, ioaddr + IntrStatus);
367 writel(0, ioaddr + RxStartDemand);
[all …]
D3c509.c46 uint16_t ioaddr; member
104 static inline void t509_activate ( uint16_t ioaddr ) { in t509_activate() argument
105 outb ( 0xe0 | ( ioaddr >> 4 ), t509_id_port ); in t509_activate()
108 static inline void t509_deactivate_and_reset_tag ( uint16_t ioaddr ) { in t509_deactivate_and_reset_tag() argument
109 outb ( GLOBAL_RESET, ioaddr + EP_COMMAND ); in t509_deactivate_and_reset_tag()
253 t509_activate ( t509->ioaddr ); in activate_t509_device()
255 t509->tag, t509->ioaddr ); in activate_t509_device()
266 t509_deactivate_and_reset_tag ( t509->ioaddr ); in deactivate_t509_device()
273 t509->ioaddr, t509->tag ); in deactivate_t509_device()
285 nic->ioaddr = t509->ioaddr; in legacy_t509_probe()
[all …]
Dpnic.c30 unsigned short ioaddr; member
54 outw ( input_length, pnic->ioaddr + PNIC_REG_LEN ); in pnic_command_quiet()
56 outsb ( pnic->ioaddr + PNIC_REG_DATA, input, input_length ); in pnic_command_quiet()
59 outw ( command, pnic->ioaddr + PNIC_REG_CMD ); in pnic_command_quiet()
61 status = inw ( pnic->ioaddr + PNIC_REG_STAT ); in pnic_command_quiet()
63 _output_length = inw ( pnic->ioaddr + PNIC_REG_LEN ); in pnic_command_quiet()
81 insb ( pnic->ioaddr + PNIC_REG_DATA, output, _output_length ); in pnic_command_quiet()
234 pnic->ioaddr = pci->ioaddr; in pnic_probe()
/external/syslinux/gpxe/src/include/gpxe/
Dvirtio-pci.h40 static inline u32 vp_get_features(unsigned int ioaddr) in vp_get_features() argument
42 return inl(ioaddr + VIRTIO_PCI_HOST_FEATURES); in vp_get_features()
45 static inline void vp_set_features(unsigned int ioaddr, u32 features) in vp_set_features() argument
47 outl(features, ioaddr + VIRTIO_PCI_GUEST_FEATURES); in vp_set_features()
50 static inline void vp_get(unsigned int ioaddr, unsigned offset, in vp_get() argument
57 ptr[i] = inb(ioaddr + VIRTIO_PCI_CONFIG + offset + i); in vp_get()
60 static inline u8 vp_get_status(unsigned int ioaddr) in vp_get_status() argument
62 return inb(ioaddr + VIRTIO_PCI_STATUS); in vp_get_status()
65 static inline void vp_set_status(unsigned int ioaddr, u8 status) in vp_set_status() argument
69 outb(status, ioaddr + VIRTIO_PCI_STATUS); in vp_set_status()
[all …]
/external/syslinux/gpxe/src/drivers/bus/
Dvirtio-pci.c19 int vp_find_vq(unsigned int ioaddr, int queue_index, in vp_find_vq() argument
27 outw(queue_index, ioaddr + VIRTIO_PCI_QUEUE_SEL); in vp_find_vq()
31 num = inw(ioaddr + VIRTIO_PCI_QUEUE_NUM); in vp_find_vq()
44 if (inl(ioaddr + VIRTIO_PCI_QUEUE_PFN)) { in vp_find_vq()
61 ioaddr + VIRTIO_PCI_QUEUE_PFN); in vp_find_vq()
Deisa.c24 outb ( EISA_CMD_RESET, eisa->ioaddr + EISA_GLOBAL_CONFIG ); in eisa_device_enabled()
31 eisa->ioaddr + EISA_GLOBAL_CONFIG ); in eisa_device_enabled()
55 isa_id_string ( eisa->vendor_id, eisa->prod_id ), eisa->ioaddr ); in eisa_probe()
113 eisa->ioaddr = EISA_SLOT_BASE ( eisa->slot ); in eisabus_probe()
116 outb ( 0xff, eisa->ioaddr + EISA_VENDOR_ID ); in eisabus_probe()
118 le16_to_cpu ( inw ( eisa->ioaddr + EISA_VENDOR_ID ) ); in eisabus_probe()
120 le16_to_cpu ( inw ( eisa->ioaddr + EISA_PROD_ID ) ); in eisabus_probe()

123