/external/capstone/suite/MC/ARM/ |
D | arm-memory-instructions.s.cs | 58 0xd0,0x30,0xd4,0xe1 = ldrsb r3, [r4] 59 0xd1,0x21,0xd7,0xe1 = ldrsb r2, [r7, #17] 60 0xdf,0x1f,0xf8,0xe1 = ldrsb r1, [r8, #255]! 61 0xd9,0xc0,0xdd,0xe0 = ldrsb r12, [sp], #9 62 0xd4,0x60,0x95,0xe1 = ldrsb r6, [r5, r4] 63 0xdb,0x30,0xb8,0xe1 = ldrsb r3, [r8, r11]! 64 0xd1,0x10,0x32,0xe1 = ldrsb r1, [r2, -r1]! 65 0xd2,0x90,0x97,0xe0 = ldrsb r9, [r7], r2 66 0xd2,0x40,0x13,0xe0 = ldrsb r4, [r3], -r2
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D | basic-thumb2-instructions.s.cs | 290 0x1f,0xf9,0x00,0xb0 = ldrsb.w r11, [pc, #-0] 357 0x15,0xf9,0x04,0x5c = ldrsb r5, [r5, #-4] 358 0x96,0xf9,0x20,0x50 = ldrsb.w r5, [r6, #32] 359 0x96,0xf9,0x21,0x50 = ldrsb.w r5, [r6, #33] 360 0x96,0xf9,0x01,0x51 = ldrsb.w r5, [r6, #257] 361 0x97,0xf9,0x01,0xe1 = ldrsb.w lr, [r7, #257] 362 0x18,0xf9,0x01,0x10 = ldrsb.w r1, [r8, r1] 363 0x15,0xf9,0x02,0x40 = ldrsb.w r4, [r5, r2] 364 0x10,0xf9,0x32,0x60 = ldrsb.w r6, [r0, r2, lsl #3] 365 0x18,0xf9,0x22,0x80 = ldrsb.w r8, [r8, r2, lsl #2] [all …]
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/external/llvm/test/MC/AArch64/ |
D | arm64-elf-relocs.s | 92 ldrsb w5, [x7, #:lo12:sym] 93 ldrsb x11, [x13, :lo12:sym] 105 ldrsb w23, [x19, #:dtprel_lo12:sym] 106 ldrsb x17, [x13, :dtprel_lo12_nc:sym] 118 ldrsb w3, [x4, #:tprel_lo12_nc:sym] 119 ldrsb x5, [x6, :tprel_lo12:sym]
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D | arm64-tls-relocs.s | 121 ldrsb x29, [x28, #:tprel_lo12_nc:var] 245 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
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D | tls-relocs.s | 129 ldrsb x29, [x28, #:dtprel_lo12_nc:var] 331 ldrsb x29, [x28, #:tprel_lo12_nc:var]
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D | basic-a64-diagnostics.s | 2004 ldrsb x2, [x3], #256 2005 ldrsb x22, [x13], #-257 2029 ldrsb w2, [x3], #256 2030 ldrsb w22, [x13], #-257 2187 ldrsb x2, [x3, #256]! 2188 ldrsb x22, [x13, #-257]! 2212 ldrsb w2, [x3, #256]! 2213 ldrsb w22, [x13, #-257]! 2456 ldrsb w9, [x4, x2, lsl #-1]
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D | arm64-memory.s | 20 ldrsb w9, [x3] 21 ldrsb x2, [sp, #128] 55 ; CHECK: ldrsb w9, [x3] ; encoding: [0x69,0x00,0xc0,0x39] 56 ; CHECK: ldrsb x2, [sp, #128] ; encoding: [0xe2,0x03,0x82,0x39] 607 ldrsb w6, [x4, #-1] 608 ldrsb x7, [x5, #-1]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4 195 # CHECK: ldrsb r2, [r7, #17 196 # CHECK: ldrsb r1, [r8, #255]! 197 # CHECK: ldrsb r12, [sp], #9 213 # CHECK: ldrsb r6, [r5, r4 214 # CHECK: ldrsb r3, [r8, r11]! 215 # CHECK: ldrsb r1, [r2, -r1]! 216 # CHECK: ldrsb r9, [r7], r2 217 # CHECK: ldrsb r4, [r3], -r2
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/external/llvm/test/MC/Disassembler/ARM/ |
D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4 195 # CHECK: ldrsb r2, [r7, #17 196 # CHECK: ldrsb r1, [r8, #255]! 197 # CHECK: ldrsb r12, [sp], #9 213 # CHECK: ldrsb r6, [r5, r4 214 # CHECK: ldrsb r3, [r8, r11]! 215 # CHECK: ldrsb r1, [r2, -r1]! 216 # CHECK: ldrsb r9, [r7], r2 217 # CHECK: ldrsb r4, [r3], -r2
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D | thumb2.txt | 786 # CHECK: ldrsb r5, [r5, #-4] 787 # CHECK: ldrsb.w r5, [r6, #32] 788 # CHECK: ldrsb.w r5, [r6, #33] 789 # CHECK: ldrsb.w r5, [r6, #257] 790 # CHECK: ldrsb.w lr, [r7, #257] 802 # CHECK: ldrsb.w r1, [r8, r1] 803 # CHECK: ldrsb.w r4, [r5, r2] 804 # CHECK: ldrsb.w r6, [r0, r2, lsl #3] 805 # CHECK: ldrsb.w r8, [r8, r2, lsl #2] 806 # CHECK: ldrsb.w r7, [sp, r2, lsl #1] [all …]
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/external/llvm/test/CodeGen/ARM/ |
D | trunc_ldr.ll | 28 ; CHECK: ldrsb{{.*}}7 29 ; CHECK-NOT: ldrsb{{.*}}7
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D | load.ll | 8 ; CHECK: ldrsb r0, [r0, r1] 101 ; CHECK-T2: ldrsb.w r0, [r0] 177 ; CHECK-T1: ldrsb r0, [r0, r1] 178 ; CHECK-T2: ldrsb.w r0, [r0, #31] 262 ; CHECK-T1: ldrsb r0, [r0, r1] 263 ; CHECK-T2: ldrsb.w r0, [r0, #32] 359 ; CHECK-T1: ldrsb r0, [r0, r1] 360 ; CHECK-T2: ldrsb.w r0, [r0, #4095] 463 ; CHECK: ldrsb r0, [r0, r1]
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D | fast-isel-ldrh-strh-arm.ll | 128 ; ARM: ldrsb r0, [r0, #-8] 137 ; ARM: ldrsb r0, [r0, #-255] 148 ; ARM: ldrsb r0, [r0]
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D | fast-isel-fold.ll | 77 ; ARM: ldrsb 80 ; THUMB: ldrsb
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/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-ldr_ext.ll | 33 ; CHECK: ldrsb 34 ; CHECK-NOT: ldrsb
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D | thumb2-ldr_pre.ll | 31 ; CHECK: ldrsb{{.*}}!
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-abi.ll | 10 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #5] 11 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #4] 13 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp] 15 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #5] 16 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #4] 18 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp]
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D | fast-isel-int-ext2.ll | 221 ; CHECK: ldrsb w0, [x0, x1] 249 ; CHECK: ldrsb x0, [x0, x1] 367 ; CHECK: ldrsb w0, [x0, w1, sxtw] 397 ; CHECK: ldrsb x0, [x0, w1, sxtw]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 837 ldrsb r5, [r5, #-4] 838 ldrsb r5, [r6, #32] 839 ldrsb r5, [r6, #33] 840 ldrsb r5, [r6, #257] 841 ldrsb.w lr, [r7, #257] 843 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c] 844 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50] 845 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50] 846 @ CHECK: ldrsb.w r5, [r6, #257] @ encoding: [0x96,0xf9,0x01,0x51] 847 @ CHECK: ldrsb.w lr, [r7, #257] @ encoding: [0x97,0xf9,0x01,0xe1] [all …]
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 932 ldrsb r11, [pc, #-0] 938 @ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0] 1142 ldrsb r5, [r5, #-4] 1143 ldrsb r5, [r6, #32] 1144 ldrsb r5, [r6, #33] 1145 ldrsb r5, [r6, #257] 1146 ldrsb.w lr, [r7, #257] 1148 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c] 1149 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50] 1150 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50] [all …]
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | trunc_ldr.ll | 2 ; RUN: llc < %s -march=arm | grep ldrsb.*7 | count 1
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D | load.ll | 2 ; RUN: grep ldrsb %t
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D | ldr_ext.ll | 18 ; CHECK: ldrsb
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
D | thumb2-ldr_pre.ll | 4 ; RUN: grep {ldrsb.*\\!} | count 1
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 950 0xfb,0xff,0xff,0x39 = ldrsb w27, [sp, #4095] 951 0xff,0x01,0x80,0x39 = ldrsb xzr, [x15] 984 0xca,0x6b,0xe7,0x38 = ldrsb w10, [x30, x7] 988 0x2f,0x5b,0xe7,0x38 = ldrsb w15, [x25, w7, uxtw #0] 990 0xd2,0xda,0xaa,0x38 = ldrsb x18, [x22, w10, sxtw #0] 1064 0x3f,0xf5,0x8f,0x38 = ldrsb xzr, [x9], #255 1065 0x62,0x14,0x80,0x38 = ldrsb x2, [x3], #1 1066 0x93,0x05,0x90,0x38 = ldrsb x19, [x12], #-256 1073 0x3f,0xf5,0xcf,0x38 = ldrsb wzr, [x9], #255 1074 0x62,0x14,0xc0,0x38 = ldrsb w2, [x3], #1 [all …]
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