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Searched refs:mcrr2 (Results 1 – 25 of 25) sorted by relevance

/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dintrinsics.ll16 ; CHECK: mcrr2
17 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
29 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
/external/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll16 ; CHECK: mcrr2 p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1
17 tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
65 declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-thumbv8.txt84 # CHECK-V7: mcrr2
89 # CHECK-V7: mcrr2
94 # CHECK-V7: mcrr2
Dinvalid-armv8.txt84 # CHECK-V7: mcrr2
89 # CHECK-V7: mcrr2
94 # CHECK-V7: mcrr2
Dthumb2.txt1033 # CHECK: mcrr2 p7, #15, r5, r4, c1
Dbasic-arm-instructions.txt721 # CHECK: mcrr2 p7, #15, r5, r4, c1
/external/clang/test/CodeGen/
Dbuiltins-arm.c191 void mcrr2(uint64_t a) { in mcrr2() function
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Ddiagnostics.s84 mcrr2 p7, #16, r5, r4, c1
Dbasic-arm-instructions.s802 mcrr2 p7, #15, r5, r4, c1
805 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
Dbasic-thumb2-instructions.s1078 mcrr2 p7, #15, r5, r4, c1
1081 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
/external/llvm/test/MC/ARM/
Ddiagnostics.s146 mcrr2 p7, #16, r5, r4, c1
Dbasic-arm-instructions.s1256 mcrr2 p7, #15, r5, r4, c1
1259 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
Dbasic-thumb2-instructions.s1391 mcrr2 p7, #15, r5, r4, c1
1394 @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs346 0xf1,0x57,0x44,0xfc = mcrr2 p7, #15, r5, r4, c1
Dbasic-thumb2-instructions.s.cs432 0x44,0xfc,0xf1,0x57 = mcrr2 p7, #15, r5, r4, c1
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt640 # CHECK: mcrr2 p7, #15, r5, r4, c1
Dthumb2.txt916 # CHECK: mcrr2 p7, #15, r5, r4, c1
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td3696 def t2MCRR2 : t2MovRRCopro<0b1111, "mcrr2", 0,
DARMInstrInfo.td4546 def MCRR2 : MovRRCopro2<"mcrr2", 0 /* from ARM core register to coprocessor */,
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td4244 def t2MCRR2 : t2MovRRCopro<0b1111, "mcrr2", 0, (outs),
DARMInstrInfo.td5170 def MCRR2 : MovRRCopro2<"mcrr2", 0 /* from ARM core register to coprocessor */,
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen547 arm_mcrr2, // llvm.arm.mcrr2
6571 "llvm.arm.mcrr2",
14456 3, // llvm.arm.mcrr2
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen552 arm_mcrr2, // llvm.arm.mcrr2
6610 "llvm.arm.mcrr2",
14550 3, // llvm.arm.mcrr2
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen552 arm_mcrr2, // llvm.arm.mcrr2
6610 "llvm.arm.mcrr2",
14550 3, // llvm.arm.mcrr2
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen552 arm_mcrr2, // llvm.arm.mcrr2
6610 "llvm.arm.mcrr2",
14550 3, // llvm.arm.mcrr2