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1; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
2; RUN: llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 | FileCheck %s
3
4define void @coproc() nounwind {
5entry:
6  ; CHECK: mrc
7  %0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
8  ; CHECK: mcr
9  tail call void @llvm.arm.mcr(i32 7, i32 1, i32 %0, i32 1, i32 1, i32 4) nounwind
10  ; CHECK: mrc2
11  %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
12  ; CHECK: mcr2
13  tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind
14  ; CHECK: mcrr
15  tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
16  ; CHECK: mcrr2
17  tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
18  ; CHECK: cdp
19  tail call void @llvm.arm.cdp(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
20  ; CHECK: cdp2
21  tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
22  ret void
23}
24
25declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
26
27declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
28
29declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
30
31declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
32
33declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
34
35declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
36
37declare void @llvm.arm.mcr(i32, i32, i32, i32, i32, i32) nounwind
38
39declare i32 @llvm.arm.mrc(i32, i32, i32, i32, i32) nounwind
40