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Searched refs:outb (Results 1 – 25 of 76) sorted by relevance

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/external/syslinux/gpxe/src/drivers/net/
Dne2k_isa.c48 outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND); in eth_pio_read()
49 outb(cnt, eth_nic_base + D8390_P0_RBCR0); in eth_pio_read()
50 outb(cnt >> 8, eth_nic_base + D8390_P0_RBCR1); in eth_pio_read()
51 outb(src, eth_nic_base + D8390_P0_RSAR0); in eth_pio_read()
52 outb(src >> 8, eth_nic_base + D8390_P0_RSAR1); in eth_pio_read()
53 outb(D8390_COMMAND_RD0 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND); in eth_pio_read()
71 outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND); in eth_pio_write()
72 outb(D8390_ISR_RDC, eth_nic_base + D8390_P0_ISR); in eth_pio_write()
73 outb(cnt, eth_nic_base + D8390_P0_RBCR0); in eth_pio_write()
74 outb(cnt >> 8, eth_nic_base + D8390_P0_RBCR1); in eth_pio_write()
[all …]
Dns8390.c134 outb(src & 0xff, eth_asic_base + WD_GP2);
135 outb(src >> 8, eth_asic_base + WD_GP2);
137 outb(D8390_COMMAND_RD2 |
139 outb(cnt, eth_nic_base + D8390_P0_RBCR0);
140 outb(cnt>>8, eth_nic_base + D8390_P0_RBCR1);
141 outb(src, eth_nic_base + D8390_P0_RSAR0);
142 outb(src>>8, eth_nic_base + D8390_P0_RSAR1);
143 outb(D8390_COMMAND_RD0 |
147 outb(src & 0xff, eth_asic_base + _3COM_DALSB);
148 outb(src >> 8, eth_asic_base + _3COM_DAMSB);
[all …]
Deepro.c267 #define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(255);
272 outb ( SEL_RESET_CMD, ioaddr ); \
278 #define eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG)
281 #define eepro_en_rx(ioaddr) outb(RCV_ENABLE_CMD, ioaddr)
284 #define eepro_dis_rx(ioaddr) outb(RCV_DISABLE_CMD, ioaddr)
287 #define eepro_sw2bank0(ioaddr) outb(BANK0_SELECT, ioaddr)
288 #define eepro_sw2bank1(ioaddr) outb(BANK1_SELECT, ioaddr)
289 #define eepro_sw2bank2(ioaddr) outb(BANK2_SELECT, ioaddr)
309 outb(temp_reg & 0xEF, nic->ioaddr + eeprom_reg); in eepro_reset()
311 outb(nic->node_addr[i], nic->ioaddr + I_ADD_REG0 + i); in eepro_reset()
[all …]
Dvia-rhine.c705 outb(0x20, byEECSR); in reload_eeprom()
791 outb (byMIICRbak & 0x7f, byMIICR); in ReadMII()
794 outb (byMIIIndex, byMIIAD); in ReadMII()
797 outb (inb (byMIICR) | 0x40, byMIICR); in ReadMII()
812 outb (byMIIAdrbak, byMIIAD); in ReadMII()
813 outb (byMIICRbak, byMIICR); in ReadMII()
834 outb (byMIICRbak & 0x7f, byMIICR); in WriteMII()
836 outb (byMIISetByte, byMIIAD); in WriteMII()
839 outb (inb (byMIICR) | 0x40, byMIICR); in WriteMII()
870 outb (inb (byMIICR) | 0x20, byMIICR); in WriteMII()
[all …]
D3c509.c81 outb ( 0x00, t509_id_port ); in t509_set_id_port()
85 outb ( 0x00, t509_id_port ); in t509_wait_for_id_sequence()
89 outb ( 0xc0, t509_id_port ); in t509_global_reset()
93 outb ( 0xd0, t509_id_port ); in t509_reset_tag()
97 outb ( 0xd0 | tag, t509_id_port ); in t509_set_tag()
101 outb ( 0xd8 | tag, t509_id_port ); in t509_select_tag()
105 outb ( 0xe0 | ( ioaddr >> 4 ), t509_id_port ); in t509_activate()
109 outb ( GLOBAL_RESET, ioaddr + EP_COMMAND ); in t509_deactivate_and_reset_tag()
113 outb ( 0x80 | offset, t509_id_port ); in t509_load_eeprom_word()
127 outb ( 0xff, t509_id_port ); in t509_find_id_port()
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/external/libjpeg-turbo/simd/
Djidctfst-altivec.c126 __vector signed char outb; in jsimd_idct_ifast_altivec() local
210 outb = vec_packs(col0, col0); in jsimd_idct_ifast_altivec()
211 outb = vec_add(outb, pb_centerjsamp); in jsimd_idct_ifast_altivec()
213 vec_ste((__vector int)outb, 0, outptr); in jsimd_idct_ifast_altivec()
214 vec_ste((__vector int)outb, 4, outptr); in jsimd_idct_ifast_altivec()
216 outb = vec_packs(col1, col1); in jsimd_idct_ifast_altivec()
217 outb = vec_add(outb, pb_centerjsamp); in jsimd_idct_ifast_altivec()
219 vec_ste((__vector int)outb, 0, outptr); in jsimd_idct_ifast_altivec()
220 vec_ste((__vector int)outb, 4, outptr); in jsimd_idct_ifast_altivec()
222 outb = vec_packs(col2, col2); in jsimd_idct_ifast_altivec()
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Djidctint-altivec.c227 __vector signed char outb; in jsimd_idct_islow_altivec() local
312 outb = vec_packs(col0, col0); in jsimd_idct_islow_altivec()
313 outb = vec_add(outb, pb_centerjsamp); in jsimd_idct_islow_altivec()
315 vec_ste((__vector int)outb, 0, outptr); in jsimd_idct_islow_altivec()
316 vec_ste((__vector int)outb, 4, outptr); in jsimd_idct_islow_altivec()
318 outb = vec_packs(col1, col1); in jsimd_idct_islow_altivec()
319 outb = vec_add(outb, pb_centerjsamp); in jsimd_idct_islow_altivec()
321 vec_ste((__vector int)outb, 0, outptr); in jsimd_idct_islow_altivec()
322 vec_ste((__vector int)outb, 4, outptr); in jsimd_idct_islow_altivec()
324 outb = vec_packs(col2, col2); in jsimd_idct_islow_altivec()
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/external/syslinux/com32/libupload/
Dserial.c83 outb(0x83, port + LCR); /* Enable divisor access */ in serial_init()
86 outb(divisor, port + DLL); in serial_init()
87 outb(divisor >> 8, port + DLM); in serial_init()
93 outb(0x03, port + LCR); /* Enable data access, n81 */ in serial_init()
98 outb(0, port + IER); in serial_init()
111 outb(0x01, port + FCR); /* Enable FIFO */ in serial_init()
114 outb(0x00, port + FCR); /* Disable FIFOs if non-functional */ in serial_init()
131 outb(*p++, port + THR); in serial_write()
154 outb(0x83, port + LCR); in serial_cleanup()
156 outb(sif->old.dll, port + DLL); in serial_cleanup()
[all …]
/external/syslinux/com32/lib/
Dvdprintf.c41 outb(c, debug_base + THR); in debug_putc()
72 outb(0x83, debug_base + LCR); in vdprintf()
73 outb(0x01, debug_base + DLL); in vdprintf()
74 outb(0x00, debug_base + DLM); in vdprintf()
80 outb(0x03, debug_base + LCR); in vdprintf()
83 outb(0x00, debug_base + IER); in vdprintf()
93 outb(0x01, debug_base + FCR); in vdprintf()
96 outb(0x00, debug_base + FCR); /* Disable non-functional FIFOs */ in vdprintf()
/external/syslinux/core/
Dserirq.c141 outb(0x3, SerialIRQPort + 5); in sirq_install()
145 outb(0x1, SerialIRQPort + 1); in sirq_install()
163 outb(0x21, 0); in sirq_install()
164 outb(0xA1, 0); in sirq_install()
176 outb(0x3, SerialIRQPort + 5); in sirq_cleanup_nowipe()
180 outb(0x0, SerialIRQPort + 1); in sirq_cleanup_nowipe()
184 outb(IRQMask[0], 0x21); in sirq_cleanup_nowipe()
185 outb(IRQMask[1], 0xA1); in sirq_cleanup_nowipe()
/external/syslinux/com32/lib/pci/
Dcfgtype.c17 outb(1, 0xcfb); /* For old Intel chipsets */ in type1_ok()
37 outb(0, 0xcfb); /* For old Intel chipsets */ in type2_ok()
39 outb(0, 0xcf8); in type2_ok()
41 outb(0, 0xcfa); in type2_ok()
46 outb(oldcf8, 0xcf8); in type2_ok()
47 outb(oldcfa, 0xcfa); in type2_ok()
Dwritex.c33 outb(0xf0 + ((a >> (8 - 1)) & 0x0e), 0xcf8); in BWL()
34 outb(a >> 16, 0xcfa); in BWL()
36 outb(oldcf8, 0xcf8); in BWL()
37 outb(oldcfa, 0xcfa); in BWL()
Dreadx.c35 outb(0xf0 + ((a >> (8 - 1)) & 0x0e), 0xcf8); in BWL()
36 outb(a >> 16, 0xcfa); in BWL()
38 outb(oldcf8, 0xcf8); in BWL()
39 outb(oldcfa, 0xcfa); in BWL()
/external/syslinux/gpxe/src/arch/i386/include/
Dvga.h30 #define write_crtc(data,addr) outb(addr,CRT_IC); outb(data,CRT_DC)
31 #define write_att(data,addr) inb(IS1_RC); inb(0x80); outb(addr,ATT_IW); inb(0x80); outb(data,ATT_IW…
32 #define write_seq(data,addr) outb(addr,SEQ_I); outb(data,SEQ_D)
33 #define write_gra(data,addr) outb(addr,GRA_I); outb(data,GRA_D)
Dpic8259.h52 #define enable_irq(x) outb ( inb( IMR_REG(x) ) & ~IMR_BIT(x), IMR_REG(x) )
53 #define disable_irq(x) outb ( inb( IMR_REG(x) ) | IMR_BIT(x), IMR_REG(x) )
/external/syslinux/gpxe/src/arch/i386/core/
Dpic8259.c40 outb ( ICR_EOI_NON_SPECIFIC, PIC2_ICR ); in send_nonspecific_eoi()
42 outb ( ICR_EOI_NON_SPECIFIC, PIC1_ICR ); in send_nonspecific_eoi()
53 outb ( ( ICR_EOI_SPECIFIC | ICR_VALUE ( CHAINED_IRQ ) ), in send_specific_eoi()
56 outb ( ( ICR_EOI_SPECIFIC | ICR_VALUE ( irq ) ), ICR_REG ( irq ) ); in send_specific_eoi()
Dtimer2.c69 outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB); in load_timer2()
71 outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT); in load_timer2()
73 outb(ticks & 0xFF, TIMER2_PORT); in load_timer2()
75 outb(ticks >> 8, TIMER2_PORT); in load_timer2()
/external/syslinux/gpxe/src/arch/i386/firmware/pcbios/
DgateA20.c133 outb ( KC_CMD_WOUT, K_CMD ); in gateA20_set()
135 outb ( KB_SET_A20, K_RDWR ); in gateA20_set()
137 outb ( KC_CMD_NULL, K_CMD ); in gateA20_set()
152 outb ( scp_a, SCP_A ); in gateA20_set()
/external/syslinux/gpxe/src/core/
Di82365.c128 outb(reg, port); val = inb(port+1); in i365_get()
141 outb(val, port); outb(data, port+1); in i365_set()
226 outb(0x0e, port); in identify_i365()
227 outb(0x37, port); in identify_i365()
/external/llvm/test/MC/X86/
Dvalidate-inst-att.s19 outb %al, $65535
21 # CHECK: outb %al, $65535
/external/syslinux/gpxe/src/drivers/bus/
Deisa.c24 outb ( EISA_CMD_RESET, eisa->ioaddr + EISA_GLOBAL_CONFIG ); in eisa_device_enabled()
30 outb ( enabled ? EISA_CMD_ENABLE : 0, in eisa_device_enabled()
116 outb ( 0xff, eisa->ioaddr + EISA_VENDOR_ID ); in eisabus_probe()
/external/syslinux/core/include/
Dbios.h55 outb(0x0, IO_DELAY_PORT); in io_delay()
56 outb(0x0, IO_DELAY_PORT); in io_delay()
/external/syslinux/gpxe/src/include/gpxe/
Dvirtio-pci.h69 outb(status, ioaddr + VIRTIO_PCI_STATUS); in vp_set_status()
75 outb(0, ioaddr + VIRTIO_PCI_STATUS); in vp_reset()
Dio.h327 void outb ( uint8_t data, volatile uint8_t *io_addr );
328 #define outb( data, io_addr ) \ macro
329 IOAPI_WRITE ( outb, uint8_t, data, io_addr, "IO", 2 )
480 #define outb_p( data, io_addr ) OUTX_P ( outb, data, io_addr )
/external/syslinux/core/fs/pxe/
Disr.c63 outb(mask, 0x21); in install_irq_vector()
66 outb(mask, 0xa1); in install_irq_vector()
70 outb(mask, 0x21); in install_irq_vector()

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