| /external/valgrind/none/tests/x86/ |
| D | insn_cmov.def | 193 cmova eflags[0x041,0x000] : r32.ud[12345678] r32.ud[0] => 1.ud[12345678]
194 cmova eflags[0x041,0x001] : r32.ud[12345678] r32.ud[0] => 1.ud[0]
195 cmova eflags[0x041,0x040] : r32.ud[12345678] r32.ud[0] => 1.ud[0]
196 cmova eflags[0x041,0x041] : r32.ud[12345678] r32.ud[0] => 1.ud[0]
197 cmova eflags[0x041,0x000] : m32.ud[12345678] r32.ud[0] => 1.ud[12345678]
198 cmova eflags[0x041,0x001] : m32.ud[12345678] r32.ud[0] => 1.ud[0]
199 cmova eflags[0x041,0x040] : m32.ud[12345678] r32.ud[0] => 1.ud[0]
200 cmova eflags[0x041,0x041] : m32.ud[12345678] r32.ud[0] => 1.ud[0]
201 cmovae eflags[0x001,0x000] : r32.ud[12345678] r32.ud[0] => 1.ud[12345678]
202 cmovae eflags[0x001,0x001] : r32.ud[12345678] r32.ud[0] => 1.ud[0]
[all …]
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| D | insn_basic.def | 47 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
48 adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
55 adcl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
56 adcl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
57 adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
58 adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
59 adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
60 adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
74 addl imm8[12] r32.ud[87654321] => 1.ud[87654333]
78 addl r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
[all …]
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| D | insn_mmxext.def | 6 pextrw imm8[0] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[1234]
7 pextrw imm8[1] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[5678]
8 pextrw imm8[2] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[4321]
9 pextrw imm8[3] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[8765]
10 pinsrw imm8[0] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[65535,5678,4321,8765]
11 pinsrw imm8[1] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[1234,65535,4321,8765]
12 pinsrw imm8[2] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[1234,5678,65535,8765]
13 pinsrw imm8[3] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[1234,5678,4321,65535]
22 pmovmskb mm.uq[0x8000000080008088] r32.ud[0] => 1.ud[0x8b]
|
| D | insn_sse.def | 51 cvtsi2ss r32.sd[12] xmm.ps[1.11,2.22,3.33,4.44] => 1.ps[12.0,2.22,3.33,4.44]
53 cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
54 cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[57]
57 cvttss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
58 cvttss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[56]
79 movmskps xmm.ps[12.34,-56.78,43.21,-87.65] r32.sd[0] => 1.sd[10]
97 pextrw imm8[0] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[1234]
98 pextrw imm8[1] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[5678]
99 pextrw imm8[2] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[4321]
100 pextrw imm8[3] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[8765]
[all …]
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| D | insn_sse2.def | 63 cvtsd2si xmm.pd[12.34,56.78] r32.sd[99] => 1.sd[12]
64 cvtsd2si m128.pd[56.78,12.34] r32.sd[99] => 1.sd[57]
67 cvtsi2sd r32.sd[12] xmm.pd[1.11,2.22] => 1.pd[12.0,2.22]
77 cvttsd2si xmm.pd[12.34,56.78] r32.sd[99] => 1.sd[12]
78 cvttsd2si m128.pd[56.78,12.34] r32.sd[99] => 1.sd[56]
95 movd r32.sd[1234] xmm.sd[1111,2222,3333,4444] => 1.sd[1234,0,0,0]
97 movd xmm.sd[1234,2222,3333,4444] r32.sd[1111] => 1.sd[1234]
110 movmskpd xmm.pd[1234.5678,-1234.5678] r32.sd[0] => 1.sd[2]
112 movnti r32.sd[12345678] m32.sd[11111111] => 1.sd[12345678]
173 pextrw imm8[0] xmm.uw[1234,5678,4321,8765,1111,2222,3333,4444] r32.ud[0xffffffff] => 2.ud[1234]
[all …]
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| D | gen_insn_test.pl | 10 r32 => "reg32_t",
71 { r8 => "al", r16 => "ax", r32 => "eax" },
72 { r8 => "bl", r16 => "bx", r32 => "ebx" },
73 { r8 => "cl", r16 => "cx", r32 => "ecx" },
74 { r8 => "dl", r16 => "dx", r32 => "edx" },
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| /external/valgrind/none/tests/amd64/ |
| D | insn_basic.def | 27 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
28 adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
35 adcl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
36 adcl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
37 adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
38 adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
39 adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
40 adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
68 addl imm8[12] r32.ud[87654321] => 1.ud[87654333]
72 addl r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
[all …]
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| D | insn_sse.def | 51 cvtsi2ss r32.sd[12] xmm.ps[1.11,2.22,3.33,4.44] => 1.ps[12.0,2.22,3.33,4.44]
53 cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
54 cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[57]
57 cvttss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
58 cvttss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[56]
79 movmskps xmm.ps[12.34,-56.78,43.21,-87.65] r32.sd[0] => 1.sd[10]
97 pextrw imm8[0] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[1234]
98 pextrw imm8[1] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[5678]
99 pextrw imm8[2] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[4321]
100 pextrw imm8[3] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[8765]
[all …]
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| D | insn_sse2.def | 63 cvtsd2si xmm.pd[12.34,56.78] r32.sd[99] => 1.sd[12]
64 cvtsd2si m128.pd[56.78,12.34] r32.sd[99] => 1.sd[57]
67 cvtsi2sd r32.sd[12] xmm.pd[1.11,2.22] => 1.pd[12.0,2.22]
77 cvttsd2si xmm.pd[12.34,56.78] r32.sd[99] => 1.sd[12]
78 cvttsd2si m128.pd[56.78,12.34] r32.sd[99] => 1.sd[56]
95 movd r32.sd[1234] xmm.sd[1111,2222,3333,4444] => 1.sd[1234,0,0,0]
97 movd xmm.sd[1234,2222,3333,4444] r32.sd[1111] => 1.sd[1234]
110 movmskpd xmm.pd[1234.5678,-1234.5678] r32.sd[0] => 1.sd[2]
112 movnti r32.sd[12345678] m32.sd[11111111] => 1.sd[12345678]
173 pextrw imm8[0] xmm.uw[1234,5678,4321,8765,1111,2222,3333,4444] r32.ud[0xffffffff] => 2.ud[1234]
[all …]
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| D | gen_insn_test.pl | 10 r32 => "reg32_t",
87 { r8 => "r9b", r16 => "r9w", r32 => "r9d", r64 => "r9" },
88 { r8 => "r10b", r16 => "r10w", r32 => "r10d", r64 => "r10" },
89 { r8 => "r11b", r16 => "r11w", r32 => "r11d", r64 => "r11" },
90 { r8 => "r12b", r16 => "r12w", r32 => "r12d", r64 => "r12" },
91 { r8 => "al", r16 => "ax", r32 => "eax", r64 => "rax" },
92 { r8 => "bl", r16 => "bx", r32 => "ebx", r64 => "rbx" },
93 { r8 => "cl", r16 => "cx", r32 => "ecx", r64 => "rcx" },
94 { r8 => "dl", r16 => "dx", r32 => "edx", r64 => "rdx" },
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-errors.s | 14 # CHECK-NEXT: add %r32, %r32, %r32
15 add %r32, %r32, %r32
62 # CHECK-NEXT: lwz 1, 0(%r32)
63 lwz 1, 0(%r32)
78 # CHECK-NEXT: ld 1, 0(%r32)
79 ld 1, 0(%r32)
|
| /external/libunwind/src/ia64/ |
| D | setjmp.S | 36 st8 [r32] = r12 // jmp_buf[JB_SP] = sp
39 adds r16 = JB_RP*8, r32
40 adds r17 = JB_BSP*8, r32
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| /external/libunwind/tests/ |
| D | Gia64-test-stack.c | 58 unw_word_t ip, sp, bsp, v0, v1, v2, v3, n0, n1, n2, n3, cfm, sof, sol, r32; in do_unwind_tests() local
114 if ((ret = unw_get_reg (&c, UNW_IA64_GR + 32, &r32)) < 0) in do_unwind_tests()
116 if (r32 != (unw_word_t) (i - 1)) in do_unwind_tests()
117 panic ("\texpected r32=%d, found r32=%lu\n", i - 1, r32); in do_unwind_tests()
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| /external/strace/ |
| D | ipc_shm.c | 102 uint32_t r32; in SYS_FUNC() member
106 tcp->u_rval = (sizeof(u.r32) == current_wordsize) in SYS_FUNC()
107 ? u.r32 : u.r64; in SYS_FUNC()
|
| /external/ltp/runtest/ |
| D | ltp-aio-stress.part2 | 29 ADS2001 aio-stress -I500 -o2 -S -r32 -t2 $TMPDIR/junkfile $TMPDIR/file2
32 ADS2004 aio-stress -I500 -o3 -S -r32 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/fi…
34 ADS2006 aio-stress -I500 -o2 -O -r32 -t2 $TMPDIR/junkfile $TMPDIR/file2
37 ADS2009 aio-stress -I500 -o3 -O -r32 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/fi…
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| D | ltp-aio-stress.part1 | 32 ADS1003 aio-stress -I500 -o2 -S -r32 -t2 $TMPDIR/junkfile $TMPDIR/file2
37 ADS1008 aio-stress -I500 -o3 -S -r32 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/…
45 ADS1016 aio-stress -I500 -o2 -O -r32 -t2 $TMPDIR/junkfile $TMPDIR/file2
50 ADS1021 aio-stress -I500 -o3 -O -r32 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $TMPDIR…
58 ADS1029 aio-stress -I500 -o0 -S -r32 -t2 $TMPDIR/junkfile $TMPDIR/file2
63 ADS1034 aio-stress -I500 -o1 -S -r32 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $TMPD…
71 ADS1042 aio-stress -I500 -o1 -O -r32 -t2 $TMPDIR/junkfile $TMPDIR/file2
76 ADS1047 aio-stress -I500 -o1 -O -r32 -t8 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $TM…
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| /external/jemalloc/test/unit/ |
| D | SFMT.c | 1457 uint32_t r32; in TEST_BEGIN() local
1473 r32 = gen_rand32(ctx); in TEST_BEGIN()
1474 assert_u32_eq(r32, array32[i], in TEST_BEGIN()
1475 "Mismatch at array32[%d]=%x, gen=%x", i, array32[i], r32); in TEST_BEGIN()
1478 r32 = gen_rand32(ctx); in TEST_BEGIN()
1479 assert_u32_eq(r32, array32_2[i], in TEST_BEGIN()
1481 r32); in TEST_BEGIN()
1493 uint32_t r32; in TEST_BEGIN() local
1509 r32 = gen_rand32(ctx); in TEST_BEGIN()
1510 assert_u32_eq(r32, array32[i], in TEST_BEGIN()
[all …]
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| /external/honggfuzz/linux/ |
| D | trace.c | 388 struct user_regs_struct_32* r32 = (struct user_regs_struct_32*)®s; in arch_getPC() local
389 *pc = r32->eip; in arch_getPC()
390 *status_reg = r32->eflags; in arch_getPC()
412 struct user_regs_struct_32* r32 = (struct user_regs_struct_32*)®s; in arch_getPC() local
414 *pc = r32->ARM_pc; in arch_getPC()
415 *status_reg = r32->ARM_cpsr; in arch_getPC()
417 *pc = r32->uregs[ARM_pc]; in arch_getPC()
418 *status_reg = r32->uregs[ARM_cpsr]; in arch_getPC()
441 struct user_regs_struct_32* r32 = (struct user_regs_struct_32*)®s; in arch_getPC() local
442 *pc = r32->nip; in arch_getPC()
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| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| D | pitch_estimator.c | 55 int32_t r32, q32, t32, nom32, den32; in Intrp1DQ8() local
59 r32=fx[1]-fx[2]; in Intrp1DQ8()
61 nom32=q32+r32; in Intrp1DQ8()
62 den32 = (q32 - r32) * 2; in Intrp1DQ8()
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| /external/llvm/lib/Target/X86/ |
| D | X86SchedHaswell.td | 506 // r32.
520 // r32, m32.
532 // m32,r32.
589 // r32.
632 // r32,r32,r32.
640 // r32,r32,m32.
677 // r32.
706 // r32.
1278 // r32/64 <- (x)mm.
1282 // (x)mm <- r32/64.
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 333 // Format i8_MOVR32 instruction class in Mips : <|opcode|func|ry|r32>
342 bits<4> r32;
348 let Inst{3-0} = r32;
355 // Format i8_MOV32R instruction class in Mips : <|opcode|func|r32|rz>
364 bits<5> r32;
371 let Inst{7-5} = r32{2-0};
372 let Inst{4-3} = r32{4-3};
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUInstrInfo.td | 69 def r32: LoadDForm<R32C>;
101 def r32: LoadAForm<R32C>;
133 def r32: LoadXForm<R32C>;
181 def r32: StoreDForm<R32C>;
211 def r32: StoreAForm<R32C>;
243 def r32: StoreXForm<R32C>;
356 def r32: ILRegInst<R32C, s16imm_i32, immSExt16>;
381 def r32: ILHURegInst<R32C, u16imm_i32, hi16>;
413 def r32: ILARegInst<R32C, u18imm, imm18>;
450 def r32: IOHLRegInst<R32C, i32imm>;
[all …]
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| /external/python/cpython3/Modules/_ctypes/libffi/src/sh64/ |
| D | sysv.S | 62 st.q r15, 40, r32
76 add r8, r63, r32
256 ptabs/l r32, tr0
313 ld.q r15, 40, r32
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| /external/libffi/src/sh64/ |
| D | sysv.S | 62 st.q r15, 40, r32
76 add r8, r63, r32
256 ptabs/l r32, tr0
313 ld.q r15, 40, r32
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| /external/python/cpython2/Modules/_ctypes/libffi/src/sh64/ |
| D | sysv.S | 62 st.q r15, 40, r32
76 add r8, r63, r32
256 ptabs/l r32, tr0
313 ld.q r15, 40, r32
|