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Searched refs:sctx (Results 1 – 25 of 43) sorted by relevance

12

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_draw.c93 static void si_emit_derived_tess_state(struct si_context *sctx, in si_emit_derived_tess_state() argument
97 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_derived_tess_state()
98 struct si_shader_ctx_state *ls = &sctx->vs_shader; in si_emit_derived_tess_state()
102 sctx->tcs_shader.cso ? sctx->tcs_shader.cso : sctx->tes_shader.cso; in si_emit_derived_tess_state()
103 unsigned tes_sh_base = sctx->shader_userdata.sh_base[PIPE_SHADER_TESS_EVAL]; in si_emit_derived_tess_state()
113 if (sctx->last_ls == ls->current && in si_emit_derived_tess_state()
114 sctx->last_tcs == tcs && in si_emit_derived_tess_state()
115 sctx->last_tes_sh_base == tes_sh_base && in si_emit_derived_tess_state()
116 sctx->last_num_tcs_input_cp == num_tcs_input_cp) { in si_emit_derived_tess_state()
117 *num_patches = sctx->last_num_patches; in si_emit_derived_tess_state()
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Dsi_descriptors.c136 static bool si_ce_upload(struct si_context *sctx, unsigned ce_offset, unsigned size, in si_ce_upload() argument
140 u_suballocator_alloc(sctx->ce_suballocator, size, 64, out_offset, in si_ce_upload()
147 radeon_emit(sctx->ce_ib, PKT3(PKT3_DUMP_CONST_RAM, 3, 0)); in si_ce_upload()
148 radeon_emit(sctx->ce_ib, ce_offset); in si_ce_upload()
149 radeon_emit(sctx->ce_ib, size / 4); in si_ce_upload()
150 radeon_emit(sctx->ce_ib, va); in si_ce_upload()
151 radeon_emit(sctx->ce_ib, va >> 32); in si_ce_upload()
153 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, *out_buf, in si_ce_upload()
156 sctx->ce_need_synchronization = true; in si_ce_upload()
160 static void si_ce_reinitialize_descriptors(struct si_context *sctx, in si_ce_reinitialize_descriptors() argument
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Dsi_pipe.c43 struct si_context *sctx = (struct si_context *)context; in si_destroy_context() local
52 si_release_all_descriptors(sctx); in si_destroy_context()
54 if (sctx->ce_suballocator) in si_destroy_context()
55 u_suballocator_destroy(sctx->ce_suballocator); in si_destroy_context()
57 pipe_resource_reference(&sctx->esgs_ring, NULL); in si_destroy_context()
58 pipe_resource_reference(&sctx->gsvs_ring, NULL); in si_destroy_context()
59 pipe_resource_reference(&sctx->tf_ring, NULL); in si_destroy_context()
60 pipe_resource_reference(&sctx->tess_offchip_ring, NULL); in si_destroy_context()
61 pipe_resource_reference(&sctx->null_const_buf.buffer, NULL); in si_destroy_context()
62 r600_resource_reference(&sctx->border_color_buffer, NULL); in si_destroy_context()
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Dsi_state_shaders.c855 static unsigned si_get_alpha_test_func(struct si_context *sctx) in si_get_alpha_test_func() argument
858 if (sctx->queued.named.dsa) in si_get_alpha_test_func()
859 return sctx->queued.named.dsa->alpha_func; in si_get_alpha_test_func()
864 static void si_shader_selector_key_hw_vs(struct si_context *sctx, in si_shader_selector_key_hw_vs() argument
868 struct si_shader_selector *ps = sctx->ps_shader.cso; in si_shader_selector_key_hw_vs()
871 sctx->queued.named.rasterizer->clip_plane_enable == 0 && in si_shader_selector_key_hw_vs()
883 si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS; in si_shader_selector_key_hw_vs()
885 unsigned ps_colormask = sctx->framebuffer.colorbuf_enabled_4bit & in si_shader_selector_key_hw_vs()
886 sctx->queued.named.blend->cb_target_mask; in si_shader_selector_key_hw_vs()
890 ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard || in si_shader_selector_key_hw_vs()
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Dsi_compute.c96 struct si_context *sctx = (struct si_context *)ctx; in si_create_compute_state() local
131 if (si_shader_create(sscreen, sctx->tm, &program->shader, in si_create_compute_state()
132 &sctx->b.debug)) { in si_create_compute_state()
172 si_shader_dump(sctx->screen, &program->shader, &sctx->b.debug, in si_create_compute_state()
174 if (si_shader_binary_upload(sctx->screen, &program->shader) < 0) { in si_create_compute_state()
186 struct si_context *sctx = (struct si_context*)ctx; in si_bind_compute_state() local
187 sctx->cs_shader_state.program = (struct si_compute*)state; in si_bind_compute_state()
196 struct si_context *sctx = (struct si_context*)ctx; in si_set_global_binding() local
197 struct si_compute *program = sctx->cs_shader_state.program; in si_set_global_binding()
220 static void si_initialize_compute(struct si_context *sctx) in si_initialize_compute() argument
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Dsi_debug.c153 static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f, in si_dump_mmapped_reg() argument
156 struct radeon_winsys *ws = sctx->b.ws; in si_dump_mmapped_reg()
163 static void si_dump_debug_registers(struct si_context *sctx, FILE *f) in si_dump_debug_registers() argument
165 if (sctx->screen->b.info.drm_major == 2 && in si_dump_debug_registers()
166 sctx->screen->b.info.drm_minor < 42) in si_dump_debug_registers()
170 si_dump_mmapped_reg(sctx, f, R_008010_GRBM_STATUS); in si_dump_debug_registers()
173 if (sctx->screen->b.info.drm_major < 3 || in si_dump_debug_registers()
174 sctx->screen->b.info.drm_minor < 1) { in si_dump_debug_registers()
179 si_dump_mmapped_reg(sctx, f, R_008008_GRBM_STATUS2); in si_dump_debug_registers()
180 si_dump_mmapped_reg(sctx, f, R_008014_GRBM_STATUS_SE0); in si_dump_debug_registers()
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Dsi_blit.c53 struct si_context *sctx = (struct si_context *)ctx; in si_blitter_begin() local
55 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer); in si_blitter_begin()
56 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements); in si_blitter_begin()
57 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso); in si_blitter_begin()
58 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso); in si_blitter_begin()
59 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso); in si_blitter_begin()
60 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso); in si_blitter_begin()
61 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets, in si_blitter_begin()
62 (struct pipe_stream_output_target**)sctx->b.streamout.targets); in si_blitter_begin()
63 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer); in si_blitter_begin()
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Dsi_cp_dma.c51 static void si_emit_cp_dma(struct si_context *sctx, uint64_t dst_va, in si_emit_cp_dma() argument
55 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_cp_dma()
79 if (sctx->b.chip_class >= CIK) { in si_emit_cp_dma()
109 static unsigned get_flush_flags(struct si_context *sctx, enum r600_coherency coher) in get_flush_flags() argument
118 (sctx->b.chip_class == SI ? SI_CONTEXT_INV_GLOBAL_L2 : 0); in get_flush_flags()
125 static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency coher) in get_tc_l2_flag() argument
128 sctx->b.chip_class >= CIK ? CP_DMA_USE_L2 : 0; in get_tc_l2_flag()
131 static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst, in si_cp_dma_prepare() argument
144 r600_context_add_resource_size(&sctx->b.b, dst); in si_cp_dma_prepare()
146 r600_context_add_resource_size(&sctx->b.b, src); in si_cp_dma_prepare()
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Dsi_state.c40 si_init_external_atom(struct si_context *sctx, struct r600_atom *atom, in si_init_external_atom() argument
43 atom->id = list_elem - sctx->atoms.array + 1; in si_init_external_atom()
48 void si_init_atom(struct si_context *sctx, struct r600_atom *atom, in si_init_atom() argument
53 atom->id = list_elem - sctx->atoms.array + 1; /* index+1 in the atom array */ in si_init_atom()
93 static void si_emit_cb_render_state(struct si_context *sctx, struct r600_atom *atom) in si_emit_cb_render_state() argument
95 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_emit_cb_render_state()
96 struct si_state_blend *blend = sctx->queued.named.blend; in si_emit_cb_render_state()
99 uint32_t cb_target_mask = sctx->framebuffer.colorbuf_enabled_4bit; in si_emit_cb_render_state()
112 sctx->ps_shader.cso && in si_emit_cb_render_state()
113 (sctx->ps_shader.cso->info.colors_written & 0x3) != 0x3) in si_emit_cb_render_state()
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Dsi_state.h263 #define si_pm4_state_changed(sctx, member) \ argument
264 ((sctx)->queued.named.member != (sctx)->emitted.named.member)
266 #define si_pm4_bind_state(sctx, member, value) \ argument
268 (sctx)->queued.named.member = (value); \
271 #define si_pm4_delete_state(sctx, member, value) \ argument
273 if ((sctx)->queued.named.member == (value)) { \
274 (sctx)->queued.named.member = NULL; \
276 si_pm4_free_state(sctx, (struct si_pm4_state *)(value), \
281 void si_ce_reinitialize_all_descriptors(struct si_context *sctx);
288 void si_get_pipe_constant_buffer(struct si_context *sctx, uint shader,
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Dsi_pipe.h360 void cik_init_sdma_functions(struct si_context *sctx);
363 void si_init_blit_functions(struct si_context *sctx);
364 void si_decompress_graphics_textures(struct si_context *sctx);
365 void si_decompress_compute_textures(struct si_context *sctx);
386 void si_copy_buffer(struct si_context *sctx,
390 void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf,
392 void si_init_cp_dma_functions(struct si_context *sctx);
395 void si_init_debug_functions(struct si_context *sctx);
401 void si_init_dma_functions(struct si_context *sctx);
410 void si_init_compute_functions(struct si_context *sctx);
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Dsi_pm4.c121 void si_pm4_free_state(struct si_context *sctx, in si_pm4_free_state() argument
128 if (idx != ~0 && sctx->emitted.array[idx] == state) { in si_pm4_free_state()
129 sctx->emitted.array[idx] = NULL; in si_pm4_free_state()
135 void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state) in si_pm4_emit() argument
137 struct radeon_winsys_cs *cs = sctx->b.gfx.cs; in si_pm4_emit()
140 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, state->bo[i], in si_pm4_emit()
149 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, ib, in si_pm4_emit()
160 void si_pm4_emit_dirty(struct si_context *sctx) in si_pm4_emit_dirty() argument
163 struct si_pm4_state *state = sctx->queued.array[i]; in si_pm4_emit_dirty()
165 if (!state || sctx->emitted.array[i] == state) in si_pm4_emit_dirty()
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Dcik_sdma.c78 struct si_context *sctx = (struct si_context *)ctx; in cik_sdma_clear_buffer() local
79 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_clear_buffer()
97 r600_need_dma_space(&sctx->b, ncopy * 5, rdst, NULL); in cik_sdma_clear_buffer()
118 static unsigned encode_tile_info(struct si_context *sctx, in encode_tile_info() argument
122 struct radeon_info *info = &sctx->screen->b.info; in encode_tile_info()
140 static bool cik_sdma_copy_texture(struct si_context *sctx, in cik_sdma_copy_texture() argument
148 struct radeon_info *info = &sctx->screen->b.info; in cik_sdma_copy_texture()
192 if (!r600_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty, in cik_sdma_copy_texture()
219 (sctx->b.chip_class != CIK || in cik_sdma_copy_texture()
224 ((sctx->b.family != CHIP_BONAIRE && in cik_sdma_copy_texture()
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Dsi_pm4.h71 void si_pm4_upload_indirect_buffer(struct si_context *sctx,
76 void si_pm4_free_state(struct si_context *sctx,
80 void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state);
81 void si_pm4_emit_dirty(struct si_context *sctx);
82 void si_pm4_reset_emitted(struct si_context *sctx);
Dsi_dma.c87 struct si_context *sctx = (struct si_context *)ctx; in si_dma_clear_buffer() local
88 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in si_dma_clear_buffer()
106 r600_need_dma_space(&sctx->b, ncopy * 4, rdst, NULL); in si_dma_clear_buffer()
228 struct si_context *sctx = (struct si_context *)ctx; in si_dma_copy() local
236 if (sctx->b.dma.cs == NULL) { in si_dma_copy()
241 si_dma_copy_buffer(sctx, dst, src, dst_x, src_box->x, src_box->width); in si_dma_copy()
261 !r600_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty, in si_dma_copy()
309 si_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset, in si_dma_copy()
312 si_dma_copy_tile(sctx, dst, dst_level, dst_x, dst_y, dst_z, in si_dma_copy()
324 void si_init_dma_functions(struct si_context *sctx) in si_init_dma_functions() argument
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/external/fio/crc/
Dsha3.c90 static void fio_sha3_init(struct fio_sha3_ctx *sctx, unsigned int digest_sz) in fio_sha3_init() argument
92 memset(sctx->st, 0, sizeof(sctx->st)); in fio_sha3_init()
93 sctx->md_len = digest_sz; in fio_sha3_init()
94 sctx->rsiz = 200 - 2 * digest_sz; in fio_sha3_init()
95 sctx->rsizw = sctx->rsiz / 8; in fio_sha3_init()
96 sctx->partial = 0; in fio_sha3_init()
97 memset(sctx->buf, 0, sizeof(sctx->buf)); in fio_sha3_init()
100 void fio_sha3_224_init(struct fio_sha3_ctx *sctx) in fio_sha3_224_init() argument
102 fio_sha3_init(sctx, SHA3_224_DIGEST_SIZE); in fio_sha3_224_init()
105 void fio_sha3_256_init(struct fio_sha3_ctx *sctx) in fio_sha3_256_init() argument
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Dsha512.c149 void fio_sha512_init(struct fio_sha512_ctx *sctx) in fio_sha512_init() argument
151 sctx->state[0] = H0; in fio_sha512_init()
152 sctx->state[1] = H1; in fio_sha512_init()
153 sctx->state[2] = H2; in fio_sha512_init()
154 sctx->state[3] = H3; in fio_sha512_init()
155 sctx->state[4] = H4; in fio_sha512_init()
156 sctx->state[5] = H5; in fio_sha512_init()
157 sctx->state[6] = H6; in fio_sha512_init()
158 sctx->state[7] = H7; in fio_sha512_init()
159 sctx->count[0] = sctx->count[1] = sctx->count[2] = sctx->count[3] = 0; in fio_sha512_init()
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Dsha3.h33 void fio_sha3_224_init(struct fio_sha3_ctx *sctx);
34 void fio_sha3_256_init(struct fio_sha3_ctx *sctx);
35 void fio_sha3_384_init(struct fio_sha3_ctx *sctx);
36 void fio_sha3_512_init(struct fio_sha3_ctx *sctx);
38 int fio_sha3_update(struct fio_sha3_ctx *sctx, const uint8_t *data,
40 void fio_sha3_final(struct fio_sha3_ctx *sctx);
Dsha256.c230 void fio_sha256_init(struct fio_sha256_ctx *sctx) in fio_sha256_init() argument
232 sctx->state[0] = H0; in fio_sha256_init()
233 sctx->state[1] = H1; in fio_sha256_init()
234 sctx->state[2] = H2; in fio_sha256_init()
235 sctx->state[3] = H3; in fio_sha256_init()
236 sctx->state[4] = H4; in fio_sha256_init()
237 sctx->state[5] = H5; in fio_sha256_init()
238 sctx->state[6] = H6; in fio_sha256_init()
239 sctx->state[7] = H7; in fio_sha256_init()
240 sctx->count = 0; in fio_sha256_init()
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/external/ipsec-tools/src/racoon/
Dproposal.c320 if (*pp1->sctx.ctx_str && !(*pp2->sctx.ctx_str)) {
325 if (!(*pp1->sctx.ctx_str) && *pp2->sctx.ctx_str) {
331 if (*pp1->sctx.ctx_str && *pp2->sctx.ctx_str) {
332 if (pp1->sctx.ctx_doi == pp2->sctx.ctx_doi)
333 newpp->sctx.ctx_doi = pp1->sctx.ctx_doi;
337 pp2->sctx.ctx_doi, pp1->sctx.ctx_doi);
341 if (pp1->sctx.ctx_alg == pp2->sctx.ctx_alg)
342 newpp->sctx.ctx_alg = pp1->sctx.ctx_alg;
346 pp2->sctx.ctx_alg, pp1->sctx.ctx_alg);
350 if ((pp1->sctx.ctx_strlen != pp2->sctx.ctx_strlen) ||
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Dsecurity.c168 iph2->proposal->sctx.ctx_doi = spidx.sec_ctx.ctx_doi;
169 iph2->proposal->sctx.ctx_alg = spidx.sec_ctx.ctx_alg;
170 iph2->proposal->sctx.ctx_strlen = spidx.sec_ctx.ctx_strlen;
171 memcpy(iph2->proposal->sctx.ctx_str, spidx.sec_ctx.ctx_str,
/external/syslinux/gpxe/src/core/
Dvsprintf.c282 struct sputc_context * sctx = in printf_sputc() local
285 if ( ctx->len < sctx->max_len ) in printf_sputc()
286 sctx->buf[ctx->len] = c; in printf_sputc()
303 struct sputc_context sctx; in vsnprintf() local
308 sctx.ctx.handler = printf_sputc; in vsnprintf()
309 sctx.buf = buf; in vsnprintf()
310 sctx.max_len = size; in vsnprintf()
311 len = vcprintf ( &sctx.ctx, fmt, args ); in vsnprintf()
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_core.cpp50 sb_context *sctx = new sb_context(); in r600_sb_context_create() local
52 if (sctx->init(rctx->isa, translate_chip(rctx->b.family), in r600_sb_context_create()
54 delete sctx; in r600_sb_context_create()
55 sctx = NULL; in r600_sb_context_create()
70 return sctx; in r600_sb_context_create()
73 void r600_sb_context_destroy(void * sctx) { in r600_sb_context_destroy() argument
74 if (sctx) { in r600_sb_context_destroy()
75 sb_context *ctx = static_cast<sb_context*>(sctx); in r600_sb_context_destroy()
/external/compiler-rt/lib/tsan/rtl/
Dtsan_interceptors.cc471 ThreadSignalContext *sctx = SigCtx(thr); in SetJmp() local
472 buf->int_signal_send = sctx ? sctx->int_signal_send : 0; in SetJmp()
473 buf->in_blocking_func = sctx ? in SetJmp()
474 atomic_load(&sctx->in_blocking_func, memory_order_relaxed) : in SetJmp()
500 ThreadSignalContext *sctx = SigCtx(thr); in LongJmp() local
501 if (sctx) { in LongJmp()
502 sctx->int_signal_send = buf->int_signal_send; in LongJmp()
503 atomic_store(&sctx->in_blocking_func, buf->in_blocking_func, in LongJmp()
836 ThreadSignalContext *sctx = thr->signal_ctx; in DestroyThreadState() local
837 if (sctx) { in DestroyThreadState()
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/external/boringssl/src/crypto/evp/
Dp_rsa.c118 RSA_PKEY_CTX *dctx, *sctx; in pkey_rsa_copy() local
122 sctx = src->data; in pkey_rsa_copy()
124 dctx->nbits = sctx->nbits; in pkey_rsa_copy()
125 if (sctx->pub_exp) { in pkey_rsa_copy()
126 dctx->pub_exp = BN_dup(sctx->pub_exp); in pkey_rsa_copy()
132 dctx->pad_mode = sctx->pad_mode; in pkey_rsa_copy()
133 dctx->md = sctx->md; in pkey_rsa_copy()
134 dctx->mgf1md = sctx->mgf1md; in pkey_rsa_copy()
135 if (sctx->oaep_label) { in pkey_rsa_copy()
137 dctx->oaep_label = BUF_memdup(sctx->oaep_label, sctx->oaep_labellen); in pkey_rsa_copy()
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