/external/v8/src/ |
D | fixed-dtoa.cc | 42 void Shift(int shift_amount) { in Shift() argument 43 DCHECK(-64 <= shift_amount && shift_amount <= 64); in Shift() 44 if (shift_amount == 0) { in Shift() 46 } else if (shift_amount == -64) { in Shift() 49 } else if (shift_amount == 64) { in Shift() 52 } else if (shift_amount <= 0) { in Shift() 53 high_bits_ <<= -shift_amount; in Shift() 54 high_bits_ += low_bits_ >> (64 + shift_amount); in Shift() 55 low_bits_ <<= -shift_amount; in Shift() 57 low_bits_ >>= shift_amount; in Shift() [all …]
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D | strtod.cc | 305 int shift_amount = (precision_digits_count + kDenominatorLog) - in DiyFpStrtod() local 307 input.set_f(input.f() >> shift_amount); in DiyFpStrtod() 308 input.set_e(input.e() + shift_amount); in DiyFpStrtod() 311 error = (error >> shift_amount) + 1 + kDenominator; in DiyFpStrtod() 312 precision_digits_count -= shift_amount; in DiyFpStrtod()
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D | bignum.cc | 219 void Bignum::ShiftLeft(int shift_amount) { in ShiftLeft() argument 221 exponent_ += shift_amount / kBigitSize; in ShiftLeft() 222 int local_shift = shift_amount % kBigitSize; in ShiftLeft() 693 void Bignum::BigitsShiftLeft(int shift_amount) { in BigitsShiftLeft() argument 694 DCHECK(shift_amount < kBigitSize); in BigitsShiftLeft() 695 DCHECK(shift_amount >= 0); in BigitsShiftLeft() 698 Chunk new_carry = bigits_[i] >> (kBigitSize - shift_amount); in BigitsShiftLeft() 699 bigits_[i] = ((bigits_[i] << shift_amount) + carry) & kBigitMask; in BigitsShiftLeft()
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D | bignum.h | 37 void ShiftLeft(int shift_amount); 101 void BigitsShiftLeft(int shift_amount);
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/external/vixl/src/aarch64/ |
D | operands-aarch64.cc | 300 Operand::Operand(Register reg, Shift shift, unsigned shift_amount) in Operand() argument 304 shift_amount_(shift_amount) { in Operand() 306 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize)); in Operand() 307 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize)); in Operand() 312 Operand::Operand(Register reg, Extend extend, unsigned shift_amount) in Operand() argument 316 shift_amount_(shift_amount) { in Operand() 318 VIXL_ASSERT(shift_amount <= 4); in Operand() 397 unsigned shift_amount) in MemOperand() argument 404 shift_amount_(shift_amount) { in MemOperand() 417 unsigned shift_amount) in MemOperand() argument [all …]
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D | operands-aarch64.h | 749 unsigned shift_amount = 0); // NOLINT(runtime/explicit) 754 explicit Operand(Register reg, Extend extend, unsigned shift_amount = 0); 801 VIXL_DEPRECATED("GetShiftAmount", unsigned shift_amount() const) { in shift_amount() function 825 unsigned shift_amount = 0); 829 unsigned shift_amount = 0); 857 VIXL_DEPRECATED("GetShiftAmount", unsigned shift_amount() const) { in shift_amount() function
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D | assembler-aarch64.cc | 2824 const int shift_amount) { in movi() argument 2827 VIXL_ASSERT(shift_amount == 0); in movi() 2843 shift_amount, in movi() 2849 shift_amount, in movi() 2869 const int shift_amount) { in mvni() argument 2872 NEONModifiedImmShiftLsl(vd, imm8, shift_amount, NEONModifiedImmediate_MVNI); in mvni() 2874 NEONModifiedImmShiftMsl(vd, imm8, shift_amount, NEONModifiedImmediate_MVNI); in mvni() 4139 const int shift_amount, in NEONModifiedImmShiftMsl() argument 4142 VIXL_ASSERT((shift_amount == 8) || (shift_amount == 16)); in NEONModifiedImmShiftMsl() 4145 int cmode_0 = (shift_amount >> 4) & 1; in NEONModifiedImmShiftMsl() [all …]
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/external/tensorflow/tensorflow/examples/android/jni/object_tracking/ |
D | geom.h | 218 inline void Shift(const Point2f shift_amount) { in Shift() argument 219 left_ += shift_amount.x; in Shift() 220 top_ += shift_amount.y; in Shift() 221 right_ += shift_amount.x; in Shift() 222 bottom_ += shift_amount.y; in Shift() 279 inline void Shift(const Point2f shift_amount) { in Shift() argument 280 x_ += shift_amount.x; in Shift() 281 y_ += shift_amount.y; in Shift()
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/external/valgrind/memcheck/tests/vbit-test/ |
D | vbits.c | 969 shl_vbits(vbits_t v, unsigned shift_amount) in shl_vbits() argument 971 assert(shift_amount < v.num_bits); in shl_vbits() 976 case 8: new.bits.u8 <<= shift_amount; break; in shl_vbits() 977 case 16: new.bits.u16 <<= shift_amount; break; in shl_vbits() 978 case 32: new.bits.u32 <<= shift_amount; break; in shl_vbits() 979 case 64: new.bits.u64 <<= shift_amount; break; in shl_vbits() 991 shr_vbits(vbits_t v, unsigned shift_amount) in shr_vbits() argument 993 assert(shift_amount < v.num_bits); in shr_vbits() 998 case 8: new.bits.u8 >>= shift_amount; break; in shr_vbits() 999 case 16: new.bits.u16 >>= shift_amount; break; in shr_vbits() [all …]
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D | binary.c | 121 unsigned shift_amount = opnd2->value.u8; in check_result_for_binary() local 123 expected_vbits = shl_vbits(opnd1->vbits, shift_amount); in check_result_for_binary() 134 unsigned shift_amount = opnd2->value.u8; in check_result_for_binary() local 136 expected_vbits = shr_vbits(opnd1->vbits, shift_amount); in check_result_for_binary() 147 unsigned shift_amount = opnd2->value.u8; in check_result_for_binary() local 149 expected_vbits = sar_vbits(opnd1->vbits, shift_amount); in check_result_for_binary()
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/external/v8/src/arm64/ |
D | assembler-arm64-inl.h | 329 Operand::Operand(Register reg, Shift shift, unsigned shift_amount) 334 shift_amount_(shift_amount) { 335 DCHECK(reg.Is64Bits() || (shift_amount < kWRegSizeInBits)); 336 DCHECK(reg.Is32Bits() || (shift_amount < kXRegSizeInBits)); 341 Operand::Operand(Register reg, Extend extend, unsigned shift_amount) 346 shift_amount_(shift_amount) { 348 DCHECK(shift_amount <= 4); 417 unsigned Operand::shift_amount() const { 461 unsigned shift_amount) 463 shift_(NO_SHIFT), extend_(extend), shift_amount_(shift_amount) { [all …]
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D | assembler-arm64.cc | 2293 DCHECK(operand.IsShiftedRegister() && (operand.shift_amount() == 0)); in AddSubWithCarry() 2420 DCHECK(operand.IsShiftedRegister() && (operand.shift_amount() == 0)); in ConditionalCompare() 2465 unsigned shift_amount) { in EmitShift() argument 2468 lsl(rd, rn, shift_amount); in EmitShift() 2471 lsr(rd, rn, shift_amount); in EmitShift() 2474 asr(rd, rn, shift_amount); in EmitShift() 2477 ror(rd, rn, shift_amount); in EmitShift() 2528 DCHECK(rn.Is64Bits() || (rn.Is32Bits() && is_uint5(operand.shift_amount()))); in DataProcShiftedRegister() 2531 ShiftDP(operand.shift()) | ImmDPShift(operand.shift_amount()) | in DataProcShiftedRegister() 2544 ExtendMode(operand.extend()) | ImmExtendShift(operand.shift_amount()) | in DataProcExtendedRegister() [all …]
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D | assembler-arm64.h | 584 unsigned shift_amount = 0); // NOLINT(runtime/explicit) 591 unsigned shift_amount = 0); 618 inline unsigned shift_amount() const; 646 unsigned shift_amount = 0); 650 unsigned shift_amount = 0); 661 unsigned shift_amount() const { return shift_amount_; } in shift_amount() function 1789 inline static Instr ImmShiftLS(unsigned shift_amount);
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D | macro-assembler-arm64.cc | 145 DCHECK(operand.shift_amount() <= 4); in LogicalMacro() 150 operand.shift_amount()); in LogicalMacro() 258 } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) { in Mov() 262 EmitShift(dst, operand.reg(), operand.shift(), operand.shift_amount()); in Mov() 268 operand.shift_amount()); in Mov() 311 operand.shift_amount()); in Mvn() 360 } else if ((operand.IsShiftedRegister() && (operand.shift_amount() == 0)) || in ConditionalCompareMacro() 402 } else if (operand.IsShiftedRegister() && (operand.shift_amount() == 0)) { in Csel() 531 } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) { in AddSubWithCarryMacro() 535 DCHECK(is_uintn(operand.shift_amount(), in AddSubWithCarryMacro() [all …]
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D | simulator-arm64.cc | 1452 unsigned shift_amount = instr->ImmDPShift(); in VisitAddSubShifted() local 1455 uint64_t op2 = ShiftOperand(xreg(instr->Rm()), shift_type, shift_amount); in VisitAddSubShifted() 1458 uint32_t op2 = ShiftOperand(wreg(instr->Rm()), shift_type, shift_amount); in VisitAddSubShifted() 1498 unsigned shift_amount = instr->ImmDPShift(); in VisitLogicalShifted() local 1501 uint64_t op2 = ShiftOperand(xreg(instr->Rm()), shift_type, shift_amount); in VisitLogicalShifted() 1505 uint32_t op2 = ShiftOperand(wreg(instr->Rm()), shift_type, shift_amount); in VisitLogicalShifted() 1616 unsigned shift_amount = instr->ImmShiftLS() * instr->SizeLS(); in VisitLoadStoreRegisterOffset() local 1618 int64_t offset = ExtendValue(xreg(instr->Rm()), ext, shift_amount); in VisitLoadStoreRegisterOffset()
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/external/webrtc/webrtc/common_audio/ |
D | blocker.cc | 106 size_t shift_amount, in Blocker() argument 112 initial_delay_(block_size_ - gcd(chunk_size, shift_amount)), in Blocker() 119 shift_amount_(shift_amount), in Blocker()
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D | lapped_transform.cc | 60 size_t shift_amount, in LappedTransform() argument 73 shift_amount, in LappedTransform()
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D | blocker.h | 71 size_t shift_amount,
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D | lapped_transform.h | 54 size_t shift_amount,
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/external/tensorflow/tensorflow/compiler/tf2xla/ |
D | xla_helpers.cc | 67 xla::ComputationDataHandle shift_amount = in ArgMinMax() local 70 builder->ShiftLeft(partial_mask, shift_amount), shift_amount); in ArgMinMax()
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/external/v8/src/arm/ |
D | simulator-arm.cc | 1398 int shift_amount = instr->ShiftAmountValue(); in GetShiftRm() local 1402 if ((shift == ROR) && (shift_amount == 0)) { in GetShiftRm() 1405 } else if (((shift == LSR) || (shift == ASR)) && (shift_amount == 0)) { in GetShiftRm() 1406 shift_amount = 32; in GetShiftRm() 1410 if (shift_amount == 0) { in GetShiftRm() 1419 result >>= (shift_amount - 1); in GetShiftRm() 1427 if (shift_amount == 0) { in GetShiftRm() 1430 result <<= (shift_amount - 1); in GetShiftRm() 1438 if (shift_amount == 0) { in GetShiftRm() 1443 uresult >>= (shift_amount - 1); in GetShiftRm() [all …]
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D | disasm-arm.cc | 195 int shift_amount = instr->ShiftAmountValue(); in PrintShiftRm() local 200 if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) { in PrintShiftRm() 206 if ((shift == ROR) && (shift_amount == 0)) { in PrintShiftRm() 209 } else if (((shift == LSR) || (shift == ASR)) && (shift_amount == 0)) { in PrintShiftRm() 210 shift_amount = 32; in PrintShiftRm() 215 shift_amount); in PrintShiftRm()
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/external/vixl/src/aarch32/ |
D | operands-aarch32.h | 779 uint32_t shift_amount, 786 shift_amount_(shift_amount), in rn_() 800 uint32_t shift_amount, 807 shift_amount_(shift_amount), in rn_()
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/external/v8/src/crankshaft/arm64/ |
D | lithium-arm64.h | 561 LAddI(LOperand* left, LOperand* right, Shift shift, LOperand* shift_amount) in LAddI() argument 562 : shift_(shift), shift_amount_(shift_amount) { in LAddI() 571 LOperand* shift_amount() const { return shift_amount_; } in shift_amount() function 758 LBitI(LOperand* left, LOperand* right, Shift shift, LOperand* shift_amount) in LBitI() argument 759 : shift_(shift), shift_amount_(shift_amount) { in LBitI() 768 LOperand* shift_amount() const { return shift_amount_; } in shift_amount() function 2477 LSubI(LOperand* left, LOperand* right, Shift shift, LOperand* shift_amount) in LSubI() argument 2478 : shift_(shift), shift_amount_(shift_amount) { in LSubI() 2487 LOperand* shift_amount() const { return shift_amount_; } in shift_amount() function
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/external/webrtc/webrtc/common_audio/signal_processing/ |
D | signal_processing_unittest.cc | 62 int shift_amount = 1; // Workaround compiler warning using variable here. in TEST_F() local 64 EXPECT_EQ(32766, WEBRTC_SPL_SHIFT_W32(a, shift_amount)); in TEST_F()
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