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Searched refs:sxth (Results 1 – 25 of 115) sorted by relevance

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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Ddiv-vec.ll276 ; ASM: sxth r0, r0
277 ; ASM: sxth r1, r1
279 ; ASM: sxth r0, r0
280 ; ASM: sxth r1, r1
282 ; ASM: sxth r0, r0
283 ; ASM: sxth r1, r1
285 ; ASM: sxth r0, r0
286 ; ASM: sxth r1, r1
288 ; ASM: sxth r0, r0
289 ; ASM: sxth r1, r1
[all …]
/external/llvm/test/CodeGen/ARM/
Dfast-isel-icmp.ll8 ; ARM: sxth r0, r0
9 ; ARM: sxth r1, r1
12 ; THUMB: sxth r0, r0
13 ; THUMB: sxth r1, r1
Dfast-isel.ll106 ; THUMB: sxth
110 ; ARM: sxth
126 ; THUMB: sxth
132 ; ARM: sxth
Dreturned-ext.ll70 ; CHECKELF: sxth r0, {{r[0-9]+}}
76 ; CHECKT2D: sxth r0, {{r[0-9]+}}
164 ; CHECKELF: sxth r0, [[SAVEX]]
171 ; CHECKT2D: sxth r0, [[SAVEX]]
Dfast-isel-ret.ll38 ; CHECK: sxth r0, r0
55 ; CHECK-NOT: sxth
Dfast-isel-fold.ll66 ; ARM-NOT: sxth
69 ; THUMB-NOT: sxth
Dfast-isel-conversion.ll24 ; ARM: sxth r0, r0
28 ; THUMB: sxth r0, r0
70 ; ARM: sxth r0, r0
74 ; THUMB: sxth r0, r0
/external/llvm/test/MC/AArch64/
Darm64-arithmetic-encoding.s175 add w1, w2, w3, sxth
184 ; CHECK: add w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x0b]
192 add x1, x2, w3, sxth
199 ; CHECK: add x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x8b]
219 sub w1, w2, w3, sxth
228 ; CHECK: sub w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x4b]
236 sub x1, x2, w3, sxth
243 ; CHECK: sub x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0xcb]
263 adds w1, w2, w3, sxth
272 ; CHECK: adds w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x2b]
[all …]
/external/llvm/test/CodeGen/AArch64/
Daddsub_ext.ll178 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, sxth
183 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, sxth #1
189 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, sxth
194 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, sxth #4
206 ; CHECK: cmp {{x[0-9]+}}, {{w[0-9]+}}, sxth
253 ; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, sxth
258 ; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, sxth #1
264 ; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, sxth
269 ; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, sxth #4
Dfast-isel-int-ext2.ll95 ; CHECK-NOT: sxth
123 ; CHECK-NOT: sxth
236 ; CHECK-NOT: sxth
264 ; CHECK-NOT: sxth
383 ; CHECK-NOT: sxth
413 ; CHECK-NOT: sxth
Dadc.ll58 ; CHECK-LE: adds x0, x0, w2, sxth #3
60 ; CHECK-BE: adds x1, x1, w2, sxth #3
Dfast-isel-int-ext.ll219 ; CHECK-NOT: sxth
241 ; CHECK-NOT: sxth
330 ; CHECK-NOT: sxth
352 ; CHECK-NOT: sxth
447 ; CHECK-NOT: sxth
471 ; CHECK-NOT: sxth
Dfast-isel-int-ext3.ll77 ; CHECK: sxth w0, [[REG]]
99 ; CHECK: sxth x0, [[REG]]
Dbitfield.ll43 ; CHECK: sxth {{w[0-9]+}}, {{w[0-9]+}}
59 ; CHECK: sxth {{x[0-9]+}}, {{w[0-9]+}}
149 ; CHECK: sxth {{x[0-9]+}}, {{w[0-9]+}}
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dfast-isel.ll105 ; THUMB: sxth
109 ; ARM: sxth
125 ; THUMB: sxth
131 ; ARM: sxth
/external/llvm/test/MC/ARM/
Dthumb.s26 sxth r2, r3
28 @ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dthumb.s26 sxth r2, r3
28 @ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-arithmetic.txt178 # CHECK: add w1, w2, w3, sxth
193 # CHECK: add x1, x2, w3, sxth
220 # CHECK: sub w1, w2, w3, sxth
235 # CHECK: sub x1, x2, w3, sxth
262 # CHECK: adds w1, w2, w3, sxth
277 # CHECK: adds x1, x2, w3, sxth
300 # CHECK: subs w1, w2, w3, sxth
315 # CHECK: subs x1, x2, w3, sxth
/external/libxaac/decoder/armv8/
Dixheaacd_fft32x32_ld2_armv8.s270 sxth w11, w11
272 sxth w21, w21
275 sxth w12, w12
277 sxth w22, w22
280 sxth w14, w14
282 sxth w24, w24
/external/llvm/test/MC/Disassembler/Hexagon/
Dalu32_pred.txt116 # CHECK: if (p3) r17 = sxth(r21)
118 # CHECK: if (!p3) r17 = sxth(r21)
121 # CHECK-NEXT: if (p3.new) r17 = sxth(r21)
124 # CHECK-NEXT: if (!p3.new) r17 = sxth(r21)
/external/capstone/suite/MC/ARM/
Dthumb.s.cs11 0x1a,0xb2 = sxth r2, r3
/external/llvm/test/CodeGen/Hexagon/intrinsics/
Dalu32_alu.ll88 declare i32 @llvm.hexagon.A2.sxth(i32)
90 %z = call i32 @llvm.hexagon.A2.sxth(i32 %a)
93 ; CHECK: = sxth({{.*}})
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DREADME.txt8 sxth r3, r3
18 sxth r3, r3
26 sxth r3, r3
/external/llvm/lib/CodeGen/
DREADME.txt8 sxth r3, r3
18 sxth r3, r3
26 sxth r3, r3
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-sxt-uxt.ll5 ; CHECK: sxth

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