1 /*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "assembler_mips64.h"
18
19 #include <inttypes.h>
20 #include <map>
21 #include <random>
22
23 #include "base/bit_utils.h"
24 #include "base/stl_util.h"
25 #include "utils/assembler_test.h"
26
27 #define __ GetAssembler()->
28
29 namespace art {
30
31 struct MIPS64CpuRegisterCompare {
operator ()art::MIPS64CpuRegisterCompare32 bool operator()(const mips64::GpuRegister& a, const mips64::GpuRegister& b) const {
33 return a < b;
34 }
35 };
36
37 class AssemblerMIPS64Test : public AssemblerTest<mips64::Mips64Assembler,
38 mips64::Mips64Label,
39 mips64::GpuRegister,
40 mips64::FpuRegister,
41 uint32_t,
42 mips64::VectorRegister> {
43 public:
44 typedef AssemblerTest<mips64::Mips64Assembler,
45 mips64::Mips64Label,
46 mips64::GpuRegister,
47 mips64::FpuRegister,
48 uint32_t,
49 mips64::VectorRegister> Base;
50
AssemblerMIPS64Test()51 AssemblerMIPS64Test()
52 : instruction_set_features_(Mips64InstructionSetFeatures::FromVariant("default", nullptr)) {}
53
54 protected:
55 // Get the typically used name for this architecture, e.g., aarch64, x86-64, ...
GetArchitectureString()56 std::string GetArchitectureString() OVERRIDE {
57 return "mips64";
58 }
59
GetAssemblerCmdName()60 std::string GetAssemblerCmdName() OVERRIDE {
61 // We assemble and link for MIPS64R6. See GetAssemblerParameters() for details.
62 return "gcc";
63 }
64
GetAssemblerParameters()65 std::string GetAssemblerParameters() OVERRIDE {
66 // We assemble and link for MIPS64R6. The reason is that object files produced for MIPS64R6
67 // (and MIPS32R6) with the GNU assembler don't have correct final offsets in PC-relative
68 // branches in the .text section and so they require a relocation pass (there's a relocation
69 // section, .rela.text, that has the needed info to fix up the branches).
70 return " -march=mips64r6 -mmsa -Wa,--no-warn -Wl,-Ttext=0 -Wl,-e0 -nostdlib";
71 }
72
Pad(std::vector<uint8_t> & data)73 void Pad(std::vector<uint8_t>& data) OVERRIDE {
74 // The GNU linker unconditionally pads the code segment with NOPs to a size that is a multiple
75 // of 16 and there doesn't appear to be a way to suppress this padding. Our assembler doesn't
76 // pad, so, in order for two assembler outputs to match, we need to match the padding as well.
77 // NOP is encoded as four zero bytes on MIPS.
78 size_t pad_size = RoundUp(data.size(), 16u) - data.size();
79 data.insert(data.end(), pad_size, 0);
80 }
81
GetDisassembleParameters()82 std::string GetDisassembleParameters() OVERRIDE {
83 return " -D -bbinary -mmips:isa64r6";
84 }
85
CreateAssembler(ArenaAllocator * allocator)86 mips64::Mips64Assembler* CreateAssembler(ArenaAllocator* allocator) OVERRIDE {
87 return new (allocator) mips64::Mips64Assembler(allocator, instruction_set_features_.get());
88 }
89
SetUpHelpers()90 void SetUpHelpers() OVERRIDE {
91 if (registers_.size() == 0) {
92 registers_.push_back(new mips64::GpuRegister(mips64::ZERO));
93 registers_.push_back(new mips64::GpuRegister(mips64::AT));
94 registers_.push_back(new mips64::GpuRegister(mips64::V0));
95 registers_.push_back(new mips64::GpuRegister(mips64::V1));
96 registers_.push_back(new mips64::GpuRegister(mips64::A0));
97 registers_.push_back(new mips64::GpuRegister(mips64::A1));
98 registers_.push_back(new mips64::GpuRegister(mips64::A2));
99 registers_.push_back(new mips64::GpuRegister(mips64::A3));
100 registers_.push_back(new mips64::GpuRegister(mips64::A4));
101 registers_.push_back(new mips64::GpuRegister(mips64::A5));
102 registers_.push_back(new mips64::GpuRegister(mips64::A6));
103 registers_.push_back(new mips64::GpuRegister(mips64::A7));
104 registers_.push_back(new mips64::GpuRegister(mips64::T0));
105 registers_.push_back(new mips64::GpuRegister(mips64::T1));
106 registers_.push_back(new mips64::GpuRegister(mips64::T2));
107 registers_.push_back(new mips64::GpuRegister(mips64::T3));
108 registers_.push_back(new mips64::GpuRegister(mips64::S0));
109 registers_.push_back(new mips64::GpuRegister(mips64::S1));
110 registers_.push_back(new mips64::GpuRegister(mips64::S2));
111 registers_.push_back(new mips64::GpuRegister(mips64::S3));
112 registers_.push_back(new mips64::GpuRegister(mips64::S4));
113 registers_.push_back(new mips64::GpuRegister(mips64::S5));
114 registers_.push_back(new mips64::GpuRegister(mips64::S6));
115 registers_.push_back(new mips64::GpuRegister(mips64::S7));
116 registers_.push_back(new mips64::GpuRegister(mips64::T8));
117 registers_.push_back(new mips64::GpuRegister(mips64::T9));
118 registers_.push_back(new mips64::GpuRegister(mips64::K0));
119 registers_.push_back(new mips64::GpuRegister(mips64::K1));
120 registers_.push_back(new mips64::GpuRegister(mips64::GP));
121 registers_.push_back(new mips64::GpuRegister(mips64::SP));
122 registers_.push_back(new mips64::GpuRegister(mips64::S8));
123 registers_.push_back(new mips64::GpuRegister(mips64::RA));
124
125 secondary_register_names_.emplace(mips64::GpuRegister(mips64::ZERO), "zero");
126 secondary_register_names_.emplace(mips64::GpuRegister(mips64::AT), "at");
127 secondary_register_names_.emplace(mips64::GpuRegister(mips64::V0), "v0");
128 secondary_register_names_.emplace(mips64::GpuRegister(mips64::V1), "v1");
129 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A0), "a0");
130 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A1), "a1");
131 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A2), "a2");
132 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A3), "a3");
133 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A4), "a4");
134 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A5), "a5");
135 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A6), "a6");
136 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A7), "a7");
137 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T0), "t0");
138 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T1), "t1");
139 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T2), "t2");
140 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T3), "t3");
141 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S0), "s0");
142 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S1), "s1");
143 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S2), "s2");
144 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S3), "s3");
145 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S4), "s4");
146 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S5), "s5");
147 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S6), "s6");
148 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S7), "s7");
149 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T8), "t8");
150 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T9), "t9");
151 secondary_register_names_.emplace(mips64::GpuRegister(mips64::K0), "k0");
152 secondary_register_names_.emplace(mips64::GpuRegister(mips64::K1), "k1");
153 secondary_register_names_.emplace(mips64::GpuRegister(mips64::GP), "gp");
154 secondary_register_names_.emplace(mips64::GpuRegister(mips64::SP), "sp");
155 secondary_register_names_.emplace(mips64::GpuRegister(mips64::S8), "s8");
156 secondary_register_names_.emplace(mips64::GpuRegister(mips64::RA), "ra");
157
158 fp_registers_.push_back(new mips64::FpuRegister(mips64::F0));
159 fp_registers_.push_back(new mips64::FpuRegister(mips64::F1));
160 fp_registers_.push_back(new mips64::FpuRegister(mips64::F2));
161 fp_registers_.push_back(new mips64::FpuRegister(mips64::F3));
162 fp_registers_.push_back(new mips64::FpuRegister(mips64::F4));
163 fp_registers_.push_back(new mips64::FpuRegister(mips64::F5));
164 fp_registers_.push_back(new mips64::FpuRegister(mips64::F6));
165 fp_registers_.push_back(new mips64::FpuRegister(mips64::F7));
166 fp_registers_.push_back(new mips64::FpuRegister(mips64::F8));
167 fp_registers_.push_back(new mips64::FpuRegister(mips64::F9));
168 fp_registers_.push_back(new mips64::FpuRegister(mips64::F10));
169 fp_registers_.push_back(new mips64::FpuRegister(mips64::F11));
170 fp_registers_.push_back(new mips64::FpuRegister(mips64::F12));
171 fp_registers_.push_back(new mips64::FpuRegister(mips64::F13));
172 fp_registers_.push_back(new mips64::FpuRegister(mips64::F14));
173 fp_registers_.push_back(new mips64::FpuRegister(mips64::F15));
174 fp_registers_.push_back(new mips64::FpuRegister(mips64::F16));
175 fp_registers_.push_back(new mips64::FpuRegister(mips64::F17));
176 fp_registers_.push_back(new mips64::FpuRegister(mips64::F18));
177 fp_registers_.push_back(new mips64::FpuRegister(mips64::F19));
178 fp_registers_.push_back(new mips64::FpuRegister(mips64::F20));
179 fp_registers_.push_back(new mips64::FpuRegister(mips64::F21));
180 fp_registers_.push_back(new mips64::FpuRegister(mips64::F22));
181 fp_registers_.push_back(new mips64::FpuRegister(mips64::F23));
182 fp_registers_.push_back(new mips64::FpuRegister(mips64::F24));
183 fp_registers_.push_back(new mips64::FpuRegister(mips64::F25));
184 fp_registers_.push_back(new mips64::FpuRegister(mips64::F26));
185 fp_registers_.push_back(new mips64::FpuRegister(mips64::F27));
186 fp_registers_.push_back(new mips64::FpuRegister(mips64::F28));
187 fp_registers_.push_back(new mips64::FpuRegister(mips64::F29));
188 fp_registers_.push_back(new mips64::FpuRegister(mips64::F30));
189 fp_registers_.push_back(new mips64::FpuRegister(mips64::F31));
190
191 vec_registers_.push_back(new mips64::VectorRegister(mips64::W0));
192 vec_registers_.push_back(new mips64::VectorRegister(mips64::W1));
193 vec_registers_.push_back(new mips64::VectorRegister(mips64::W2));
194 vec_registers_.push_back(new mips64::VectorRegister(mips64::W3));
195 vec_registers_.push_back(new mips64::VectorRegister(mips64::W4));
196 vec_registers_.push_back(new mips64::VectorRegister(mips64::W5));
197 vec_registers_.push_back(new mips64::VectorRegister(mips64::W6));
198 vec_registers_.push_back(new mips64::VectorRegister(mips64::W7));
199 vec_registers_.push_back(new mips64::VectorRegister(mips64::W8));
200 vec_registers_.push_back(new mips64::VectorRegister(mips64::W9));
201 vec_registers_.push_back(new mips64::VectorRegister(mips64::W10));
202 vec_registers_.push_back(new mips64::VectorRegister(mips64::W11));
203 vec_registers_.push_back(new mips64::VectorRegister(mips64::W12));
204 vec_registers_.push_back(new mips64::VectorRegister(mips64::W13));
205 vec_registers_.push_back(new mips64::VectorRegister(mips64::W14));
206 vec_registers_.push_back(new mips64::VectorRegister(mips64::W15));
207 vec_registers_.push_back(new mips64::VectorRegister(mips64::W16));
208 vec_registers_.push_back(new mips64::VectorRegister(mips64::W17));
209 vec_registers_.push_back(new mips64::VectorRegister(mips64::W18));
210 vec_registers_.push_back(new mips64::VectorRegister(mips64::W19));
211 vec_registers_.push_back(new mips64::VectorRegister(mips64::W20));
212 vec_registers_.push_back(new mips64::VectorRegister(mips64::W21));
213 vec_registers_.push_back(new mips64::VectorRegister(mips64::W22));
214 vec_registers_.push_back(new mips64::VectorRegister(mips64::W23));
215 vec_registers_.push_back(new mips64::VectorRegister(mips64::W24));
216 vec_registers_.push_back(new mips64::VectorRegister(mips64::W25));
217 vec_registers_.push_back(new mips64::VectorRegister(mips64::W26));
218 vec_registers_.push_back(new mips64::VectorRegister(mips64::W27));
219 vec_registers_.push_back(new mips64::VectorRegister(mips64::W28));
220 vec_registers_.push_back(new mips64::VectorRegister(mips64::W29));
221 vec_registers_.push_back(new mips64::VectorRegister(mips64::W30));
222 vec_registers_.push_back(new mips64::VectorRegister(mips64::W31));
223 }
224 }
225
TearDown()226 void TearDown() OVERRIDE {
227 AssemblerTest::TearDown();
228 STLDeleteElements(®isters_);
229 STLDeleteElements(&fp_registers_);
230 STLDeleteElements(&vec_registers_);
231 }
232
GetAddresses()233 std::vector<mips64::Mips64Label> GetAddresses() {
234 UNIMPLEMENTED(FATAL) << "Feature not implemented yet";
235 UNREACHABLE();
236 }
237
GetRegisters()238 std::vector<mips64::GpuRegister*> GetRegisters() OVERRIDE {
239 return registers_;
240 }
241
GetFPRegisters()242 std::vector<mips64::FpuRegister*> GetFPRegisters() OVERRIDE {
243 return fp_registers_;
244 }
245
GetVectorRegisters()246 std::vector<mips64::VectorRegister*> GetVectorRegisters() OVERRIDE {
247 return vec_registers_;
248 }
249
CreateImmediate(int64_t imm_value)250 uint32_t CreateImmediate(int64_t imm_value) OVERRIDE {
251 return imm_value;
252 }
253
GetSecondaryRegisterName(const mips64::GpuRegister & reg)254 std::string GetSecondaryRegisterName(const mips64::GpuRegister& reg) OVERRIDE {
255 CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end());
256 return secondary_register_names_[reg];
257 }
258
RepeatInsn(size_t count,const std::string & insn)259 std::string RepeatInsn(size_t count, const std::string& insn) {
260 std::string result;
261 for (; count != 0u; --count) {
262 result += insn;
263 }
264 return result;
265 }
266
BranchHelper(void (mips64::Mips64Assembler::* f)(mips64::Mips64Label *,bool),const std::string & instr_name,bool is_bare=false)267 void BranchHelper(void (mips64::Mips64Assembler::*f)(mips64::Mips64Label*,
268 bool),
269 const std::string& instr_name,
270 bool is_bare = false) {
271 mips64::Mips64Label label1, label2;
272 (Base::GetAssembler()->*f)(&label1, is_bare);
273 constexpr size_t kAdduCount1 = 63;
274 for (size_t i = 0; i != kAdduCount1; ++i) {
275 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
276 }
277 __ Bind(&label1);
278 (Base::GetAssembler()->*f)(&label2, is_bare);
279 constexpr size_t kAdduCount2 = 64;
280 for (size_t i = 0; i != kAdduCount2; ++i) {
281 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
282 }
283 __ Bind(&label2);
284 (Base::GetAssembler()->*f)(&label1, is_bare);
285 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
286
287 std::string expected =
288 ".set noreorder\n" +
289 instr_name + " 1f\n" +
290 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
291 "1:\n" +
292 instr_name + " 2f\n" +
293 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
294 "2:\n" +
295 instr_name + " 1b\n" +
296 "addu $zero, $zero, $zero\n";
297 DriverStr(expected, instr_name);
298 }
299
BranchCondOneRegHelper(void (mips64::Mips64Assembler::* f)(mips64::GpuRegister,mips64::Mips64Label *,bool),const std::string & instr_name,bool is_bare=false)300 void BranchCondOneRegHelper(void (mips64::Mips64Assembler::*f)(mips64::GpuRegister,
301 mips64::Mips64Label*,
302 bool),
303 const std::string& instr_name,
304 bool is_bare = false) {
305 mips64::Mips64Label label;
306 (Base::GetAssembler()->*f)(mips64::A0, &label, is_bare);
307 constexpr size_t kAdduCount1 = 63;
308 for (size_t i = 0; i != kAdduCount1; ++i) {
309 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
310 }
311 __ Bind(&label);
312 constexpr size_t kAdduCount2 = 64;
313 for (size_t i = 0; i != kAdduCount2; ++i) {
314 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
315 }
316 (Base::GetAssembler()->*f)(mips64::A1, &label, is_bare);
317 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
318
319 std::string expected =
320 ".set noreorder\n" +
321 instr_name + " $a0, 1f\n" +
322 (is_bare ? "" : "nop\n") +
323 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
324 "1:\n" +
325 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
326 instr_name + " $a1, 1b\n" +
327 (is_bare ? "" : "nop\n") +
328 "addu $zero, $zero, $zero\n";
329 DriverStr(expected, instr_name);
330 }
331
BranchCondTwoRegsHelper(void (mips64::Mips64Assembler::* f)(mips64::GpuRegister,mips64::GpuRegister,mips64::Mips64Label *,bool),const std::string & instr_name,bool is_bare=false)332 void BranchCondTwoRegsHelper(void (mips64::Mips64Assembler::*f)(mips64::GpuRegister,
333 mips64::GpuRegister,
334 mips64::Mips64Label*,
335 bool),
336 const std::string& instr_name,
337 bool is_bare = false) {
338 mips64::Mips64Label label;
339 (Base::GetAssembler()->*f)(mips64::A0, mips64::A1, &label, is_bare);
340 constexpr size_t kAdduCount1 = 63;
341 for (size_t i = 0; i != kAdduCount1; ++i) {
342 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
343 }
344 __ Bind(&label);
345 constexpr size_t kAdduCount2 = 64;
346 for (size_t i = 0; i != kAdduCount2; ++i) {
347 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
348 }
349 (Base::GetAssembler()->*f)(mips64::A2, mips64::A3, &label, is_bare);
350 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
351
352 std::string expected =
353 ".set noreorder\n" +
354 instr_name + " $a0, $a1, 1f\n" +
355 (is_bare ? "" : "nop\n") +
356 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
357 "1:\n" +
358 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
359 instr_name + " $a2, $a3, 1b\n" +
360 (is_bare ? "" : "nop\n") +
361 "addu $zero, $zero, $zero\n";
362 DriverStr(expected, instr_name);
363 }
364
BranchFpuCondHelper(void (mips64::Mips64Assembler::* f)(mips64::FpuRegister,mips64::Mips64Label *,bool),const std::string & instr_name,bool is_bare=false)365 void BranchFpuCondHelper(void (mips64::Mips64Assembler::*f)(mips64::FpuRegister,
366 mips64::Mips64Label*,
367 bool),
368 const std::string& instr_name,
369 bool is_bare = false) {
370 mips64::Mips64Label label;
371 (Base::GetAssembler()->*f)(mips64::F0, &label, is_bare);
372 constexpr size_t kAdduCount1 = 63;
373 for (size_t i = 0; i != kAdduCount1; ++i) {
374 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
375 }
376 __ Bind(&label);
377 constexpr size_t kAdduCount2 = 64;
378 for (size_t i = 0; i != kAdduCount2; ++i) {
379 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
380 }
381 (Base::GetAssembler()->*f)(mips64::F31, &label, is_bare);
382 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
383
384 std::string expected =
385 ".set noreorder\n" +
386 instr_name + " $f0, 1f\n" +
387 (is_bare ? "" : "nop\n") +
388 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
389 "1:\n" +
390 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
391 instr_name + " $f31, 1b\n" +
392 (is_bare ? "" : "nop\n") +
393 "addu $zero, $zero, $zero\n";
394 DriverStr(expected, instr_name);
395 }
396
397 private:
398 std::vector<mips64::GpuRegister*> registers_;
399 std::map<mips64::GpuRegister, std::string, MIPS64CpuRegisterCompare> secondary_register_names_;
400
401 std::vector<mips64::FpuRegister*> fp_registers_;
402 std::vector<mips64::VectorRegister*> vec_registers_;
403
404 std::unique_ptr<const Mips64InstructionSetFeatures> instruction_set_features_;
405 };
406
TEST_F(AssemblerMIPS64Test,Toolchain)407 TEST_F(AssemblerMIPS64Test, Toolchain) {
408 EXPECT_TRUE(CheckTools());
409 }
410
411 ///////////////////
412 // FP Operations //
413 ///////////////////
414
TEST_F(AssemblerMIPS64Test,AddS)415 TEST_F(AssemblerMIPS64Test, AddS) {
416 DriverStr(RepeatFFF(&mips64::Mips64Assembler::AddS, "add.s ${reg1}, ${reg2}, ${reg3}"), "add.s");
417 }
418
TEST_F(AssemblerMIPS64Test,AddD)419 TEST_F(AssemblerMIPS64Test, AddD) {
420 DriverStr(RepeatFFF(&mips64::Mips64Assembler::AddD, "add.d ${reg1}, ${reg2}, ${reg3}"), "add.d");
421 }
422
TEST_F(AssemblerMIPS64Test,SubS)423 TEST_F(AssemblerMIPS64Test, SubS) {
424 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SubS, "sub.s ${reg1}, ${reg2}, ${reg3}"), "sub.s");
425 }
426
TEST_F(AssemblerMIPS64Test,SubD)427 TEST_F(AssemblerMIPS64Test, SubD) {
428 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SubD, "sub.d ${reg1}, ${reg2}, ${reg3}"), "sub.d");
429 }
430
TEST_F(AssemblerMIPS64Test,MulS)431 TEST_F(AssemblerMIPS64Test, MulS) {
432 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MulS, "mul.s ${reg1}, ${reg2}, ${reg3}"), "mul.s");
433 }
434
TEST_F(AssemblerMIPS64Test,MulD)435 TEST_F(AssemblerMIPS64Test, MulD) {
436 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MulD, "mul.d ${reg1}, ${reg2}, ${reg3}"), "mul.d");
437 }
438
TEST_F(AssemblerMIPS64Test,DivS)439 TEST_F(AssemblerMIPS64Test, DivS) {
440 DriverStr(RepeatFFF(&mips64::Mips64Assembler::DivS, "div.s ${reg1}, ${reg2}, ${reg3}"), "div.s");
441 }
442
TEST_F(AssemblerMIPS64Test,DivD)443 TEST_F(AssemblerMIPS64Test, DivD) {
444 DriverStr(RepeatFFF(&mips64::Mips64Assembler::DivD, "div.d ${reg1}, ${reg2}, ${reg3}"), "div.d");
445 }
446
TEST_F(AssemblerMIPS64Test,SqrtS)447 TEST_F(AssemblerMIPS64Test, SqrtS) {
448 DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtS, "sqrt.s ${reg1}, ${reg2}"), "sqrt.s");
449 }
450
TEST_F(AssemblerMIPS64Test,SqrtD)451 TEST_F(AssemblerMIPS64Test, SqrtD) {
452 DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtD, "sqrt.d ${reg1}, ${reg2}"), "sqrt.d");
453 }
454
TEST_F(AssemblerMIPS64Test,AbsS)455 TEST_F(AssemblerMIPS64Test, AbsS) {
456 DriverStr(RepeatFF(&mips64::Mips64Assembler::AbsS, "abs.s ${reg1}, ${reg2}"), "abs.s");
457 }
458
TEST_F(AssemblerMIPS64Test,AbsD)459 TEST_F(AssemblerMIPS64Test, AbsD) {
460 DriverStr(RepeatFF(&mips64::Mips64Assembler::AbsD, "abs.d ${reg1}, ${reg2}"), "abs.d");
461 }
462
TEST_F(AssemblerMIPS64Test,MovS)463 TEST_F(AssemblerMIPS64Test, MovS) {
464 DriverStr(RepeatFF(&mips64::Mips64Assembler::MovS, "mov.s ${reg1}, ${reg2}"), "mov.s");
465 }
466
TEST_F(AssemblerMIPS64Test,MovD)467 TEST_F(AssemblerMIPS64Test, MovD) {
468 DriverStr(RepeatFF(&mips64::Mips64Assembler::MovD, "mov.d ${reg1}, ${reg2}"), "mov.d");
469 }
470
TEST_F(AssemblerMIPS64Test,NegS)471 TEST_F(AssemblerMIPS64Test, NegS) {
472 DriverStr(RepeatFF(&mips64::Mips64Assembler::NegS, "neg.s ${reg1}, ${reg2}"), "neg.s");
473 }
474
TEST_F(AssemblerMIPS64Test,NegD)475 TEST_F(AssemblerMIPS64Test, NegD) {
476 DriverStr(RepeatFF(&mips64::Mips64Assembler::NegD, "neg.d ${reg1}, ${reg2}"), "neg.d");
477 }
478
TEST_F(AssemblerMIPS64Test,RoundLS)479 TEST_F(AssemblerMIPS64Test, RoundLS) {
480 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundLS, "round.l.s ${reg1}, ${reg2}"), "round.l.s");
481 }
482
TEST_F(AssemblerMIPS64Test,RoundLD)483 TEST_F(AssemblerMIPS64Test, RoundLD) {
484 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundLD, "round.l.d ${reg1}, ${reg2}"), "round.l.d");
485 }
486
TEST_F(AssemblerMIPS64Test,RoundWS)487 TEST_F(AssemblerMIPS64Test, RoundWS) {
488 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundWS, "round.w.s ${reg1}, ${reg2}"), "round.w.s");
489 }
490
TEST_F(AssemblerMIPS64Test,RoundWD)491 TEST_F(AssemblerMIPS64Test, RoundWD) {
492 DriverStr(RepeatFF(&mips64::Mips64Assembler::RoundWD, "round.w.d ${reg1}, ${reg2}"), "round.w.d");
493 }
494
TEST_F(AssemblerMIPS64Test,CeilLS)495 TEST_F(AssemblerMIPS64Test, CeilLS) {
496 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilLS, "ceil.l.s ${reg1}, ${reg2}"), "ceil.l.s");
497 }
498
TEST_F(AssemblerMIPS64Test,CeilLD)499 TEST_F(AssemblerMIPS64Test, CeilLD) {
500 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilLD, "ceil.l.d ${reg1}, ${reg2}"), "ceil.l.d");
501 }
502
TEST_F(AssemblerMIPS64Test,CeilWS)503 TEST_F(AssemblerMIPS64Test, CeilWS) {
504 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilWS, "ceil.w.s ${reg1}, ${reg2}"), "ceil.w.s");
505 }
506
TEST_F(AssemblerMIPS64Test,CeilWD)507 TEST_F(AssemblerMIPS64Test, CeilWD) {
508 DriverStr(RepeatFF(&mips64::Mips64Assembler::CeilWD, "ceil.w.d ${reg1}, ${reg2}"), "ceil.w.d");
509 }
510
TEST_F(AssemblerMIPS64Test,FloorLS)511 TEST_F(AssemblerMIPS64Test, FloorLS) {
512 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorLS, "floor.l.s ${reg1}, ${reg2}"), "floor.l.s");
513 }
514
TEST_F(AssemblerMIPS64Test,FloorLD)515 TEST_F(AssemblerMIPS64Test, FloorLD) {
516 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorLD, "floor.l.d ${reg1}, ${reg2}"), "floor.l.d");
517 }
518
TEST_F(AssemblerMIPS64Test,FloorWS)519 TEST_F(AssemblerMIPS64Test, FloorWS) {
520 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorWS, "floor.w.s ${reg1}, ${reg2}"), "floor.w.s");
521 }
522
TEST_F(AssemblerMIPS64Test,FloorWD)523 TEST_F(AssemblerMIPS64Test, FloorWD) {
524 DriverStr(RepeatFF(&mips64::Mips64Assembler::FloorWD, "floor.w.d ${reg1}, ${reg2}"), "floor.w.d");
525 }
526
TEST_F(AssemblerMIPS64Test,SelS)527 TEST_F(AssemblerMIPS64Test, SelS) {
528 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelS, "sel.s ${reg1}, ${reg2}, ${reg3}"), "sel.s");
529 }
530
TEST_F(AssemblerMIPS64Test,SelD)531 TEST_F(AssemblerMIPS64Test, SelD) {
532 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelD, "sel.d ${reg1}, ${reg2}, ${reg3}"), "sel.d");
533 }
534
TEST_F(AssemblerMIPS64Test,SeleqzS)535 TEST_F(AssemblerMIPS64Test, SeleqzS) {
536 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SeleqzS, "seleqz.s ${reg1}, ${reg2}, ${reg3}"),
537 "seleqz.s");
538 }
539
TEST_F(AssemblerMIPS64Test,SeleqzD)540 TEST_F(AssemblerMIPS64Test, SeleqzD) {
541 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SeleqzD, "seleqz.d ${reg1}, ${reg2}, ${reg3}"),
542 "seleqz.d");
543 }
544
TEST_F(AssemblerMIPS64Test,SelnezS)545 TEST_F(AssemblerMIPS64Test, SelnezS) {
546 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelnezS, "selnez.s ${reg1}, ${reg2}, ${reg3}"),
547 "selnez.s");
548 }
549
TEST_F(AssemblerMIPS64Test,SelnezD)550 TEST_F(AssemblerMIPS64Test, SelnezD) {
551 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SelnezD, "selnez.d ${reg1}, ${reg2}, ${reg3}"),
552 "selnez.d");
553 }
554
TEST_F(AssemblerMIPS64Test,RintS)555 TEST_F(AssemblerMIPS64Test, RintS) {
556 DriverStr(RepeatFF(&mips64::Mips64Assembler::RintS, "rint.s ${reg1}, ${reg2}"), "rint.s");
557 }
558
TEST_F(AssemblerMIPS64Test,RintD)559 TEST_F(AssemblerMIPS64Test, RintD) {
560 DriverStr(RepeatFF(&mips64::Mips64Assembler::RintD, "rint.d ${reg1}, ${reg2}"), "rint.d");
561 }
562
TEST_F(AssemblerMIPS64Test,ClassS)563 TEST_F(AssemblerMIPS64Test, ClassS) {
564 DriverStr(RepeatFF(&mips64::Mips64Assembler::ClassS, "class.s ${reg1}, ${reg2}"), "class.s");
565 }
566
TEST_F(AssemblerMIPS64Test,ClassD)567 TEST_F(AssemblerMIPS64Test, ClassD) {
568 DriverStr(RepeatFF(&mips64::Mips64Assembler::ClassD, "class.d ${reg1}, ${reg2}"), "class.d");
569 }
570
TEST_F(AssemblerMIPS64Test,MinS)571 TEST_F(AssemblerMIPS64Test, MinS) {
572 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MinS, "min.s ${reg1}, ${reg2}, ${reg3}"), "min.s");
573 }
574
TEST_F(AssemblerMIPS64Test,MinD)575 TEST_F(AssemblerMIPS64Test, MinD) {
576 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MinD, "min.d ${reg1}, ${reg2}, ${reg3}"), "min.d");
577 }
578
TEST_F(AssemblerMIPS64Test,MaxS)579 TEST_F(AssemblerMIPS64Test, MaxS) {
580 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MaxS, "max.s ${reg1}, ${reg2}, ${reg3}"), "max.s");
581 }
582
TEST_F(AssemblerMIPS64Test,MaxD)583 TEST_F(AssemblerMIPS64Test, MaxD) {
584 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MaxD, "max.d ${reg1}, ${reg2}, ${reg3}"), "max.d");
585 }
586
TEST_F(AssemblerMIPS64Test,CmpUnS)587 TEST_F(AssemblerMIPS64Test, CmpUnS) {
588 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUnS, "cmp.un.s ${reg1}, ${reg2}, ${reg3}"),
589 "cmp.un.s");
590 }
591
TEST_F(AssemblerMIPS64Test,CmpEqS)592 TEST_F(AssemblerMIPS64Test, CmpEqS) {
593 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpEqS, "cmp.eq.s ${reg1}, ${reg2}, ${reg3}"),
594 "cmp.eq.s");
595 }
596
TEST_F(AssemblerMIPS64Test,CmpUeqS)597 TEST_F(AssemblerMIPS64Test, CmpUeqS) {
598 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUeqS, "cmp.ueq.s ${reg1}, ${reg2}, ${reg3}"),
599 "cmp.ueq.s");
600 }
601
TEST_F(AssemblerMIPS64Test,CmpLtS)602 TEST_F(AssemblerMIPS64Test, CmpLtS) {
603 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtS, "cmp.lt.s ${reg1}, ${reg2}, ${reg3}"),
604 "cmp.lt.s");
605 }
606
TEST_F(AssemblerMIPS64Test,CmpUltS)607 TEST_F(AssemblerMIPS64Test, CmpUltS) {
608 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUltS, "cmp.ult.s ${reg1}, ${reg2}, ${reg3}"),
609 "cmp.ult.s");
610 }
611
TEST_F(AssemblerMIPS64Test,CmpLeS)612 TEST_F(AssemblerMIPS64Test, CmpLeS) {
613 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLeS, "cmp.le.s ${reg1}, ${reg2}, ${reg3}"),
614 "cmp.le.s");
615 }
616
TEST_F(AssemblerMIPS64Test,CmpUleS)617 TEST_F(AssemblerMIPS64Test, CmpUleS) {
618 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUleS, "cmp.ule.s ${reg1}, ${reg2}, ${reg3}"),
619 "cmp.ule.s");
620 }
621
TEST_F(AssemblerMIPS64Test,CmpOrS)622 TEST_F(AssemblerMIPS64Test, CmpOrS) {
623 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpOrS, "cmp.or.s ${reg1}, ${reg2}, ${reg3}"),
624 "cmp.or.s");
625 }
626
TEST_F(AssemblerMIPS64Test,CmpUneS)627 TEST_F(AssemblerMIPS64Test, CmpUneS) {
628 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUneS, "cmp.une.s ${reg1}, ${reg2}, ${reg3}"),
629 "cmp.une.s");
630 }
631
TEST_F(AssemblerMIPS64Test,CmpNeS)632 TEST_F(AssemblerMIPS64Test, CmpNeS) {
633 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpNeS, "cmp.ne.s ${reg1}, ${reg2}, ${reg3}"),
634 "cmp.ne.s");
635 }
636
TEST_F(AssemblerMIPS64Test,CmpUnD)637 TEST_F(AssemblerMIPS64Test, CmpUnD) {
638 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUnD, "cmp.un.d ${reg1}, ${reg2}, ${reg3}"),
639 "cmp.un.d");
640 }
641
TEST_F(AssemblerMIPS64Test,CmpEqD)642 TEST_F(AssemblerMIPS64Test, CmpEqD) {
643 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpEqD, "cmp.eq.d ${reg1}, ${reg2}, ${reg3}"),
644 "cmp.eq.d");
645 }
646
TEST_F(AssemblerMIPS64Test,CmpUeqD)647 TEST_F(AssemblerMIPS64Test, CmpUeqD) {
648 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUeqD, "cmp.ueq.d ${reg1}, ${reg2}, ${reg3}"),
649 "cmp.ueq.d");
650 }
651
TEST_F(AssemblerMIPS64Test,CmpLtD)652 TEST_F(AssemblerMIPS64Test, CmpLtD) {
653 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"),
654 "cmp.lt.d");
655 }
656
TEST_F(AssemblerMIPS64Test,CmpUltD)657 TEST_F(AssemblerMIPS64Test, CmpUltD) {
658 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUltD, "cmp.ult.d ${reg1}, ${reg2}, ${reg3}"),
659 "cmp.ult.d");
660 }
661
TEST_F(AssemblerMIPS64Test,CmpLeD)662 TEST_F(AssemblerMIPS64Test, CmpLeD) {
663 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLeD, "cmp.le.d ${reg1}, ${reg2}, ${reg3}"),
664 "cmp.le.d");
665 }
666
TEST_F(AssemblerMIPS64Test,CmpUleD)667 TEST_F(AssemblerMIPS64Test, CmpUleD) {
668 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUleD, "cmp.ule.d ${reg1}, ${reg2}, ${reg3}"),
669 "cmp.ule.d");
670 }
671
TEST_F(AssemblerMIPS64Test,CmpOrD)672 TEST_F(AssemblerMIPS64Test, CmpOrD) {
673 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpOrD, "cmp.or.d ${reg1}, ${reg2}, ${reg3}"),
674 "cmp.or.d");
675 }
676
TEST_F(AssemblerMIPS64Test,CmpUneD)677 TEST_F(AssemblerMIPS64Test, CmpUneD) {
678 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpUneD, "cmp.une.d ${reg1}, ${reg2}, ${reg3}"),
679 "cmp.une.d");
680 }
681
TEST_F(AssemblerMIPS64Test,CmpNeD)682 TEST_F(AssemblerMIPS64Test, CmpNeD) {
683 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpNeD, "cmp.ne.d ${reg1}, ${reg2}, ${reg3}"),
684 "cmp.ne.d");
685 }
686
TEST_F(AssemblerMIPS64Test,CvtDL)687 TEST_F(AssemblerMIPS64Test, CvtDL) {
688 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtdl, "cvt.d.l ${reg1}, ${reg2}"), "cvt.d.l");
689 }
690
TEST_F(AssemblerMIPS64Test,CvtDS)691 TEST_F(AssemblerMIPS64Test, CvtDS) {
692 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtds, "cvt.d.s ${reg1}, ${reg2}"), "cvt.d.s");
693 }
694
TEST_F(AssemblerMIPS64Test,CvtDW)695 TEST_F(AssemblerMIPS64Test, CvtDW) {
696 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtdw, "cvt.d.w ${reg1}, ${reg2}"), "cvt.d.w");
697 }
698
TEST_F(AssemblerMIPS64Test,CvtSL)699 TEST_F(AssemblerMIPS64Test, CvtSL) {
700 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsl, "cvt.s.l ${reg1}, ${reg2}"), "cvt.s.l");
701 }
702
TEST_F(AssemblerMIPS64Test,CvtSD)703 TEST_F(AssemblerMIPS64Test, CvtSD) {
704 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsd, "cvt.s.d ${reg1}, ${reg2}"), "cvt.s.d");
705 }
706
TEST_F(AssemblerMIPS64Test,CvtSW)707 TEST_F(AssemblerMIPS64Test, CvtSW) {
708 DriverStr(RepeatFF(&mips64::Mips64Assembler::Cvtsw, "cvt.s.w ${reg1}, ${reg2}"), "cvt.s.w");
709 }
710
TEST_F(AssemblerMIPS64Test,TruncWS)711 TEST_F(AssemblerMIPS64Test, TruncWS) {
712 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncWS, "trunc.w.s ${reg1}, ${reg2}"), "trunc.w.s");
713 }
714
TEST_F(AssemblerMIPS64Test,TruncWD)715 TEST_F(AssemblerMIPS64Test, TruncWD) {
716 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncWD, "trunc.w.d ${reg1}, ${reg2}"), "trunc.w.d");
717 }
718
TEST_F(AssemblerMIPS64Test,TruncLS)719 TEST_F(AssemblerMIPS64Test, TruncLS) {
720 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncLS, "trunc.l.s ${reg1}, ${reg2}"), "trunc.l.s");
721 }
722
TEST_F(AssemblerMIPS64Test,TruncLD)723 TEST_F(AssemblerMIPS64Test, TruncLD) {
724 DriverStr(RepeatFF(&mips64::Mips64Assembler::TruncLD, "trunc.l.d ${reg1}, ${reg2}"), "trunc.l.d");
725 }
726
TEST_F(AssemblerMIPS64Test,Mfc1)727 TEST_F(AssemblerMIPS64Test, Mfc1) {
728 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mfc1, "mfc1 ${reg1}, ${reg2}"), "Mfc1");
729 }
730
TEST_F(AssemblerMIPS64Test,Mfhc1)731 TEST_F(AssemblerMIPS64Test, Mfhc1) {
732 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mfhc1, "mfhc1 ${reg1}, ${reg2}"), "Mfhc1");
733 }
734
TEST_F(AssemblerMIPS64Test,Mtc1)735 TEST_F(AssemblerMIPS64Test, Mtc1) {
736 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mtc1, "mtc1 ${reg1}, ${reg2}"), "Mtc1");
737 }
738
TEST_F(AssemblerMIPS64Test,Mthc1)739 TEST_F(AssemblerMIPS64Test, Mthc1) {
740 DriverStr(RepeatRF(&mips64::Mips64Assembler::Mthc1, "mthc1 ${reg1}, ${reg2}"), "Mthc1");
741 }
742
TEST_F(AssemblerMIPS64Test,Dmfc1)743 TEST_F(AssemblerMIPS64Test, Dmfc1) {
744 DriverStr(RepeatRF(&mips64::Mips64Assembler::Dmfc1, "dmfc1 ${reg1}, ${reg2}"), "Dmfc1");
745 }
746
TEST_F(AssemblerMIPS64Test,Dmtc1)747 TEST_F(AssemblerMIPS64Test, Dmtc1) {
748 DriverStr(RepeatRF(&mips64::Mips64Assembler::Dmtc1, "dmtc1 ${reg1}, ${reg2}"), "Dmtc1");
749 }
750
TEST_F(AssemblerMIPS64Test,Lwc1)751 TEST_F(AssemblerMIPS64Test, Lwc1) {
752 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Lwc1, -16, "lwc1 ${reg1}, {imm}(${reg2})"),
753 "lwc1");
754 }
755
TEST_F(AssemblerMIPS64Test,Ldc1)756 TEST_F(AssemblerMIPS64Test, Ldc1) {
757 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Ldc1, -16, "ldc1 ${reg1}, {imm}(${reg2})"),
758 "ldc1");
759 }
760
TEST_F(AssemblerMIPS64Test,Swc1)761 TEST_F(AssemblerMIPS64Test, Swc1) {
762 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Swc1, -16, "swc1 ${reg1}, {imm}(${reg2})"),
763 "swc1");
764 }
765
TEST_F(AssemblerMIPS64Test,Sdc1)766 TEST_F(AssemblerMIPS64Test, Sdc1) {
767 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Sdc1, -16, "sdc1 ${reg1}, {imm}(${reg2})"),
768 "sdc1");
769 }
770
771 //////////////
772 // BRANCHES //
773 //////////////
774
TEST_F(AssemblerMIPS64Test,Jalr)775 TEST_F(AssemblerMIPS64Test, Jalr) {
776 DriverStr(".set noreorder\n" +
777 RepeatRRNoDupes(&mips64::Mips64Assembler::Jalr, "jalr ${reg1}, ${reg2}"), "jalr");
778 }
779
TEST_F(AssemblerMIPS64Test,Bc)780 TEST_F(AssemblerMIPS64Test, Bc) {
781 BranchHelper(&mips64::Mips64Assembler::Bc, "Bc");
782 }
783
TEST_F(AssemblerMIPS64Test,Balc)784 TEST_F(AssemblerMIPS64Test, Balc) {
785 BranchHelper(&mips64::Mips64Assembler::Balc, "Balc");
786 }
787
TEST_F(AssemblerMIPS64Test,Beqzc)788 TEST_F(AssemblerMIPS64Test, Beqzc) {
789 BranchCondOneRegHelper(&mips64::Mips64Assembler::Beqzc, "Beqzc");
790 }
791
TEST_F(AssemblerMIPS64Test,Bnezc)792 TEST_F(AssemblerMIPS64Test, Bnezc) {
793 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bnezc, "Bnezc");
794 }
795
TEST_F(AssemblerMIPS64Test,Bltzc)796 TEST_F(AssemblerMIPS64Test, Bltzc) {
797 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bltzc, "Bltzc");
798 }
799
TEST_F(AssemblerMIPS64Test,Bgezc)800 TEST_F(AssemblerMIPS64Test, Bgezc) {
801 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgezc, "Bgezc");
802 }
803
TEST_F(AssemblerMIPS64Test,Blezc)804 TEST_F(AssemblerMIPS64Test, Blezc) {
805 BranchCondOneRegHelper(&mips64::Mips64Assembler::Blezc, "Blezc");
806 }
807
TEST_F(AssemblerMIPS64Test,Bgtzc)808 TEST_F(AssemblerMIPS64Test, Bgtzc) {
809 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgtzc, "Bgtzc");
810 }
811
TEST_F(AssemblerMIPS64Test,Beqc)812 TEST_F(AssemblerMIPS64Test, Beqc) {
813 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Beqc, "Beqc");
814 }
815
TEST_F(AssemblerMIPS64Test,Bnec)816 TEST_F(AssemblerMIPS64Test, Bnec) {
817 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bnec, "Bnec");
818 }
819
TEST_F(AssemblerMIPS64Test,Bltc)820 TEST_F(AssemblerMIPS64Test, Bltc) {
821 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltc, "Bltc");
822 }
823
TEST_F(AssemblerMIPS64Test,Bgec)824 TEST_F(AssemblerMIPS64Test, Bgec) {
825 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgec, "Bgec");
826 }
827
TEST_F(AssemblerMIPS64Test,Bltuc)828 TEST_F(AssemblerMIPS64Test, Bltuc) {
829 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltuc, "Bltuc");
830 }
831
TEST_F(AssemblerMIPS64Test,Bgeuc)832 TEST_F(AssemblerMIPS64Test, Bgeuc) {
833 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgeuc, "Bgeuc");
834 }
835
TEST_F(AssemblerMIPS64Test,Bc1eqz)836 TEST_F(AssemblerMIPS64Test, Bc1eqz) {
837 BranchFpuCondHelper(&mips64::Mips64Assembler::Bc1eqz, "Bc1eqz");
838 }
839
TEST_F(AssemblerMIPS64Test,Bc1nez)840 TEST_F(AssemblerMIPS64Test, Bc1nez) {
841 BranchFpuCondHelper(&mips64::Mips64Assembler::Bc1nez, "Bc1nez");
842 }
843
TEST_F(AssemblerMIPS64Test,BareBc)844 TEST_F(AssemblerMIPS64Test, BareBc) {
845 BranchHelper(&mips64::Mips64Assembler::Bc, "Bc", /* is_bare */ true);
846 }
847
TEST_F(AssemblerMIPS64Test,BareBalc)848 TEST_F(AssemblerMIPS64Test, BareBalc) {
849 BranchHelper(&mips64::Mips64Assembler::Balc, "Balc", /* is_bare */ true);
850 }
851
TEST_F(AssemblerMIPS64Test,BareBeqzc)852 TEST_F(AssemblerMIPS64Test, BareBeqzc) {
853 BranchCondOneRegHelper(&mips64::Mips64Assembler::Beqzc, "Beqzc", /* is_bare */ true);
854 }
855
TEST_F(AssemblerMIPS64Test,BareBnezc)856 TEST_F(AssemblerMIPS64Test, BareBnezc) {
857 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bnezc, "Bnezc", /* is_bare */ true);
858 }
859
TEST_F(AssemblerMIPS64Test,BareBltzc)860 TEST_F(AssemblerMIPS64Test, BareBltzc) {
861 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bltzc, "Bltzc", /* is_bare */ true);
862 }
863
TEST_F(AssemblerMIPS64Test,BareBgezc)864 TEST_F(AssemblerMIPS64Test, BareBgezc) {
865 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgezc, "Bgezc", /* is_bare */ true);
866 }
867
TEST_F(AssemblerMIPS64Test,BareBlezc)868 TEST_F(AssemblerMIPS64Test, BareBlezc) {
869 BranchCondOneRegHelper(&mips64::Mips64Assembler::Blezc, "Blezc", /* is_bare */ true);
870 }
871
TEST_F(AssemblerMIPS64Test,BareBgtzc)872 TEST_F(AssemblerMIPS64Test, BareBgtzc) {
873 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgtzc, "Bgtzc", /* is_bare */ true);
874 }
875
TEST_F(AssemblerMIPS64Test,BareBeqc)876 TEST_F(AssemblerMIPS64Test, BareBeqc) {
877 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Beqc, "Beqc", /* is_bare */ true);
878 }
879
TEST_F(AssemblerMIPS64Test,BareBnec)880 TEST_F(AssemblerMIPS64Test, BareBnec) {
881 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bnec, "Bnec", /* is_bare */ true);
882 }
883
TEST_F(AssemblerMIPS64Test,BareBltc)884 TEST_F(AssemblerMIPS64Test, BareBltc) {
885 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltc, "Bltc", /* is_bare */ true);
886 }
887
TEST_F(AssemblerMIPS64Test,BareBgec)888 TEST_F(AssemblerMIPS64Test, BareBgec) {
889 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgec, "Bgec", /* is_bare */ true);
890 }
891
TEST_F(AssemblerMIPS64Test,BareBltuc)892 TEST_F(AssemblerMIPS64Test, BareBltuc) {
893 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bltuc, "Bltuc", /* is_bare */ true);
894 }
895
TEST_F(AssemblerMIPS64Test,BareBgeuc)896 TEST_F(AssemblerMIPS64Test, BareBgeuc) {
897 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bgeuc, "Bgeuc", /* is_bare */ true);
898 }
899
TEST_F(AssemblerMIPS64Test,BareBc1eqz)900 TEST_F(AssemblerMIPS64Test, BareBc1eqz) {
901 BranchFpuCondHelper(&mips64::Mips64Assembler::Bc1eqz, "Bc1eqz", /* is_bare */ true);
902 }
903
TEST_F(AssemblerMIPS64Test,BareBc1nez)904 TEST_F(AssemblerMIPS64Test, BareBc1nez) {
905 BranchFpuCondHelper(&mips64::Mips64Assembler::Bc1nez, "Bc1nez", /* is_bare */ true);
906 }
907
TEST_F(AssemblerMIPS64Test,BareBeqz)908 TEST_F(AssemblerMIPS64Test, BareBeqz) {
909 BranchCondOneRegHelper(&mips64::Mips64Assembler::Beqz, "Beqz", /* is_bare */ true);
910 }
911
TEST_F(AssemblerMIPS64Test,BareBnez)912 TEST_F(AssemblerMIPS64Test, BareBnez) {
913 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bnez, "Bnez", /* is_bare */ true);
914 }
915
TEST_F(AssemblerMIPS64Test,BareBltz)916 TEST_F(AssemblerMIPS64Test, BareBltz) {
917 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bltz, "Bltz", /* is_bare */ true);
918 }
919
TEST_F(AssemblerMIPS64Test,BareBgez)920 TEST_F(AssemblerMIPS64Test, BareBgez) {
921 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgez, "Bgez", /* is_bare */ true);
922 }
923
TEST_F(AssemblerMIPS64Test,BareBlez)924 TEST_F(AssemblerMIPS64Test, BareBlez) {
925 BranchCondOneRegHelper(&mips64::Mips64Assembler::Blez, "Blez", /* is_bare */ true);
926 }
927
TEST_F(AssemblerMIPS64Test,BareBgtz)928 TEST_F(AssemblerMIPS64Test, BareBgtz) {
929 BranchCondOneRegHelper(&mips64::Mips64Assembler::Bgtz, "Bgtz", /* is_bare */ true);
930 }
931
TEST_F(AssemblerMIPS64Test,BareBeq)932 TEST_F(AssemblerMIPS64Test, BareBeq) {
933 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Beq, "Beq", /* is_bare */ true);
934 }
935
TEST_F(AssemblerMIPS64Test,BareBne)936 TEST_F(AssemblerMIPS64Test, BareBne) {
937 BranchCondTwoRegsHelper(&mips64::Mips64Assembler::Bne, "Bne", /* is_bare */ true);
938 }
939
TEST_F(AssemblerMIPS64Test,LongBeqc)940 TEST_F(AssemblerMIPS64Test, LongBeqc) {
941 mips64::Mips64Label label;
942 __ Beqc(mips64::A0, mips64::A1, &label);
943 constexpr uint32_t kAdduCount1 = (1u << 15) + 1;
944 for (uint32_t i = 0; i != kAdduCount1; ++i) {
945 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
946 }
947 __ Bind(&label);
948 constexpr uint32_t kAdduCount2 = (1u << 15) + 1;
949 for (uint32_t i = 0; i != kAdduCount2; ++i) {
950 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
951 }
952 __ Beqc(mips64::A2, mips64::A3, &label);
953
954 uint32_t offset_forward = 2 + kAdduCount1; // 2: account for auipc and jic.
955 offset_forward <<= 2;
956 offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic.
957
958 uint32_t offset_back = -(kAdduCount2 + 1); // 1: account for bnec.
959 offset_back <<= 2;
960 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic.
961
962 std::ostringstream oss;
963 oss <<
964 ".set noreorder\n"
965 "bnec $a0, $a1, 1f\n"
966 "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n"
967 "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n"
968 "1:\n" <<
969 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") <<
970 "2:\n" <<
971 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") <<
972 "bnec $a2, $a3, 3f\n"
973 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
974 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"
975 "3:\n";
976 std::string expected = oss.str();
977 DriverStr(expected, "LongBeqc");
978 }
979
TEST_F(AssemblerMIPS64Test,LongBeqzc)980 TEST_F(AssemblerMIPS64Test, LongBeqzc) {
981 constexpr uint32_t kNopCount1 = (1u << 20) + 1;
982 constexpr uint32_t kNopCount2 = (1u << 20) + 1;
983 constexpr uint32_t kRequiredCapacity = (kNopCount1 + kNopCount2 + 6u) * 4u;
984 ASSERT_LT(__ GetBuffer()->Capacity(), kRequiredCapacity);
985 __ GetBuffer()->ExtendCapacity(kRequiredCapacity);
986 mips64::Mips64Label label;
987 __ Beqzc(mips64::A0, &label);
988 for (uint32_t i = 0; i != kNopCount1; ++i) {
989 __ Nop();
990 }
991 __ Bind(&label);
992 for (uint32_t i = 0; i != kNopCount2; ++i) {
993 __ Nop();
994 }
995 __ Beqzc(mips64::A2, &label);
996
997 uint32_t offset_forward = 2 + kNopCount1; // 2: account for auipc and jic.
998 offset_forward <<= 2;
999 offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic.
1000
1001 uint32_t offset_back = -(kNopCount2 + 1); // 1: account for bnezc.
1002 offset_back <<= 2;
1003 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic.
1004
1005 // Note, we're using the ".fill" directive to tell the assembler to generate many NOPs
1006 // instead of generating them ourselves in the source code. This saves test time.
1007 std::ostringstream oss;
1008 oss <<
1009 ".set noreorder\n"
1010 "bnezc $a0, 1f\n"
1011 "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n"
1012 "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n"
1013 "1:\n" <<
1014 ".fill 0x" << std::hex << kNopCount1 << " , 4, 0\n"
1015 "2:\n" <<
1016 ".fill 0x" << std::hex << kNopCount2 << " , 4, 0\n"
1017 "bnezc $a2, 3f\n"
1018 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
1019 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"
1020 "3:\n";
1021 std::string expected = oss.str();
1022 DriverStr(expected, "LongBeqzc");
1023 }
1024
TEST_F(AssemblerMIPS64Test,LongBalc)1025 TEST_F(AssemblerMIPS64Test, LongBalc) {
1026 constexpr uint32_t kNopCount1 = (1u << 25) + 1;
1027 constexpr uint32_t kNopCount2 = (1u << 25) + 1;
1028 constexpr uint32_t kRequiredCapacity = (kNopCount1 + kNopCount2 + 6u) * 4u;
1029 ASSERT_LT(__ GetBuffer()->Capacity(), kRequiredCapacity);
1030 __ GetBuffer()->ExtendCapacity(kRequiredCapacity);
1031 mips64::Mips64Label label1, label2;
1032 __ Balc(&label1);
1033 for (uint32_t i = 0; i != kNopCount1; ++i) {
1034 __ Nop();
1035 }
1036 __ Bind(&label1);
1037 __ Balc(&label2);
1038 for (uint32_t i = 0; i != kNopCount2; ++i) {
1039 __ Nop();
1040 }
1041 __ Bind(&label2);
1042 __ Balc(&label1);
1043
1044 uint32_t offset_forward1 = 2 + kNopCount1; // 2: account for auipc and jialc.
1045 offset_forward1 <<= 2;
1046 offset_forward1 += (offset_forward1 & 0x8000) << 1; // Account for sign extension in jialc.
1047
1048 uint32_t offset_forward2 = 2 + kNopCount2; // 2: account for auipc and jialc.
1049 offset_forward2 <<= 2;
1050 offset_forward2 += (offset_forward2 & 0x8000) << 1; // Account for sign extension in jialc.
1051
1052 uint32_t offset_back = -(2 + kNopCount2); // 2: account for auipc and jialc.
1053 offset_back <<= 2;
1054 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jialc.
1055
1056 // Note, we're using the ".fill" directive to tell the assembler to generate many NOPs
1057 // instead of generating them ourselves in the source code. This saves a few minutes
1058 // of test time.
1059 std::ostringstream oss;
1060 oss <<
1061 ".set noreorder\n"
1062 "auipc $at, 0x" << std::hex << High16Bits(offset_forward1) << "\n"
1063 "jialc $at, 0x" << std::hex << Low16Bits(offset_forward1) << "\n"
1064 ".fill 0x" << std::hex << kNopCount1 << " , 4, 0\n"
1065 "1:\n"
1066 "auipc $at, 0x" << std::hex << High16Bits(offset_forward2) << "\n"
1067 "jialc $at, 0x" << std::hex << Low16Bits(offset_forward2) << "\n"
1068 ".fill 0x" << std::hex << kNopCount2 << " , 4, 0\n"
1069 "2:\n"
1070 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
1071 "jialc $at, 0x" << std::hex << Low16Bits(offset_back) << "\n";
1072 std::string expected = oss.str();
1073 DriverStr(expected, "LongBalc");
1074 }
1075
1076 //////////
1077 // MISC //
1078 //////////
1079
TEST_F(AssemblerMIPS64Test,Lwpc)1080 TEST_F(AssemblerMIPS64Test, Lwpc) {
1081 // Lwpc() takes an unsigned 19-bit immediate, while the GNU assembler needs a signed offset,
1082 // hence the sign extension from bit 18 with `imm - ((imm & 0x40000) << 1)`.
1083 // The GNU assembler also wants the offset to be a multiple of 4, which it will shift right
1084 // by 2 positions when encoding, hence `<< 2` to compensate for that shift.
1085 // We capture the value of the immediate with `.set imm, {imm}` because the value is needed
1086 // twice for the sign extension, but `{imm}` is substituted only once.
1087 const char* code = ".set imm, {imm}\nlw ${reg}, ((imm - ((imm & 0x40000) << 1)) << 2)($pc)";
1088 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Lwpc, 19, code), "Lwpc");
1089 }
1090
TEST_F(AssemblerMIPS64Test,Lwupc)1091 TEST_F(AssemblerMIPS64Test, Lwupc) {
1092 // The comment for the Lwpc test applies here as well.
1093 const char* code = ".set imm, {imm}\nlwu ${reg}, ((imm - ((imm & 0x40000) << 1)) << 2)($pc)";
1094 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Lwupc, 19, code), "Lwupc");
1095 }
1096
TEST_F(AssemblerMIPS64Test,Ldpc)1097 TEST_F(AssemblerMIPS64Test, Ldpc) {
1098 // The comment for the Lwpc test applies here as well.
1099 const char* code = ".set imm, {imm}\nld ${reg}, ((imm - ((imm & 0x20000) << 1)) << 3)($pc)";
1100 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Ldpc, 18, code), "Ldpc");
1101 }
1102
TEST_F(AssemblerMIPS64Test,Auipc)1103 TEST_F(AssemblerMIPS64Test, Auipc) {
1104 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Auipc, 16, "auipc ${reg}, {imm}"), "Auipc");
1105 }
1106
TEST_F(AssemblerMIPS64Test,Addiupc)1107 TEST_F(AssemblerMIPS64Test, Addiupc) {
1108 // The comment from the Lwpc() test applies to this Addiupc() test as well.
1109 const char* code = ".set imm, {imm}\naddiupc ${reg}, (imm - ((imm & 0x40000) << 1)) << 2";
1110 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Addiupc, 19, code), "Addiupc");
1111 }
1112
TEST_F(AssemblerMIPS64Test,Addu)1113 TEST_F(AssemblerMIPS64Test, Addu) {
1114 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Addu, "addu ${reg1}, ${reg2}, ${reg3}"), "addu");
1115 }
1116
TEST_F(AssemblerMIPS64Test,Addiu)1117 TEST_F(AssemblerMIPS64Test, Addiu) {
1118 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Addiu, -16, "addiu ${reg1}, ${reg2}, {imm}"),
1119 "addiu");
1120 }
1121
TEST_F(AssemblerMIPS64Test,Daddu)1122 TEST_F(AssemblerMIPS64Test, Daddu) {
1123 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Daddu, "daddu ${reg1}, ${reg2}, ${reg3}"), "daddu");
1124 }
1125
TEST_F(AssemblerMIPS64Test,Daddiu)1126 TEST_F(AssemblerMIPS64Test, Daddiu) {
1127 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Daddiu, -16, "daddiu ${reg1}, ${reg2}, {imm}"),
1128 "daddiu");
1129 }
1130
TEST_F(AssemblerMIPS64Test,Subu)1131 TEST_F(AssemblerMIPS64Test, Subu) {
1132 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Subu, "subu ${reg1}, ${reg2}, ${reg3}"), "subu");
1133 }
1134
TEST_F(AssemblerMIPS64Test,Dsubu)1135 TEST_F(AssemblerMIPS64Test, Dsubu) {
1136 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsubu, "dsubu ${reg1}, ${reg2}, ${reg3}"), "dsubu");
1137 }
1138
TEST_F(AssemblerMIPS64Test,MulR6)1139 TEST_F(AssemblerMIPS64Test, MulR6) {
1140 DriverStr(RepeatRRR(&mips64::Mips64Assembler::MulR6, "mul ${reg1}, ${reg2}, ${reg3}"), "mulR6");
1141 }
1142
TEST_F(AssemblerMIPS64Test,DivR6)1143 TEST_F(AssemblerMIPS64Test, DivR6) {
1144 DriverStr(RepeatRRR(&mips64::Mips64Assembler::DivR6, "div ${reg1}, ${reg2}, ${reg3}"), "divR6");
1145 }
1146
TEST_F(AssemblerMIPS64Test,ModR6)1147 TEST_F(AssemblerMIPS64Test, ModR6) {
1148 DriverStr(RepeatRRR(&mips64::Mips64Assembler::ModR6, "mod ${reg1}, ${reg2}, ${reg3}"), "modR6");
1149 }
1150
TEST_F(AssemblerMIPS64Test,DivuR6)1151 TEST_F(AssemblerMIPS64Test, DivuR6) {
1152 DriverStr(RepeatRRR(&mips64::Mips64Assembler::DivuR6, "divu ${reg1}, ${reg2}, ${reg3}"),
1153 "divuR6");
1154 }
1155
TEST_F(AssemblerMIPS64Test,ModuR6)1156 TEST_F(AssemblerMIPS64Test, ModuR6) {
1157 DriverStr(RepeatRRR(&mips64::Mips64Assembler::ModuR6, "modu ${reg1}, ${reg2}, ${reg3}"),
1158 "moduR6");
1159 }
1160
TEST_F(AssemblerMIPS64Test,Dmul)1161 TEST_F(AssemblerMIPS64Test, Dmul) {
1162 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dmul, "dmul ${reg1}, ${reg2}, ${reg3}"), "dmul");
1163 }
1164
TEST_F(AssemblerMIPS64Test,Ddiv)1165 TEST_F(AssemblerMIPS64Test, Ddiv) {
1166 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Ddiv, "ddiv ${reg1}, ${reg2}, ${reg3}"), "ddiv");
1167 }
1168
TEST_F(AssemblerMIPS64Test,Dmod)1169 TEST_F(AssemblerMIPS64Test, Dmod) {
1170 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dmod, "dmod ${reg1}, ${reg2}, ${reg3}"), "dmod");
1171 }
1172
TEST_F(AssemblerMIPS64Test,Ddivu)1173 TEST_F(AssemblerMIPS64Test, Ddivu) {
1174 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Ddivu, "ddivu ${reg1}, ${reg2}, ${reg3}"), "ddivu");
1175 }
1176
TEST_F(AssemblerMIPS64Test,Dmodu)1177 TEST_F(AssemblerMIPS64Test, Dmodu) {
1178 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dmodu, "dmodu ${reg1}, ${reg2}, ${reg3}"), "dmodu");
1179 }
1180
TEST_F(AssemblerMIPS64Test,And)1181 TEST_F(AssemblerMIPS64Test, And) {
1182 DriverStr(RepeatRRR(&mips64::Mips64Assembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "and");
1183 }
1184
TEST_F(AssemblerMIPS64Test,Andi)1185 TEST_F(AssemblerMIPS64Test, Andi) {
1186 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Andi, 16, "andi ${reg1}, ${reg2}, {imm}"), "andi");
1187 }
1188
TEST_F(AssemblerMIPS64Test,Or)1189 TEST_F(AssemblerMIPS64Test, Or) {
1190 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Or, "or ${reg1}, ${reg2}, ${reg3}"), "or");
1191 }
1192
TEST_F(AssemblerMIPS64Test,Ori)1193 TEST_F(AssemblerMIPS64Test, Ori) {
1194 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ori, 16, "ori ${reg1}, ${reg2}, {imm}"), "ori");
1195 }
1196
TEST_F(AssemblerMIPS64Test,Xor)1197 TEST_F(AssemblerMIPS64Test, Xor) {
1198 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Xor, "xor ${reg1}, ${reg2}, ${reg3}"), "xor");
1199 }
1200
TEST_F(AssemblerMIPS64Test,Xori)1201 TEST_F(AssemblerMIPS64Test, Xori) {
1202 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Xori, 16, "xori ${reg1}, ${reg2}, {imm}"), "xori");
1203 }
1204
TEST_F(AssemblerMIPS64Test,Nor)1205 TEST_F(AssemblerMIPS64Test, Nor) {
1206 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Nor, "nor ${reg1}, ${reg2}, ${reg3}"), "nor");
1207 }
1208
TEST_F(AssemblerMIPS64Test,Lb)1209 TEST_F(AssemblerMIPS64Test, Lb) {
1210 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lb, -16, "lb ${reg1}, {imm}(${reg2})"), "lb");
1211 }
1212
TEST_F(AssemblerMIPS64Test,Lh)1213 TEST_F(AssemblerMIPS64Test, Lh) {
1214 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lh, -16, "lh ${reg1}, {imm}(${reg2})"), "lh");
1215 }
1216
TEST_F(AssemblerMIPS64Test,Lw)1217 TEST_F(AssemblerMIPS64Test, Lw) {
1218 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lw, -16, "lw ${reg1}, {imm}(${reg2})"), "lw");
1219 }
1220
TEST_F(AssemblerMIPS64Test,Ld)1221 TEST_F(AssemblerMIPS64Test, Ld) {
1222 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ld, -16, "ld ${reg1}, {imm}(${reg2})"), "ld");
1223 }
1224
TEST_F(AssemblerMIPS64Test,Lbu)1225 TEST_F(AssemblerMIPS64Test, Lbu) {
1226 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lbu, -16, "lbu ${reg1}, {imm}(${reg2})"), "lbu");
1227 }
1228
TEST_F(AssemblerMIPS64Test,Lhu)1229 TEST_F(AssemblerMIPS64Test, Lhu) {
1230 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lhu, -16, "lhu ${reg1}, {imm}(${reg2})"), "lhu");
1231 }
1232
TEST_F(AssemblerMIPS64Test,Lwu)1233 TEST_F(AssemblerMIPS64Test, Lwu) {
1234 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lwu, -16, "lwu ${reg1}, {imm}(${reg2})"), "lwu");
1235 }
1236
TEST_F(AssemblerMIPS64Test,Lui)1237 TEST_F(AssemblerMIPS64Test, Lui) {
1238 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Lui, 16, "lui ${reg}, {imm}"), "lui");
1239 }
1240
TEST_F(AssemblerMIPS64Test,Daui)1241 TEST_F(AssemblerMIPS64Test, Daui) {
1242 std::vector<mips64::GpuRegister*> reg1_registers = GetRegisters();
1243 std::vector<mips64::GpuRegister*> reg2_registers = GetRegisters();
1244 reg2_registers.erase(reg2_registers.begin()); // reg2 can't be ZERO, remove it.
1245 std::vector<int64_t> imms = CreateImmediateValuesBits(/* imm_bits */ 16, /* as_uint */ true);
1246 WarnOnCombinations(reg1_registers.size() * reg2_registers.size() * imms.size());
1247 std::ostringstream expected;
1248 for (mips64::GpuRegister* reg1 : reg1_registers) {
1249 for (mips64::GpuRegister* reg2 : reg2_registers) {
1250 for (int64_t imm : imms) {
1251 __ Daui(*reg1, *reg2, imm);
1252 expected << "daui $" << *reg1 << ", $" << *reg2 << ", " << imm << "\n";
1253 }
1254 }
1255 }
1256 DriverStr(expected.str(), "daui");
1257 }
1258
TEST_F(AssemblerMIPS64Test,Dahi)1259 TEST_F(AssemblerMIPS64Test, Dahi) {
1260 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Dahi, 16, "dahi ${reg}, ${reg}, {imm}"), "dahi");
1261 }
1262
TEST_F(AssemblerMIPS64Test,Dati)1263 TEST_F(AssemblerMIPS64Test, Dati) {
1264 DriverStr(RepeatRIb(&mips64::Mips64Assembler::Dati, 16, "dati ${reg}, ${reg}, {imm}"), "dati");
1265 }
1266
TEST_F(AssemblerMIPS64Test,Sb)1267 TEST_F(AssemblerMIPS64Test, Sb) {
1268 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sb, -16, "sb ${reg1}, {imm}(${reg2})"), "sb");
1269 }
1270
TEST_F(AssemblerMIPS64Test,Sh)1271 TEST_F(AssemblerMIPS64Test, Sh) {
1272 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sh, -16, "sh ${reg1}, {imm}(${reg2})"), "sh");
1273 }
1274
TEST_F(AssemblerMIPS64Test,Sw)1275 TEST_F(AssemblerMIPS64Test, Sw) {
1276 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sw, -16, "sw ${reg1}, {imm}(${reg2})"), "sw");
1277 }
1278
TEST_F(AssemblerMIPS64Test,Sd)1279 TEST_F(AssemblerMIPS64Test, Sd) {
1280 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sd, -16, "sd ${reg1}, {imm}(${reg2})"), "sd");
1281 }
1282
TEST_F(AssemblerMIPS64Test,Slt)1283 TEST_F(AssemblerMIPS64Test, Slt) {
1284 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Slt, "slt ${reg1}, ${reg2}, ${reg3}"), "slt");
1285 }
1286
TEST_F(AssemblerMIPS64Test,Sltu)1287 TEST_F(AssemblerMIPS64Test, Sltu) {
1288 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Sltu, "sltu ${reg1}, ${reg2}, ${reg3}"), "sltu");
1289 }
1290
TEST_F(AssemblerMIPS64Test,Slti)1291 TEST_F(AssemblerMIPS64Test, Slti) {
1292 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Slti, -16, "slti ${reg1}, ${reg2}, {imm}"),
1293 "slti");
1294 }
1295
TEST_F(AssemblerMIPS64Test,Sltiu)1296 TEST_F(AssemblerMIPS64Test, Sltiu) {
1297 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sltiu, -16, "sltiu ${reg1}, ${reg2}, {imm}"),
1298 "sltiu");
1299 }
1300
TEST_F(AssemblerMIPS64Test,Move)1301 TEST_F(AssemblerMIPS64Test, Move) {
1302 DriverStr(RepeatRR(&mips64::Mips64Assembler::Move, "or ${reg1}, ${reg2}, $zero"), "move");
1303 }
1304
TEST_F(AssemblerMIPS64Test,Clear)1305 TEST_F(AssemblerMIPS64Test, Clear) {
1306 DriverStr(RepeatR(&mips64::Mips64Assembler::Clear, "or ${reg}, $zero, $zero"), "clear");
1307 }
1308
TEST_F(AssemblerMIPS64Test,Not)1309 TEST_F(AssemblerMIPS64Test, Not) {
1310 DriverStr(RepeatRR(&mips64::Mips64Assembler::Not, "nor ${reg1}, ${reg2}, $zero"), "not");
1311 }
1312
TEST_F(AssemblerMIPS64Test,Bitswap)1313 TEST_F(AssemblerMIPS64Test, Bitswap) {
1314 DriverStr(RepeatRR(&mips64::Mips64Assembler::Bitswap, "bitswap ${reg1}, ${reg2}"), "bitswap");
1315 }
1316
TEST_F(AssemblerMIPS64Test,Dbitswap)1317 TEST_F(AssemblerMIPS64Test, Dbitswap) {
1318 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dbitswap, "dbitswap ${reg1}, ${reg2}"), "dbitswap");
1319 }
1320
TEST_F(AssemblerMIPS64Test,Seb)1321 TEST_F(AssemblerMIPS64Test, Seb) {
1322 DriverStr(RepeatRR(&mips64::Mips64Assembler::Seb, "seb ${reg1}, ${reg2}"), "seb");
1323 }
1324
TEST_F(AssemblerMIPS64Test,Seh)1325 TEST_F(AssemblerMIPS64Test, Seh) {
1326 DriverStr(RepeatRR(&mips64::Mips64Assembler::Seh, "seh ${reg1}, ${reg2}"), "seh");
1327 }
1328
TEST_F(AssemblerMIPS64Test,Dsbh)1329 TEST_F(AssemblerMIPS64Test, Dsbh) {
1330 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dsbh, "dsbh ${reg1}, ${reg2}"), "dsbh");
1331 }
1332
TEST_F(AssemblerMIPS64Test,Dshd)1333 TEST_F(AssemblerMIPS64Test, Dshd) {
1334 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dshd, "dshd ${reg1}, ${reg2}"), "dshd");
1335 }
1336
TEST_F(AssemblerMIPS64Test,Dext)1337 TEST_F(AssemblerMIPS64Test, Dext) {
1338 std::vector<mips64::GpuRegister*> reg1_registers = GetRegisters();
1339 std::vector<mips64::GpuRegister*> reg2_registers = GetRegisters();
1340 WarnOnCombinations(reg1_registers.size() * reg2_registers.size() * 33 * 16);
1341 std::ostringstream expected;
1342 for (mips64::GpuRegister* reg1 : reg1_registers) {
1343 for (mips64::GpuRegister* reg2 : reg2_registers) {
1344 for (int32_t pos = 0; pos < 32; pos++) {
1345 for (int32_t size = 1; size <= 32; size++) {
1346 __ Dext(*reg1, *reg2, pos, size);
1347 expected << "dext $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
1348 }
1349 }
1350 }
1351 }
1352
1353 DriverStr(expected.str(), "Dext");
1354 }
1355
TEST_F(AssemblerMIPS64Test,Ins)1356 TEST_F(AssemblerMIPS64Test, Ins) {
1357 std::vector<mips64::GpuRegister*> regs = GetRegisters();
1358 WarnOnCombinations(regs.size() * regs.size() * 33 * 16);
1359 std::string expected;
1360 for (mips64::GpuRegister* reg1 : regs) {
1361 for (mips64::GpuRegister* reg2 : regs) {
1362 for (int32_t pos = 0; pos < 32; pos++) {
1363 for (int32_t size = 1; pos + size <= 32; size++) {
1364 __ Ins(*reg1, *reg2, pos, size);
1365 std::ostringstream instr;
1366 instr << "ins $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
1367 expected += instr.str();
1368 }
1369 }
1370 }
1371 }
1372 DriverStr(expected, "Ins");
1373 }
1374
TEST_F(AssemblerMIPS64Test,DblIns)1375 TEST_F(AssemblerMIPS64Test, DblIns) {
1376 std::vector<mips64::GpuRegister*> reg1_registers = GetRegisters();
1377 std::vector<mips64::GpuRegister*> reg2_registers = GetRegisters();
1378 WarnOnCombinations(reg1_registers.size() * reg2_registers.size() * 65 * 32);
1379 std::ostringstream expected;
1380 for (mips64::GpuRegister* reg1 : reg1_registers) {
1381 for (mips64::GpuRegister* reg2 : reg2_registers) {
1382 for (int32_t pos = 0; pos < 64; pos++) {
1383 for (int32_t size = 1; pos + size <= 64; size++) {
1384 __ DblIns(*reg1, *reg2, pos, size);
1385 expected << "dins $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n";
1386 }
1387 }
1388 }
1389 }
1390
1391 DriverStr(expected.str(), "DblIns");
1392 }
1393
TEST_F(AssemblerMIPS64Test,Lsa)1394 TEST_F(AssemblerMIPS64Test, Lsa) {
1395 DriverStr(RepeatRRRIb(&mips64::Mips64Assembler::Lsa,
1396 2,
1397 "lsa ${reg1}, ${reg2}, ${reg3}, {imm}",
1398 1),
1399 "lsa");
1400 }
1401
TEST_F(AssemblerMIPS64Test,Dlsa)1402 TEST_F(AssemblerMIPS64Test, Dlsa) {
1403 DriverStr(RepeatRRRIb(&mips64::Mips64Assembler::Dlsa,
1404 2,
1405 "dlsa ${reg1}, ${reg2}, ${reg3}, {imm}",
1406 1),
1407 "dlsa");
1408 }
1409
TEST_F(AssemblerMIPS64Test,Wsbh)1410 TEST_F(AssemblerMIPS64Test, Wsbh) {
1411 DriverStr(RepeatRR(&mips64::Mips64Assembler::Wsbh, "wsbh ${reg1}, ${reg2}"), "wsbh");
1412 }
1413
TEST_F(AssemblerMIPS64Test,Sll)1414 TEST_F(AssemblerMIPS64Test, Sll) {
1415 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sll, 5, "sll ${reg1}, ${reg2}, {imm}"), "sll");
1416 }
1417
TEST_F(AssemblerMIPS64Test,Srl)1418 TEST_F(AssemblerMIPS64Test, Srl) {
1419 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Srl, 5, "srl ${reg1}, ${reg2}, {imm}"), "srl");
1420 }
1421
TEST_F(AssemblerMIPS64Test,Rotr)1422 TEST_F(AssemblerMIPS64Test, Rotr) {
1423 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Rotr, 5, "rotr ${reg1}, ${reg2}, {imm}"), "rotr");
1424 }
1425
TEST_F(AssemblerMIPS64Test,Sra)1426 TEST_F(AssemblerMIPS64Test, Sra) {
1427 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sra, 5, "sra ${reg1}, ${reg2}, {imm}"), "sra");
1428 }
1429
TEST_F(AssemblerMIPS64Test,Sllv)1430 TEST_F(AssemblerMIPS64Test, Sllv) {
1431 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Sllv, "sllv ${reg1}, ${reg2}, ${reg3}"), "sllv");
1432 }
1433
TEST_F(AssemblerMIPS64Test,Srlv)1434 TEST_F(AssemblerMIPS64Test, Srlv) {
1435 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Srlv, "srlv ${reg1}, ${reg2}, ${reg3}"), "srlv");
1436 }
1437
TEST_F(AssemblerMIPS64Test,Rotrv)1438 TEST_F(AssemblerMIPS64Test, Rotrv) {
1439 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Rotrv, "rotrv ${reg1}, ${reg2}, ${reg3}"), "rotrv");
1440 }
1441
TEST_F(AssemblerMIPS64Test,Srav)1442 TEST_F(AssemblerMIPS64Test, Srav) {
1443 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Srav, "srav ${reg1}, ${reg2}, ${reg3}"), "srav");
1444 }
1445
TEST_F(AssemblerMIPS64Test,Dsll)1446 TEST_F(AssemblerMIPS64Test, Dsll) {
1447 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsll, 5, "dsll ${reg1}, ${reg2}, {imm}"), "dsll");
1448 }
1449
TEST_F(AssemblerMIPS64Test,Dsrl)1450 TEST_F(AssemblerMIPS64Test, Dsrl) {
1451 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsrl, 5, "dsrl ${reg1}, ${reg2}, {imm}"), "dsrl");
1452 }
1453
TEST_F(AssemblerMIPS64Test,Drotr)1454 TEST_F(AssemblerMIPS64Test, Drotr) {
1455 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Drotr, 5, "drotr ${reg1}, ${reg2}, {imm}"),
1456 "drotr");
1457 }
1458
TEST_F(AssemblerMIPS64Test,Dsra)1459 TEST_F(AssemblerMIPS64Test, Dsra) {
1460 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsra, 5, "dsra ${reg1}, ${reg2}, {imm}"), "dsra");
1461 }
1462
TEST_F(AssemblerMIPS64Test,Dsll32)1463 TEST_F(AssemblerMIPS64Test, Dsll32) {
1464 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsll32, 5, "dsll32 ${reg1}, ${reg2}, {imm}"),
1465 "dsll32");
1466 }
1467
TEST_F(AssemblerMIPS64Test,Dsrl32)1468 TEST_F(AssemblerMIPS64Test, Dsrl32) {
1469 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsrl32, 5, "dsrl32 ${reg1}, ${reg2}, {imm}"),
1470 "dsrl32");
1471 }
1472
TEST_F(AssemblerMIPS64Test,Drotr32)1473 TEST_F(AssemblerMIPS64Test, Drotr32) {
1474 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Drotr32, 5, "drotr32 ${reg1}, ${reg2}, {imm}"),
1475 "drotr32");
1476 }
1477
TEST_F(AssemblerMIPS64Test,Dsra32)1478 TEST_F(AssemblerMIPS64Test, Dsra32) {
1479 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Dsra32, 5, "dsra32 ${reg1}, ${reg2}, {imm}"),
1480 "dsra32");
1481 }
1482
TEST_F(AssemblerMIPS64Test,Dsllv)1483 TEST_F(AssemblerMIPS64Test, Dsllv) {
1484 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsllv, "dsllv ${reg1}, ${reg2}, ${reg3}"), "dsllv");
1485 }
1486
TEST_F(AssemblerMIPS64Test,Dsrlv)1487 TEST_F(AssemblerMIPS64Test, Dsrlv) {
1488 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsrlv, "dsrlv ${reg1}, ${reg2}, ${reg3}"), "dsrlv");
1489 }
1490
TEST_F(AssemblerMIPS64Test,Dsrav)1491 TEST_F(AssemblerMIPS64Test, Dsrav) {
1492 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Dsrav, "dsrav ${reg1}, ${reg2}, ${reg3}"), "dsrav");
1493 }
1494
TEST_F(AssemblerMIPS64Test,Sc)1495 TEST_F(AssemblerMIPS64Test, Sc) {
1496 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Sc, -9, "sc ${reg1}, {imm}(${reg2})"), "sc");
1497 }
1498
TEST_F(AssemblerMIPS64Test,Scd)1499 TEST_F(AssemblerMIPS64Test, Scd) {
1500 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Scd, -9, "scd ${reg1}, {imm}(${reg2})"), "scd");
1501 }
1502
TEST_F(AssemblerMIPS64Test,Ll)1503 TEST_F(AssemblerMIPS64Test, Ll) {
1504 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Ll, -9, "ll ${reg1}, {imm}(${reg2})"), "ll");
1505 }
1506
TEST_F(AssemblerMIPS64Test,Lld)1507 TEST_F(AssemblerMIPS64Test, Lld) {
1508 DriverStr(RepeatRRIb(&mips64::Mips64Assembler::Lld, -9, "lld ${reg1}, {imm}(${reg2})"), "lld");
1509 }
1510
TEST_F(AssemblerMIPS64Test,Seleqz)1511 TEST_F(AssemblerMIPS64Test, Seleqz) {
1512 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Seleqz, "seleqz ${reg1}, ${reg2}, ${reg3}"),
1513 "seleqz");
1514 }
1515
TEST_F(AssemblerMIPS64Test,Selnez)1516 TEST_F(AssemblerMIPS64Test, Selnez) {
1517 DriverStr(RepeatRRR(&mips64::Mips64Assembler::Selnez, "selnez ${reg1}, ${reg2}, ${reg3}"),
1518 "selnez");
1519 }
1520
TEST_F(AssemblerMIPS64Test,Clz)1521 TEST_F(AssemblerMIPS64Test, Clz) {
1522 DriverStr(RepeatRR(&mips64::Mips64Assembler::Clz, "clz ${reg1}, ${reg2}"), "clz");
1523 }
1524
TEST_F(AssemblerMIPS64Test,Clo)1525 TEST_F(AssemblerMIPS64Test, Clo) {
1526 DriverStr(RepeatRR(&mips64::Mips64Assembler::Clo, "clo ${reg1}, ${reg2}"), "clo");
1527 }
1528
TEST_F(AssemblerMIPS64Test,Dclz)1529 TEST_F(AssemblerMIPS64Test, Dclz) {
1530 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dclz, "dclz ${reg1}, ${reg2}"), "dclz");
1531 }
1532
TEST_F(AssemblerMIPS64Test,Dclo)1533 TEST_F(AssemblerMIPS64Test, Dclo) {
1534 DriverStr(RepeatRR(&mips64::Mips64Assembler::Dclo, "dclo ${reg1}, ${reg2}"), "dclo");
1535 }
1536
TEST_F(AssemblerMIPS64Test,LoadFromOffset)1537 TEST_F(AssemblerMIPS64Test, LoadFromOffset) {
1538 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A0, 0);
1539 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0);
1540 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1);
1541 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 256);
1542 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1000);
1543 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFF);
1544 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8000);
1545 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8001);
1546 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x10000);
1547 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x12345678);
1548 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, -256);
1549 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, -32768);
1550 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0xABCDEF00);
1551 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFFFFFE);
1552 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFFFFFF);
1553 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x80000000);
1554 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x80000001);
1555
1556 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A0, 0);
1557 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0);
1558 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 1);
1559 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 256);
1560 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 1000);
1561 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x7FFF);
1562 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x8000);
1563 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x8001);
1564 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x10000);
1565 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x12345678);
1566 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, -256);
1567 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, -32768);
1568 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0xABCDEF00);
1569 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x7FFFFFFE);
1570 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x7FFFFFFF);
1571 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x80000000);
1572 __ LoadFromOffset(mips64::kLoadUnsignedByte, mips64::A0, mips64::A1, 0x80000001);
1573
1574 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A0, 0);
1575 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0);
1576 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 2);
1577 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 256);
1578 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 1000);
1579 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x7FFE);
1580 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x8000);
1581 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x8002);
1582 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x10000);
1583 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x12345678);
1584 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, -256);
1585 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, -32768);
1586 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0xABCDEF00);
1587 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFC);
1588 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFE);
1589 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x80000000);
1590 __ LoadFromOffset(mips64::kLoadSignedHalfword, mips64::A0, mips64::A1, 0x80000002);
1591
1592 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A0, 0);
1593 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0);
1594 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 2);
1595 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 256);
1596 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 1000);
1597 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x7FFE);
1598 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x8000);
1599 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x8002);
1600 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x10000);
1601 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x12345678);
1602 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, -256);
1603 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, -32768);
1604 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0xABCDEF00);
1605 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFC);
1606 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x7FFFFFFE);
1607 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x80000000);
1608 __ LoadFromOffset(mips64::kLoadUnsignedHalfword, mips64::A0, mips64::A1, 0x80000002);
1609
1610 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A0, 0);
1611 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0);
1612 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 4);
1613 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 256);
1614 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 1000);
1615 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x7FFC);
1616 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x8000);
1617 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x8004);
1618 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x10000);
1619 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x12345678);
1620 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, -256);
1621 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, -32768);
1622 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0xABCDEF00);
1623 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x7FFFFFF8);
1624 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x7FFFFFFC);
1625 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x80000000);
1626 __ LoadFromOffset(mips64::kLoadWord, mips64::A0, mips64::A1, 0x80000004);
1627
1628 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A0, 0);
1629 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0);
1630 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 4);
1631 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 256);
1632 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 1000);
1633 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x7FFC);
1634 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x8000);
1635 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x8004);
1636 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x10000);
1637 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x12345678);
1638 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, -256);
1639 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, -32768);
1640 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0xABCDEF00);
1641 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x7FFFFFF8);
1642 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x7FFFFFFC);
1643 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x80000000);
1644 __ LoadFromOffset(mips64::kLoadUnsignedWord, mips64::A0, mips64::A1, 0x80000004);
1645
1646 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A0, 0);
1647 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0);
1648 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 4);
1649 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 256);
1650 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 1000);
1651 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x7FFC);
1652 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x8000);
1653 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x8004);
1654 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x10000);
1655 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x27FFC);
1656 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x12345678);
1657 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, -256);
1658 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, -32768);
1659 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0xABCDEF00);
1660 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x7FFFFFF8);
1661 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x7FFFFFFC);
1662 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x80000000);
1663 __ LoadFromOffset(mips64::kLoadDoubleword, mips64::A0, mips64::A1, 0x80000004);
1664
1665 const char* expected =
1666 "lb $a0, 0($a0)\n"
1667 "lb $a0, 0($a1)\n"
1668 "lb $a0, 1($a1)\n"
1669 "lb $a0, 256($a1)\n"
1670 "lb $a0, 1000($a1)\n"
1671 "lb $a0, 0x7FFF($a1)\n"
1672 "daddiu $at, $a1, 0x7FF8\n"
1673 "lb $a0, 8($at)\n"
1674 "daddiu $at, $a1, 32760\n"
1675 "lb $a0, 9($at)\n"
1676 "daui $at, $a1, 1\n"
1677 "lb $a0, 0($at)\n"
1678 "daui $at, $a1, 0x1234\n"
1679 "lb $a0, 0x5678($at)\n"
1680 "lb $a0, -256($a1)\n"
1681 "lb $a0, -32768($a1)\n"
1682 "daui $at, $a1, 0xABCE\n"
1683 "lb $a0, -4352($at)\n"
1684 "daui $at, $a1, 32768\n"
1685 "dahi $at, $at, 1\n"
1686 "lb $a0, -2($at)\n"
1687 "daui $at, $a1, 32768\n"
1688 "dahi $at, $at, 1\n"
1689 "lb $a0, -1($at)\n"
1690 "daui $at, $a1, 32768\n"
1691 "lb $a0, 0($at)\n"
1692 "daui $at, $a1, 32768\n"
1693 "lb $a0, 1($at)\n"
1694
1695 "lbu $a0, 0($a0)\n"
1696 "lbu $a0, 0($a1)\n"
1697 "lbu $a0, 1($a1)\n"
1698 "lbu $a0, 256($a1)\n"
1699 "lbu $a0, 1000($a1)\n"
1700 "lbu $a0, 0x7FFF($a1)\n"
1701 "daddiu $at, $a1, 0x7FF8\n"
1702 "lbu $a0, 8($at)\n"
1703 "daddiu $at, $a1, 32760\n"
1704 "lbu $a0, 9($at)\n"
1705 "daui $at, $a1, 1\n"
1706 "lbu $a0, 0($at)\n"
1707 "daui $at, $a1, 0x1234\n"
1708 "lbu $a0, 0x5678($at)\n"
1709 "lbu $a0, -256($a1)\n"
1710 "lbu $a0, -32768($a1)\n"
1711 "daui $at, $a1, 0xABCE\n"
1712 "lbu $a0, -4352($at)\n"
1713 "daui $at, $a1, 32768\n"
1714 "dahi $at, $at, 1\n"
1715 "lbu $a0, -2($at)\n"
1716 "daui $at, $a1, 32768\n"
1717 "dahi $at, $at, 1\n"
1718 "lbu $a0, -1($at)\n"
1719 "daui $at, $a1, 32768\n"
1720 "lbu $a0, 0($at)\n"
1721 "daui $at, $a1, 32768\n"
1722 "lbu $a0, 1($at)\n"
1723
1724 "lh $a0, 0($a0)\n"
1725 "lh $a0, 0($a1)\n"
1726 "lh $a0, 2($a1)\n"
1727 "lh $a0, 256($a1)\n"
1728 "lh $a0, 1000($a1)\n"
1729 "lh $a0, 0x7FFE($a1)\n"
1730 "daddiu $at, $a1, 0x7FF8\n"
1731 "lh $a0, 8($at)\n"
1732 "daddiu $at, $a1, 32760\n"
1733 "lh $a0, 10($at)\n"
1734 "daui $at, $a1, 1\n"
1735 "lh $a0, 0($at)\n"
1736 "daui $at, $a1, 0x1234\n"
1737 "lh $a0, 0x5678($at)\n"
1738 "lh $a0, -256($a1)\n"
1739 "lh $a0, -32768($a1)\n"
1740 "daui $at, $a1, 0xABCE\n"
1741 "lh $a0, -4352($at)\n"
1742 "daui $at, $a1, 32768\n"
1743 "dahi $at, $at, 1\n"
1744 "lh $a0, -4($at)\n"
1745 "daui $at, $a1, 32768\n"
1746 "dahi $at, $at, 1\n"
1747 "lh $a0, -2($at)\n"
1748 "daui $at, $a1, 32768\n"
1749 "lh $a0, 0($at)\n"
1750 "daui $at, $a1, 32768\n"
1751 "lh $a0, 2($at)\n"
1752
1753 "lhu $a0, 0($a0)\n"
1754 "lhu $a0, 0($a1)\n"
1755 "lhu $a0, 2($a1)\n"
1756 "lhu $a0, 256($a1)\n"
1757 "lhu $a0, 1000($a1)\n"
1758 "lhu $a0, 0x7FFE($a1)\n"
1759 "daddiu $at, $a1, 0x7FF8\n"
1760 "lhu $a0, 8($at)\n"
1761 "daddiu $at, $a1, 32760\n"
1762 "lhu $a0, 10($at)\n"
1763 "daui $at, $a1, 1\n"
1764 "lhu $a0, 0($at)\n"
1765 "daui $at, $a1, 0x1234\n"
1766 "lhu $a0, 0x5678($at)\n"
1767 "lhu $a0, -256($a1)\n"
1768 "lhu $a0, -32768($a1)\n"
1769 "daui $at, $a1, 0xABCE\n"
1770 "lhu $a0, -4352($at)\n"
1771 "daui $at, $a1, 32768\n"
1772 "dahi $at, $at, 1\n"
1773 "lhu $a0, -4($at)\n"
1774 "daui $at, $a1, 32768\n"
1775 "dahi $at, $at, 1\n"
1776 "lhu $a0, -2($at)\n"
1777 "daui $at, $a1, 32768\n"
1778 "lhu $a0, 0($at)\n"
1779 "daui $at, $a1, 32768\n"
1780 "lhu $a0, 2($at)\n"
1781
1782 "lw $a0, 0($a0)\n"
1783 "lw $a0, 0($a1)\n"
1784 "lw $a0, 4($a1)\n"
1785 "lw $a0, 256($a1)\n"
1786 "lw $a0, 1000($a1)\n"
1787 "lw $a0, 0x7FFC($a1)\n"
1788 "daddiu $at, $a1, 0x7FF8\n"
1789 "lw $a0, 8($at)\n"
1790 "daddiu $at, $a1, 32760\n"
1791 "lw $a0, 12($at)\n"
1792 "daui $at, $a1, 1\n"
1793 "lw $a0, 0($at)\n"
1794 "daui $at, $a1, 0x1234\n"
1795 "lw $a0, 0x5678($at)\n"
1796 "lw $a0, -256($a1)\n"
1797 "lw $a0, -32768($a1)\n"
1798 "daui $at, $a1, 0xABCE\n"
1799 "lw $a0, -4352($at)\n"
1800 "daui $at, $a1, 32768\n"
1801 "dahi $at, $at, 1\n"
1802 "lw $a0, -8($at)\n"
1803 "daui $at, $a1, 32768\n"
1804 "dahi $at, $at, 1\n"
1805 "lw $a0, -4($at)\n"
1806 "daui $at, $a1, 32768\n"
1807 "lw $a0, 0($at)\n"
1808 "daui $at, $a1, 32768\n"
1809 "lw $a0, 4($at)\n"
1810
1811 "lwu $a0, 0($a0)\n"
1812 "lwu $a0, 0($a1)\n"
1813 "lwu $a0, 4($a1)\n"
1814 "lwu $a0, 256($a1)\n"
1815 "lwu $a0, 1000($a1)\n"
1816 "lwu $a0, 0x7FFC($a1)\n"
1817 "daddiu $at, $a1, 0x7FF8\n"
1818 "lwu $a0, 8($at)\n"
1819 "daddiu $at, $a1, 32760\n"
1820 "lwu $a0, 12($at)\n"
1821 "daui $at, $a1, 1\n"
1822 "lwu $a0, 0($at)\n"
1823 "daui $at, $a1, 0x1234\n"
1824 "lwu $a0, 0x5678($at)\n"
1825 "lwu $a0, -256($a1)\n"
1826 "lwu $a0, -32768($a1)\n"
1827 "daui $at, $a1, 0xABCE\n"
1828 "lwu $a0, -4352($at)\n"
1829 "daui $at, $a1, 32768\n"
1830 "dahi $at, $at, 1\n"
1831 "lwu $a0, -8($at)\n"
1832 "daui $at, $a1, 32768\n"
1833 "dahi $at, $at, 1\n"
1834 "lwu $a0, -4($at)\n"
1835 "daui $at, $a1, 32768\n"
1836 "lwu $a0, 0($at)\n"
1837 "daui $at, $a1, 32768\n"
1838 "lwu $a0, 4($at)\n"
1839
1840 "ld $a0, 0($a0)\n"
1841 "ld $a0, 0($a1)\n"
1842 "lwu $a0, 4($a1)\n"
1843 "lwu $t3, 8($a1)\n"
1844 "dinsu $a0, $t3, 32, 32\n"
1845 "ld $a0, 256($a1)\n"
1846 "ld $a0, 1000($a1)\n"
1847 "daddiu $at, $a1, 32760\n"
1848 "lwu $a0, 4($at)\n"
1849 "lwu $t3, 8($at)\n"
1850 "dinsu $a0, $t3, 32, 32\n"
1851 "daddiu $at, $a1, 32760\n"
1852 "ld $a0, 8($at)\n"
1853 "daddiu $at, $a1, 32760\n"
1854 "lwu $a0, 12($at)\n"
1855 "lwu $t3, 16($at)\n"
1856 "dinsu $a0, $t3, 32, 32\n"
1857 "daui $at, $a1, 1\n"
1858 "ld $a0, 0($at)\n"
1859 "daui $at, $a1, 2\n"
1860 "daddiu $at, $at, 8\n"
1861 "lwu $a0, 0x7ff4($at)\n"
1862 "lwu $t3, 0x7ff8($at)\n"
1863 "dinsu $a0, $t3, 32, 32\n"
1864 "daui $at, $a1, 0x1234\n"
1865 "ld $a0, 0x5678($at)\n"
1866 "ld $a0, -256($a1)\n"
1867 "ld $a0, -32768($a1)\n"
1868 "daui $at, $a1, 0xABCE\n"
1869 "ld $a0, -4352($at)\n"
1870 "daui $at, $a1, 32768\n"
1871 "dahi $at, $at, 1\n"
1872 "ld $a0, -8($at)\n"
1873 "daui $at, $a1, 32768\n"
1874 "dahi $at, $at, 1\n"
1875 "lwu $a0, -4($at)\n"
1876 "lwu $t3, 0($at)\n"
1877 "dinsu $a0, $t3, 32, 32\n"
1878 "daui $at, $a1, 32768\n"
1879 "ld $a0, 0($at)\n"
1880 "daui $at, $a1, 32768\n"
1881 "lwu $a0, 4($at)\n"
1882 "lwu $t3, 8($at)\n"
1883 "dinsu $a0, $t3, 32, 32\n";
1884 DriverStr(expected, "LoadFromOffset");
1885 }
1886
TEST_F(AssemblerMIPS64Test,LoadFpuFromOffset)1887 TEST_F(AssemblerMIPS64Test, LoadFpuFromOffset) {
1888 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0);
1889 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 4);
1890 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 256);
1891 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x7FFC);
1892 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x8000);
1893 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x8004);
1894 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x10000);
1895 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x12345678);
1896 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, -256);
1897 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, -32768);
1898 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0xABCDEF00);
1899
1900 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0);
1901 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 4);
1902 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 256);
1903 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x7FFC);
1904 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x8000);
1905 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x8004);
1906 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x10000);
1907 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0x12345678);
1908 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, -256);
1909 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, -32768);
1910 __ LoadFpuFromOffset(mips64::kLoadDoubleword, mips64::F0, mips64::A0, 0xABCDEF00);
1911
1912 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0);
1913 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1);
1914 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2);
1915 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4);
1916 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 8);
1917 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 511);
1918 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 512);
1919 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 513);
1920 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 514);
1921 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 516);
1922 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1022);
1923 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1024);
1924 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1025);
1925 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1026);
1926 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 1028);
1927 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2044);
1928 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2048);
1929 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2049);
1930 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2050);
1931 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 2052);
1932 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4088);
1933 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4096);
1934 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4097);
1935 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4098);
1936 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4100);
1937 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 4104);
1938 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x7FFC);
1939 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x8000);
1940 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x10000);
1941 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x12345678);
1942 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x12350078);
1943 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -256);
1944 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -511);
1945 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -513);
1946 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -1022);
1947 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -1026);
1948 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -2044);
1949 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -2052);
1950 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -4096);
1951 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -4104);
1952 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, -32768);
1953 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0xABCDEF00);
1954 __ LoadFpuFromOffset(mips64::kLoadQuadword, mips64::F0, mips64::A0, 0x7FFFABCD);
1955
1956 const char* expected =
1957 "lwc1 $f0, 0($a0)\n"
1958 "lwc1 $f0, 4($a0)\n"
1959 "lwc1 $f0, 256($a0)\n"
1960 "lwc1 $f0, 0x7FFC($a0)\n"
1961 "daddiu $at, $a0, 32760 # 0x7FF8\n"
1962 "lwc1 $f0, 8($at)\n"
1963 "daddiu $at, $a0, 32760 # 0x7FF8\n"
1964 "lwc1 $f0, 12($at)\n"
1965 "daui $at, $a0, 1\n"
1966 "lwc1 $f0, 0($at)\n"
1967 "daui $at, $a0, 4660 # 0x1234\n"
1968 "lwc1 $f0, 22136($at) # 0x5678\n"
1969 "lwc1 $f0, -256($a0)\n"
1970 "lwc1 $f0, -32768($a0)\n"
1971 "daui $at, $a0, 0xABCE\n"
1972 "lwc1 $f0, -0x1100($at) # 0xEF00\n"
1973
1974 "ldc1 $f0, 0($a0)\n"
1975 "lwc1 $f0, 4($a0)\n"
1976 "lw $t3, 8($a0)\n"
1977 "mthc1 $t3, $f0\n"
1978 "ldc1 $f0, 256($a0)\n"
1979 "daddiu $at, $a0, 32760 # 0x7FF8\n"
1980 "lwc1 $f0, 4($at)\n"
1981 "lw $t3, 8($at)\n"
1982 "mthc1 $t3, $f0\n"
1983 "daddiu $at, $a0, 32760 # 0x7FF8\n"
1984 "ldc1 $f0, 8($at)\n"
1985 "daddiu $at, $a0, 32760 # 0x7FF8\n"
1986 "lwc1 $f0, 12($at)\n"
1987 "lw $t3, 16($at)\n"
1988 "mthc1 $t3, $f0\n"
1989 "daui $at, $a0, 1\n"
1990 "ldc1 $f0, 0($at)\n"
1991 "daui $at, $a0, 4660 # 0x1234\n"
1992 "ldc1 $f0, 22136($at) # 0x5678\n"
1993 "ldc1 $f0, -256($a0)\n"
1994 "ldc1 $f0, -32768($a0)\n"
1995 "daui $at, $a0, 0xABCE\n"
1996 "ldc1 $f0, -0x1100($at) # 0xEF00\n"
1997
1998 "ld.d $w0, 0($a0)\n"
1999 "ld.b $w0, 1($a0)\n"
2000 "ld.h $w0, 2($a0)\n"
2001 "ld.w $w0, 4($a0)\n"
2002 "ld.d $w0, 8($a0)\n"
2003 "ld.b $w0, 511($a0)\n"
2004 "ld.d $w0, 512($a0)\n"
2005 "daddiu $at, $a0, 513\n"
2006 "ld.b $w0, 0($at)\n"
2007 "ld.h $w0, 514($a0)\n"
2008 "ld.w $w0, 516($a0)\n"
2009 "ld.h $w0, 1022($a0)\n"
2010 "ld.d $w0, 1024($a0)\n"
2011 "daddiu $at, $a0, 1025\n"
2012 "ld.b $w0, 0($at)\n"
2013 "daddiu $at, $a0, 1026\n"
2014 "ld.h $w0, 0($at)\n"
2015 "ld.w $w0, 1028($a0)\n"
2016 "ld.w $w0, 2044($a0)\n"
2017 "ld.d $w0, 2048($a0)\n"
2018 "daddiu $at, $a0, 2049\n"
2019 "ld.b $w0, 0($at)\n"
2020 "daddiu $at, $a0, 2050\n"
2021 "ld.h $w0, 0($at)\n"
2022 "daddiu $at, $a0, 2052\n"
2023 "ld.w $w0, 0($at)\n"
2024 "ld.d $w0, 4088($a0)\n"
2025 "daddiu $at, $a0, 4096\n"
2026 "ld.d $w0, 0($at)\n"
2027 "daddiu $at, $a0, 4097\n"
2028 "ld.b $w0, 0($at)\n"
2029 "daddiu $at, $a0, 4098\n"
2030 "ld.h $w0, 0($at)\n"
2031 "daddiu $at, $a0, 4100\n"
2032 "ld.w $w0, 0($at)\n"
2033 "daddiu $at, $a0, 4104\n"
2034 "ld.d $w0, 0($at)\n"
2035 "daddiu $at, $a0, 0x7FFC\n"
2036 "ld.w $w0, 0($at)\n"
2037 "daddiu $at, $a0, 0x7FF8\n"
2038 "ld.d $w0, 8($at)\n"
2039 "daui $at, $a0, 0x1\n"
2040 "ld.d $w0, 0($at)\n"
2041 "daui $at, $a0, 0x1234\n"
2042 "daddiu $at, $at, 0x6000\n"
2043 "ld.d $w0, -2440($at) # 0xF678\n"
2044 "daui $at, $a0, 0x1235\n"
2045 "ld.d $w0, 0x78($at)\n"
2046 "ld.d $w0, -256($a0)\n"
2047 "ld.b $w0, -511($a0)\n"
2048 "daddiu $at, $a0, -513\n"
2049 "ld.b $w0, 0($at)\n"
2050 "ld.h $w0, -1022($a0)\n"
2051 "daddiu $at, $a0, -1026\n"
2052 "ld.h $w0, 0($at)\n"
2053 "ld.w $w0, -2044($a0)\n"
2054 "daddiu $at, $a0, -2052\n"
2055 "ld.w $w0, 0($at)\n"
2056 "ld.d $w0, -4096($a0)\n"
2057 "daddiu $at, $a0, -4104\n"
2058 "ld.d $w0, 0($at)\n"
2059 "daddiu $at, $a0, -32768\n"
2060 "ld.d $w0, 0($at)\n"
2061 "daui $at, $a0, 0xABCE\n"
2062 "daddiu $at, $at, -8192 # 0xE000\n"
2063 "ld.d $w0, 0xF00($at)\n"
2064 "daui $at, $a0, 0x8000\n"
2065 "dahi $at, $at, 1\n"
2066 "daddiu $at, $at, -21504 # 0xAC00\n"
2067 "ld.b $w0, -51($at) # 0xFFCD\n";
2068 DriverStr(expected, "LoadFpuFromOffset");
2069 }
2070
TEST_F(AssemblerMIPS64Test,StoreToOffset)2071 TEST_F(AssemblerMIPS64Test, StoreToOffset) {
2072 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A0, 0);
2073 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0);
2074 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 1);
2075 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 256);
2076 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 1000);
2077 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x7FFF);
2078 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x8000);
2079 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x8001);
2080 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x10000);
2081 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0x12345678);
2082 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, -256);
2083 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, -32768);
2084 __ StoreToOffset(mips64::kStoreByte, mips64::A0, mips64::A1, 0xABCDEF00);
2085
2086 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A0, 0);
2087 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0);
2088 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 2);
2089 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 256);
2090 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 1000);
2091 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x7FFE);
2092 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x8000);
2093 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x8002);
2094 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x10000);
2095 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0x12345678);
2096 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, -256);
2097 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, -32768);
2098 __ StoreToOffset(mips64::kStoreHalfword, mips64::A0, mips64::A1, 0xABCDEF00);
2099
2100 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A0, 0);
2101 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0);
2102 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 4);
2103 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 256);
2104 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 1000);
2105 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x7FFC);
2106 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x8000);
2107 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x8004);
2108 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x10000);
2109 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0x12345678);
2110 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, -256);
2111 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, -32768);
2112 __ StoreToOffset(mips64::kStoreWord, mips64::A0, mips64::A1, 0xABCDEF00);
2113
2114 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A0, 0);
2115 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0);
2116 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 4);
2117 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 256);
2118 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 1000);
2119 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x7FFC);
2120 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x8000);
2121 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x8004);
2122 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x10000);
2123 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x12345678);
2124 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, -256);
2125 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, -32768);
2126 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0xABCDEF00);
2127 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x7FFFFFF8);
2128 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x7FFFFFFC);
2129 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x80000000);
2130 __ StoreToOffset(mips64::kStoreDoubleword, mips64::A0, mips64::A1, 0x80000004);
2131
2132 const char* expected =
2133 "sb $a0, 0($a0)\n"
2134 "sb $a0, 0($a1)\n"
2135 "sb $a0, 1($a1)\n"
2136 "sb $a0, 256($a1)\n"
2137 "sb $a0, 1000($a1)\n"
2138 "sb $a0, 0x7FFF($a1)\n"
2139 "daddiu $at, $a1, 0x7FF8\n"
2140 "sb $a0, 8($at)\n"
2141 "daddiu $at, $a1, 0x7FF8\n"
2142 "sb $a0, 9($at)\n"
2143 "daui $at, $a1, 1\n"
2144 "sb $a0, 0($at)\n"
2145 "daui $at, $a1, 4660 # 0x1234\n"
2146 "sb $a0, 22136($at) # 0x5678\n"
2147 "sb $a0, -256($a1)\n"
2148 "sb $a0, -32768($a1)\n"
2149 "daui $at, $a1, 43982 # 0xABCE\n"
2150 "sb $a0, -4352($at) # 0xEF00\n"
2151
2152 "sh $a0, 0($a0)\n"
2153 "sh $a0, 0($a1)\n"
2154 "sh $a0, 2($a1)\n"
2155 "sh $a0, 256($a1)\n"
2156 "sh $a0, 1000($a1)\n"
2157 "sh $a0, 0x7FFE($a1)\n"
2158 "daddiu $at, $a1, 0x7FF8\n"
2159 "sh $a0, 8($at)\n"
2160 "daddiu $at, $a1, 0x7FF8\n"
2161 "sh $a0, 10($at)\n"
2162 "daui $at, $a1, 1\n"
2163 "sh $a0, 0($at)\n"
2164 "daui $at, $a1, 4660 # 0x1234\n"
2165 "sh $a0, 22136($at) # 0x5678\n"
2166 "sh $a0, -256($a1)\n"
2167 "sh $a0, -32768($a1)\n"
2168 "daui $at, $a1, 43982 # 0xABCE\n"
2169 "sh $a0, -4352($at) # 0xEF00\n"
2170
2171 "sw $a0, 0($a0)\n"
2172 "sw $a0, 0($a1)\n"
2173 "sw $a0, 4($a1)\n"
2174 "sw $a0, 256($a1)\n"
2175 "sw $a0, 1000($a1)\n"
2176 "sw $a0, 0x7FFC($a1)\n"
2177 "daddiu $at, $a1, 0x7FF8\n"
2178 "sw $a0, 8($at)\n"
2179 "daddiu $at, $a1, 0x7FF8\n"
2180 "sw $a0, 12($at)\n"
2181 "daui $at, $a1, 1\n"
2182 "sw $a0, 0($at)\n"
2183 "daui $at, $a1, 4660 # 0x1234\n"
2184 "sw $a0, 22136($at) # 0x5678\n"
2185 "sw $a0, -256($a1)\n"
2186 "sw $a0, -32768($a1)\n"
2187 "daui $at, $a1, 43982 # 0xABCE\n"
2188 "sw $a0, -4352($at) # 0xEF00\n"
2189
2190 "sd $a0, 0($a0)\n"
2191 "sd $a0, 0($a1)\n"
2192 "sw $a0, 4($a1)\n"
2193 "dsrl32 $t3, $a0, 0\n"
2194 "sw $t3, 8($a1)\n"
2195 "sd $a0, 256($a1)\n"
2196 "sd $a0, 1000($a1)\n"
2197 "daddiu $at, $a1, 0x7FF8\n"
2198 "sw $a0, 4($at)\n"
2199 "dsrl32 $t3, $a0, 0\n"
2200 "sw $t3, 8($at)\n"
2201 "daddiu $at, $a1, 32760 # 0x7FF8\n"
2202 "sd $a0, 8($at)\n"
2203 "daddiu $at, $a1, 32760 # 0x7FF8\n"
2204 "sw $a0, 12($at)\n"
2205 "dsrl32 $t3, $a0, 0\n"
2206 "sw $t3, 16($at)\n"
2207 "daui $at, $a1, 1\n"
2208 "sd $a0, 0($at)\n"
2209 "daui $at, $a1, 4660 # 0x1234\n"
2210 "sd $a0, 22136($at) # 0x5678\n"
2211 "sd $a0, -256($a1)\n"
2212 "sd $a0, -32768($a1)\n"
2213 "daui $at, $a1, 0xABCE\n"
2214 "sd $a0, -0x1100($at)\n"
2215 "daui $at, $a1, 0x8000\n"
2216 "dahi $at, $at, 1\n"
2217 "sd $a0, -8($at)\n"
2218 "daui $at, $a1, 0x8000\n"
2219 "dahi $at, $at, 1\n"
2220 "sw $a0, -4($at) # 0xFFFC\n"
2221 "dsrl32 $t3, $a0, 0\n"
2222 "sw $t3, 0($at) # 0x0\n"
2223 "daui $at, $a1, 0x8000\n"
2224 "sd $a0, 0($at) # 0x0\n"
2225 "daui $at, $a1, 0x8000\n"
2226 "sw $a0, 4($at) # 0x4\n"
2227 "dsrl32 $t3, $a0, 0\n"
2228 "sw $t3, 8($at) # 0x8\n";
2229 DriverStr(expected, "StoreToOffset");
2230 }
2231
TEST_F(AssemblerMIPS64Test,StoreFpuToOffset)2232 TEST_F(AssemblerMIPS64Test, StoreFpuToOffset) {
2233 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0);
2234 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 4);
2235 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 256);
2236 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x7FFC);
2237 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x8000);
2238 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x8004);
2239 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x10000);
2240 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x12345678);
2241 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, -256);
2242 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, -32768);
2243 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0xABCDEF00);
2244
2245 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0);
2246 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 4);
2247 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 256);
2248 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x7FFC);
2249 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x8000);
2250 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x8004);
2251 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x10000);
2252 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0x12345678);
2253 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, -256);
2254 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, -32768);
2255 __ StoreFpuToOffset(mips64::kStoreDoubleword, mips64::F0, mips64::A0, 0xABCDEF00);
2256
2257 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0);
2258 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1);
2259 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2);
2260 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4);
2261 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 8);
2262 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 511);
2263 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 512);
2264 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 513);
2265 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 514);
2266 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 516);
2267 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1022);
2268 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1024);
2269 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1025);
2270 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1026);
2271 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 1028);
2272 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2044);
2273 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2048);
2274 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2049);
2275 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2050);
2276 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 2052);
2277 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4088);
2278 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4096);
2279 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4097);
2280 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4098);
2281 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4100);
2282 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 4104);
2283 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x7FFC);
2284 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x8000);
2285 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x10000);
2286 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x12345678);
2287 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x12350078);
2288 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -256);
2289 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -511);
2290 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -513);
2291 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -1022);
2292 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -1026);
2293 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -2044);
2294 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -2052);
2295 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -4096);
2296 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -4104);
2297 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, -32768);
2298 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0xABCDEF00);
2299 __ StoreFpuToOffset(mips64::kStoreQuadword, mips64::F0, mips64::A0, 0x7FFFABCD);
2300
2301 const char* expected =
2302 "swc1 $f0, 0($a0)\n"
2303 "swc1 $f0, 4($a0)\n"
2304 "swc1 $f0, 256($a0)\n"
2305 "swc1 $f0, 0x7FFC($a0)\n"
2306 "daddiu $at, $a0, 32760 # 0x7FF8\n"
2307 "swc1 $f0, 8($at)\n"
2308 "daddiu $at, $a0, 32760 # 0x7FF8\n"
2309 "swc1 $f0, 12($at)\n"
2310 "daui $at, $a0, 1\n"
2311 "swc1 $f0, 0($at)\n"
2312 "daui $at, $a0, 4660 # 0x1234\n"
2313 "swc1 $f0, 22136($at) # 0x5678\n"
2314 "swc1 $f0, -256($a0)\n"
2315 "swc1 $f0, -32768($a0)\n"
2316 "daui $at, $a0, 0xABCE\n"
2317 "swc1 $f0, -0x1100($at)\n"
2318
2319 "sdc1 $f0, 0($a0)\n"
2320 "mfhc1 $t3, $f0\n"
2321 "swc1 $f0, 4($a0)\n"
2322 "sw $t3, 8($a0)\n"
2323 "sdc1 $f0, 256($a0)\n"
2324 "daddiu $at, $a0, 32760 # 0x7FF8\n"
2325 "mfhc1 $t3, $f0\n"
2326 "swc1 $f0, 4($at)\n"
2327 "sw $t3, 8($at)\n"
2328 "daddiu $at, $a0, 32760 # 0x7FF8\n"
2329 "sdc1 $f0, 8($at)\n"
2330 "daddiu $at, $a0, 32760 # 0x7FF8\n"
2331 "mfhc1 $t3, $f0\n"
2332 "swc1 $f0, 12($at)\n"
2333 "sw $t3, 16($at)\n"
2334 "daui $at, $a0, 1\n"
2335 "sdc1 $f0, 0($at)\n"
2336 "daui $at, $a0, 4660 # 0x1234\n"
2337 "sdc1 $f0, 22136($at) # 0x5678\n"
2338 "sdc1 $f0, -256($a0)\n"
2339 "sdc1 $f0, -32768($a0)\n"
2340 "daui $at, $a0, 0xABCE\n"
2341 "sdc1 $f0, -0x1100($at)\n"
2342
2343 "st.d $w0, 0($a0)\n"
2344 "st.b $w0, 1($a0)\n"
2345 "st.h $w0, 2($a0)\n"
2346 "st.w $w0, 4($a0)\n"
2347 "st.d $w0, 8($a0)\n"
2348 "st.b $w0, 511($a0)\n"
2349 "st.d $w0, 512($a0)\n"
2350 "daddiu $at, $a0, 513\n"
2351 "st.b $w0, 0($at)\n"
2352 "st.h $w0, 514($a0)\n"
2353 "st.w $w0, 516($a0)\n"
2354 "st.h $w0, 1022($a0)\n"
2355 "st.d $w0, 1024($a0)\n"
2356 "daddiu $at, $a0, 1025\n"
2357 "st.b $w0, 0($at)\n"
2358 "daddiu $at, $a0, 1026\n"
2359 "st.h $w0, 0($at)\n"
2360 "st.w $w0, 1028($a0)\n"
2361 "st.w $w0, 2044($a0)\n"
2362 "st.d $w0, 2048($a0)\n"
2363 "daddiu $at, $a0, 2049\n"
2364 "st.b $w0, 0($at)\n"
2365 "daddiu $at, $a0, 2050\n"
2366 "st.h $w0, 0($at)\n"
2367 "daddiu $at, $a0, 2052\n"
2368 "st.w $w0, 0($at)\n"
2369 "st.d $w0, 4088($a0)\n"
2370 "daddiu $at, $a0, 4096\n"
2371 "st.d $w0, 0($at)\n"
2372 "daddiu $at, $a0, 4097\n"
2373 "st.b $w0, 0($at)\n"
2374 "daddiu $at, $a0, 4098\n"
2375 "st.h $w0, 0($at)\n"
2376 "daddiu $at, $a0, 4100\n"
2377 "st.w $w0, 0($at)\n"
2378 "daddiu $at, $a0, 4104\n"
2379 "st.d $w0, 0($at)\n"
2380 "daddiu $at, $a0, 0x7FFC\n"
2381 "st.w $w0, 0($at)\n"
2382 "daddiu $at, $a0, 0x7FF8\n"
2383 "st.d $w0, 8($at)\n"
2384 "daui $at, $a0, 0x1\n"
2385 "st.d $w0, 0($at)\n"
2386 "daui $at, $a0, 0x1234\n"
2387 "daddiu $at, $at, 0x6000\n"
2388 "st.d $w0, -2440($at) # 0xF678\n"
2389 "daui $at, $a0, 0x1235\n"
2390 "st.d $w0, 0x78($at)\n"
2391 "st.d $w0, -256($a0)\n"
2392 "st.b $w0, -511($a0)\n"
2393 "daddiu $at, $a0, -513\n"
2394 "st.b $w0, 0($at)\n"
2395 "st.h $w0, -1022($a0)\n"
2396 "daddiu $at, $a0, -1026\n"
2397 "st.h $w0, 0($at)\n"
2398 "st.w $w0, -2044($a0)\n"
2399 "daddiu $at, $a0, -2052\n"
2400 "st.w $w0, 0($at)\n"
2401 "st.d $w0, -4096($a0)\n"
2402 "daddiu $at, $a0, -4104\n"
2403 "st.d $w0, 0($at)\n"
2404 "daddiu $at, $a0, -32768\n"
2405 "st.d $w0, 0($at)\n"
2406 "daui $at, $a0, 0xABCE\n"
2407 "daddiu $at, $at, -8192 # 0xE000\n"
2408 "st.d $w0, 0xF00($at)\n"
2409 "daui $at, $a0, 0x8000\n"
2410 "dahi $at, $at, 1\n"
2411 "daddiu $at, $at, -21504 # 0xAC00\n"
2412 "st.b $w0, -51($at) # 0xFFCD\n";
2413 DriverStr(expected, "StoreFpuToOffset");
2414 }
2415
TEST_F(AssemblerMIPS64Test,StoreConstToOffset)2416 TEST_F(AssemblerMIPS64Test, StoreConstToOffset) {
2417 __ StoreConstToOffset(mips64::kStoreByte, 0xFF, mips64::A1, +0, mips64::T8);
2418 __ StoreConstToOffset(mips64::kStoreHalfword, 0xFFFF, mips64::A1, +0, mips64::T8);
2419 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::A1, +0, mips64::T8);
2420 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x123456789ABCDEF0, mips64::A1, +0, mips64::T8);
2421
2422 __ StoreConstToOffset(mips64::kStoreByte, 0, mips64::A1, +0, mips64::T8);
2423 __ StoreConstToOffset(mips64::kStoreHalfword, 0, mips64::A1, +0, mips64::T8);
2424 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::A1, +0, mips64::T8);
2425 __ StoreConstToOffset(mips64::kStoreDoubleword, 0, mips64::A1, +0, mips64::T8);
2426
2427 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x1234567812345678, mips64::A1, +0, mips64::T8);
2428 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x1234567800000000, mips64::A1, +0, mips64::T8);
2429 __ StoreConstToOffset(mips64::kStoreDoubleword, 0x0000000012345678, mips64::A1, +0, mips64::T8);
2430
2431 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::T8, +0, mips64::T8);
2432 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::T8, +0, mips64::T8);
2433
2434 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::A1, -0xFFF0, mips64::T8);
2435 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::A1, +0xFFF0, mips64::T8);
2436
2437 __ StoreConstToOffset(mips64::kStoreWord, 0, mips64::T8, -0xFFF0, mips64::T8);
2438 __ StoreConstToOffset(mips64::kStoreWord, 0x12345678, mips64::T8, +0xFFF0, mips64::T8);
2439
2440 const char* expected =
2441 "ori $t8, $zero, 0xFF\n"
2442 "sb $t8, 0($a1)\n"
2443 "ori $t8, $zero, 0xFFFF\n"
2444 "sh $t8, 0($a1)\n"
2445 "lui $t8, 0x1234\n"
2446 "ori $t8, $t8,0x5678\n"
2447 "sw $t8, 0($a1)\n"
2448 "lui $t8, 0x9abc\n"
2449 "ori $t8, $t8,0xdef0\n"
2450 "dahi $t8, $t8, 0x5679\n"
2451 "dati $t8, $t8, 0x1234\n"
2452 "sd $t8, 0($a1)\n"
2453 "sb $zero, 0($a1)\n"
2454 "sh $zero, 0($a1)\n"
2455 "sw $zero, 0($a1)\n"
2456 "sd $zero, 0($a1)\n"
2457 "lui $t8, 0x1234\n"
2458 "ori $t8, $t8,0x5678\n"
2459 "dins $t8, $t8, 0x20, 0x20\n"
2460 "sd $t8, 0($a1)\n"
2461 "lui $t8, 0x246\n"
2462 "ori $t8, $t8, 0x8acf\n"
2463 "dsll32 $t8, $t8, 0x3\n"
2464 "sd $t8, 0($a1)\n"
2465 "lui $t8, 0x1234\n"
2466 "ori $t8, $t8, 0x5678\n"
2467 "sd $t8, 0($a1)\n"
2468 "sw $zero, 0($t8)\n"
2469 "lui $at,0x1234\n"
2470 "ori $at, $at, 0x5678\n"
2471 "sw $at, 0($t8)\n"
2472 "daddiu $at, $a1, -32760 # 0x8008\n"
2473 "sw $zero, -32760($at) # 0x8008\n"
2474 "daddiu $at, $a1, 32760 # 0x7FF8\n"
2475 "lui $t8, 4660 # 0x1234\n"
2476 "ori $t8, $t8, 22136 # 0x5678\n"
2477 "sw $t8, 32760($at) # 0x7FF8\n"
2478 "daddiu $at, $t8, -32760 # 0x8008\n"
2479 "sw $zero, -32760($at) # 0x8008\n"
2480 "daddiu $at, $t8, 32760 # 0x7FF8\n"
2481 "lui $t8, 4660 # 0x1234\n"
2482 "ori $t8, $t8, 22136 # 0x5678\n"
2483 "sw $t8, 32760($at) # 0x7FF8\n";
2484 DriverStr(expected, "StoreConstToOffset");
2485 }
2486 //////////////////////////////
2487 // Loading/adding Constants //
2488 //////////////////////////////
2489
TEST_F(AssemblerMIPS64Test,LoadConst32)2490 TEST_F(AssemblerMIPS64Test, LoadConst32) {
2491 // IsUint<16>(value)
2492 __ LoadConst32(mips64::V0, 0);
2493 __ LoadConst32(mips64::V0, 65535);
2494 // IsInt<16>(value)
2495 __ LoadConst32(mips64::V0, -1);
2496 __ LoadConst32(mips64::V0, -32768);
2497 // Everything else
2498 __ LoadConst32(mips64::V0, 65536);
2499 __ LoadConst32(mips64::V0, 65537);
2500 __ LoadConst32(mips64::V0, 2147483647);
2501 __ LoadConst32(mips64::V0, -32769);
2502 __ LoadConst32(mips64::V0, -65536);
2503 __ LoadConst32(mips64::V0, -65537);
2504 __ LoadConst32(mips64::V0, -2147483647);
2505 __ LoadConst32(mips64::V0, -2147483648);
2506
2507 const char* expected =
2508 // IsUint<16>(value)
2509 "ori $v0, $zero, 0\n" // __ LoadConst32(mips64::V0, 0);
2510 "ori $v0, $zero, 65535\n" // __ LoadConst32(mips64::V0, 65535);
2511 // IsInt<16>(value)
2512 "addiu $v0, $zero, -1\n" // __ LoadConst32(mips64::V0, -1);
2513 "addiu $v0, $zero, -32768\n" // __ LoadConst32(mips64::V0, -32768);
2514 // Everything else
2515 "lui $v0, 1\n" // __ LoadConst32(mips64::V0, 65536);
2516 "lui $v0, 1\n" // __ LoadConst32(mips64::V0, 65537);
2517 "ori $v0, 1\n" // "
2518 "lui $v0, 32767\n" // __ LoadConst32(mips64::V0, 2147483647);
2519 "ori $v0, 65535\n" // "
2520 "lui $v0, 65535\n" // __ LoadConst32(mips64::V0, -32769);
2521 "ori $v0, 32767\n" // "
2522 "lui $v0, 65535\n" // __ LoadConst32(mips64::V0, -65536);
2523 "lui $v0, 65534\n" // __ LoadConst32(mips64::V0, -65537);
2524 "ori $v0, 65535\n" // "
2525 "lui $v0, 32768\n" // __ LoadConst32(mips64::V0, -2147483647);
2526 "ori $v0, 1\n" // "
2527 "lui $v0, 32768\n"; // __ LoadConst32(mips64::V0, -2147483648);
2528 DriverStr(expected, "LoadConst32");
2529 }
2530
TEST_F(AssemblerMIPS64Test,Addiu32)2531 TEST_F(AssemblerMIPS64Test, Addiu32) {
2532 __ Addiu32(mips64::A1, mips64::A2, -0x8000);
2533 __ Addiu32(mips64::A1, mips64::A2, +0);
2534 __ Addiu32(mips64::A1, mips64::A2, +0x7FFF);
2535 __ Addiu32(mips64::A1, mips64::A2, -0x8001);
2536 __ Addiu32(mips64::A1, mips64::A2, +0x8000);
2537 __ Addiu32(mips64::A1, mips64::A2, -0x10000);
2538 __ Addiu32(mips64::A1, mips64::A2, +0x10000);
2539 __ Addiu32(mips64::A1, mips64::A2, +0x12345678);
2540
2541 const char* expected =
2542 "addiu $a1, $a2, -0x8000\n"
2543 "addiu $a1, $a2, 0\n"
2544 "addiu $a1, $a2, 0x7FFF\n"
2545 "aui $a1, $a2, 0xFFFF\n"
2546 "addiu $a1, $a1, 0x7FFF\n"
2547 "aui $a1, $a2, 1\n"
2548 "addiu $a1, $a1, -0x8000\n"
2549 "aui $a1, $a2, 0xFFFF\n"
2550 "aui $a1, $a2, 1\n"
2551 "aui $a1, $a2, 0x1234\n"
2552 "addiu $a1, $a1, 0x5678\n";
2553 DriverStr(expected, "Addiu32");
2554 }
2555
SignExtend16To64(uint16_t n)2556 static uint64_t SignExtend16To64(uint16_t n) {
2557 return static_cast<int16_t>(n);
2558 }
2559
2560 // The art::mips64::Mips64Assembler::LoadConst64() method uses a template
2561 // to minimize the number of instructions needed to load a 64-bit constant
2562 // value into a register. The template calls various methods which emit
2563 // MIPS machine instructions. This struct (class) uses the same template
2564 // but overrides the definitions of the methods which emit MIPS instructions
2565 // to use methods which simulate the operation of the corresponding MIPS
2566 // instructions. After invoking LoadConst64() the target register should
2567 // contain the same 64-bit value as was input to LoadConst64(). If the
2568 // simulated register doesn't contain the correct value then there is probably
2569 // an error in the template function.
2570 struct LoadConst64Tester {
LoadConst64Testerart::LoadConst64Tester2571 LoadConst64Tester() {
2572 // Initialize all of the registers for simulation to zero.
2573 for (int r = 0; r < 32; r++) {
2574 regs_[r] = 0;
2575 }
2576 // Clear all of the path flags.
2577 loadconst64_paths_ = art::mips64::kLoadConst64PathZero;
2578 }
Addiuart::LoadConst64Tester2579 void Addiu(mips64::GpuRegister rd, mips64::GpuRegister rs, uint16_t c) {
2580 regs_[rd] = static_cast<int32_t>(regs_[rs] + SignExtend16To64(c));
2581 }
Daddiuart::LoadConst64Tester2582 void Daddiu(mips64::GpuRegister rd, mips64::GpuRegister rs, uint16_t c) {
2583 regs_[rd] = regs_[rs] + SignExtend16To64(c);
2584 }
Dahiart::LoadConst64Tester2585 void Dahi(mips64::GpuRegister rd, uint16_t c) {
2586 regs_[rd] += SignExtend16To64(c) << 32;
2587 }
Datiart::LoadConst64Tester2588 void Dati(mips64::GpuRegister rd, uint16_t c) {
2589 regs_[rd] += SignExtend16To64(c) << 48;
2590 }
Dinsuart::LoadConst64Tester2591 void Dinsu(mips64::GpuRegister rt, mips64::GpuRegister rs, int pos, int size) {
2592 CHECK(IsUint<5>(pos - 32)) << pos;
2593 CHECK(IsUint<5>(size - 1)) << size;
2594 CHECK(IsUint<5>(pos + size - 33)) << pos << " + " << size;
2595 uint64_t src_mask = (UINT64_C(1) << size) - 1;
2596 uint64_t dsk_mask = ~(src_mask << pos);
2597
2598 regs_[rt] = (regs_[rt] & dsk_mask) | ((regs_[rs] & src_mask) << pos);
2599 }
Dsllart::LoadConst64Tester2600 void Dsll(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) {
2601 regs_[rd] = regs_[rt] << (shamt & 0x1f);
2602 }
Dsll32art::LoadConst64Tester2603 void Dsll32(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) {
2604 regs_[rd] = regs_[rt] << (32 + (shamt & 0x1f));
2605 }
Dsrlart::LoadConst64Tester2606 void Dsrl(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) {
2607 regs_[rd] = regs_[rt] >> (shamt & 0x1f);
2608 }
Dsrl32art::LoadConst64Tester2609 void Dsrl32(mips64::GpuRegister rd, mips64::GpuRegister rt, int shamt) {
2610 regs_[rd] = regs_[rt] >> (32 + (shamt & 0x1f));
2611 }
Luiart::LoadConst64Tester2612 void Lui(mips64::GpuRegister rd, uint16_t c) {
2613 regs_[rd] = SignExtend16To64(c) << 16;
2614 }
Oriart::LoadConst64Tester2615 void Ori(mips64::GpuRegister rd, mips64::GpuRegister rs, uint16_t c) {
2616 regs_[rd] = regs_[rs] | c;
2617 }
LoadConst32art::LoadConst64Tester2618 void LoadConst32(mips64::GpuRegister rd, int32_t c) {
2619 CHECK_NE(rd, 0);
2620 mips64::TemplateLoadConst32<LoadConst64Tester>(this, rd, c);
2621 CHECK_EQ(regs_[rd], static_cast<uint64_t>(c));
2622 }
LoadConst64art::LoadConst64Tester2623 void LoadConst64(mips64::GpuRegister rd, int64_t c) {
2624 CHECK_NE(rd, 0);
2625 mips64::TemplateLoadConst64<LoadConst64Tester>(this, rd, c);
2626 CHECK_EQ(regs_[rd], static_cast<uint64_t>(c));
2627 }
2628 uint64_t regs_[32];
2629
2630 // Getter function for loadconst64_paths_.
GetPathsCoveredart::LoadConst64Tester2631 int GetPathsCovered() {
2632 return loadconst64_paths_;
2633 }
2634
RecordLoadConst64Pathart::LoadConst64Tester2635 void RecordLoadConst64Path(int value) {
2636 loadconst64_paths_ |= value;
2637 }
2638
2639 private:
2640 // This variable holds a bitmask to tell us which paths were taken
2641 // through the template function which loads 64-bit values.
2642 int loadconst64_paths_;
2643 };
2644
TEST_F(AssemblerMIPS64Test,LoadConst64)2645 TEST_F(AssemblerMIPS64Test, LoadConst64) {
2646 const uint16_t imms[] = {
2647 0, 1, 2, 3, 4, 0x33, 0x66, 0x55, 0x99, 0xaa, 0xcc, 0xff, 0x5500, 0x5555,
2648 0x7ffc, 0x7ffd, 0x7ffe, 0x7fff, 0x8000, 0x8001, 0x8002, 0x8003, 0x8004,
2649 0xaaaa, 0xfffc, 0xfffd, 0xfffe, 0xffff
2650 };
2651 unsigned d0, d1, d2, d3;
2652 LoadConst64Tester tester;
2653
2654 union {
2655 int64_t v64;
2656 uint16_t v16[4];
2657 } u;
2658
2659 for (d3 = 0; d3 < sizeof imms / sizeof imms[0]; d3++) {
2660 u.v16[3] = imms[d3];
2661
2662 for (d2 = 0; d2 < sizeof imms / sizeof imms[0]; d2++) {
2663 u.v16[2] = imms[d2];
2664
2665 for (d1 = 0; d1 < sizeof imms / sizeof imms[0]; d1++) {
2666 u.v16[1] = imms[d1];
2667
2668 for (d0 = 0; d0 < sizeof imms / sizeof imms[0]; d0++) {
2669 u.v16[0] = imms[d0];
2670
2671 tester.LoadConst64(mips64::V0, u.v64);
2672 }
2673 }
2674 }
2675 }
2676
2677 // Verify that we tested all paths through the "load 64-bit value"
2678 // function template.
2679 EXPECT_EQ(tester.GetPathsCovered(), art::mips64::kLoadConst64PathAllPaths);
2680 }
2681
TEST_F(AssemblerMIPS64Test,LoadFarthestNearLabelAddress)2682 TEST_F(AssemblerMIPS64Test, LoadFarthestNearLabelAddress) {
2683 mips64::Mips64Label label;
2684 __ LoadLabelAddress(mips64::V0, &label);
2685 constexpr uint32_t kAdduCount = 0x3FFDE;
2686 for (uint32_t i = 0; i != kAdduCount; ++i) {
2687 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2688 }
2689 __ Bind(&label);
2690
2691 std::string expected =
2692 "lapc $v0, 1f\n" +
2693 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2694 "1:\n";
2695 DriverStr(expected, "LoadFarthestNearLabelAddress");
2696 EXPECT_EQ(__ GetLabelLocation(&label), (1 + kAdduCount) * 4);
2697 }
2698
TEST_F(AssemblerMIPS64Test,LoadNearestFarLabelAddress)2699 TEST_F(AssemblerMIPS64Test, LoadNearestFarLabelAddress) {
2700 mips64::Mips64Label label;
2701 __ LoadLabelAddress(mips64::V0, &label);
2702 constexpr uint32_t kAdduCount = 0x3FFDF;
2703 for (uint32_t i = 0; i != kAdduCount; ++i) {
2704 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2705 }
2706 __ Bind(&label);
2707
2708 std::string expected =
2709 "1:\n"
2710 "auipc $at, %hi(2f - 1b)\n"
2711 "daddiu $v0, $at, %lo(2f - 1b)\n" +
2712 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2713 "2:\n";
2714 DriverStr(expected, "LoadNearestFarLabelAddress");
2715 EXPECT_EQ(__ GetLabelLocation(&label), (2 + kAdduCount) * 4);
2716 }
2717
TEST_F(AssemblerMIPS64Test,LoadFarthestNearLiteral)2718 TEST_F(AssemblerMIPS64Test, LoadFarthestNearLiteral) {
2719 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678);
2720 __ LoadLiteral(mips64::V0, mips64::kLoadWord, literal);
2721 constexpr uint32_t kAdduCount = 0x3FFDE;
2722 for (uint32_t i = 0; i != kAdduCount; ++i) {
2723 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2724 }
2725
2726 std::string expected =
2727 "lwpc $v0, 1f\n" +
2728 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2729 "1:\n"
2730 ".word 0x12345678\n";
2731 DriverStr(expected, "LoadFarthestNearLiteral");
2732 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (1 + kAdduCount) * 4);
2733 }
2734
TEST_F(AssemblerMIPS64Test,LoadNearestFarLiteral)2735 TEST_F(AssemblerMIPS64Test, LoadNearestFarLiteral) {
2736 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678);
2737 __ LoadLiteral(mips64::V0, mips64::kLoadWord, literal);
2738 constexpr uint32_t kAdduCount = 0x3FFDF;
2739 for (uint32_t i = 0; i != kAdduCount; ++i) {
2740 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2741 }
2742
2743 std::string expected =
2744 "1:\n"
2745 "auipc $at, %hi(2f - 1b)\n"
2746 "lw $v0, %lo(2f - 1b)($at)\n" +
2747 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2748 "2:\n"
2749 ".word 0x12345678\n";
2750 DriverStr(expected, "LoadNearestFarLiteral");
2751 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (2 + kAdduCount) * 4);
2752 }
2753
TEST_F(AssemblerMIPS64Test,LoadFarthestNearLiteralUnsigned)2754 TEST_F(AssemblerMIPS64Test, LoadFarthestNearLiteralUnsigned) {
2755 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678);
2756 __ LoadLiteral(mips64::V0, mips64::kLoadUnsignedWord, literal);
2757 constexpr uint32_t kAdduCount = 0x3FFDE;
2758 for (uint32_t i = 0; i != kAdduCount; ++i) {
2759 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2760 }
2761
2762 std::string expected =
2763 "lwupc $v0, 1f\n" +
2764 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2765 "1:\n"
2766 ".word 0x12345678\n";
2767 DriverStr(expected, "LoadFarthestNearLiteralUnsigned");
2768 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (1 + kAdduCount) * 4);
2769 }
2770
TEST_F(AssemblerMIPS64Test,LoadNearestFarLiteralUnsigned)2771 TEST_F(AssemblerMIPS64Test, LoadNearestFarLiteralUnsigned) {
2772 mips64::Literal* literal = __ NewLiteral<uint32_t>(0x12345678);
2773 __ LoadLiteral(mips64::V0, mips64::kLoadUnsignedWord, literal);
2774 constexpr uint32_t kAdduCount = 0x3FFDF;
2775 for (uint32_t i = 0; i != kAdduCount; ++i) {
2776 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2777 }
2778
2779 std::string expected =
2780 "1:\n"
2781 "auipc $at, %hi(2f - 1b)\n"
2782 "lwu $v0, %lo(2f - 1b)($at)\n" +
2783 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2784 "2:\n"
2785 ".word 0x12345678\n";
2786 DriverStr(expected, "LoadNearestFarLiteralUnsigned");
2787 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (2 + kAdduCount) * 4);
2788 }
2789
TEST_F(AssemblerMIPS64Test,LoadFarthestNearLiteralLong)2790 TEST_F(AssemblerMIPS64Test, LoadFarthestNearLiteralLong) {
2791 mips64::Literal* literal = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF));
2792 __ LoadLiteral(mips64::V0, mips64::kLoadDoubleword, literal);
2793 constexpr uint32_t kAdduCount = 0x3FFDD;
2794 for (uint32_t i = 0; i != kAdduCount; ++i) {
2795 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2796 }
2797
2798 std::string expected =
2799 "ldpc $v0, 1f\n" +
2800 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2801 "1:\n"
2802 ".dword 0x0123456789ABCDEF\n";
2803 DriverStr(expected, "LoadFarthestNearLiteralLong");
2804 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (1 + kAdduCount) * 4);
2805 }
2806
TEST_F(AssemblerMIPS64Test,LoadNearestFarLiteralLong)2807 TEST_F(AssemblerMIPS64Test, LoadNearestFarLiteralLong) {
2808 mips64::Literal* literal = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF));
2809 __ LoadLiteral(mips64::V0, mips64::kLoadDoubleword, literal);
2810 constexpr uint32_t kAdduCount = 0x3FFDE;
2811 for (uint32_t i = 0; i != kAdduCount; ++i) {
2812 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2813 }
2814
2815 std::string expected =
2816 "1:\n"
2817 "auipc $at, %hi(2f - 1b)\n"
2818 "ld $v0, %lo(2f - 1b)($at)\n" +
2819 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2820 "2:\n"
2821 ".dword 0x0123456789ABCDEF\n";
2822 DriverStr(expected, "LoadNearestFarLiteralLong");
2823 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (2 + kAdduCount) * 4);
2824 }
2825
TEST_F(AssemblerMIPS64Test,LongLiteralAlignmentNop)2826 TEST_F(AssemblerMIPS64Test, LongLiteralAlignmentNop) {
2827 mips64::Literal* literal1 = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF));
2828 mips64::Literal* literal2 = __ NewLiteral<uint64_t>(UINT64_C(0x5555555555555555));
2829 mips64::Literal* literal3 = __ NewLiteral<uint64_t>(UINT64_C(0xAAAAAAAAAAAAAAAA));
2830 __ LoadLiteral(mips64::A1, mips64::kLoadDoubleword, literal1);
2831 __ LoadLiteral(mips64::A2, mips64::kLoadDoubleword, literal2);
2832 __ LoadLiteral(mips64::A3, mips64::kLoadDoubleword, literal3);
2833 __ LoadLabelAddress(mips64::V0, literal1->GetLabel());
2834 __ LoadLabelAddress(mips64::V1, literal2->GetLabel());
2835 // A nop will be inserted here before the 64-bit literals.
2836
2837 std::string expected =
2838 "ldpc $a1, 1f\n"
2839 // The GNU assembler incorrectly requires the ldpc instruction to be located
2840 // at an address that's a multiple of 8. TODO: Remove this workaround if/when
2841 // the assembler is fixed.
2842 // "ldpc $a2, 2f\n"
2843 ".word 0xECD80004\n"
2844 "ldpc $a3, 3f\n"
2845 "lapc $v0, 1f\n"
2846 "lapc $v1, 2f\n"
2847 "nop\n"
2848 "1:\n"
2849 ".dword 0x0123456789ABCDEF\n"
2850 "2:\n"
2851 ".dword 0x5555555555555555\n"
2852 "3:\n"
2853 ".dword 0xAAAAAAAAAAAAAAAA\n";
2854 DriverStr(expected, "LongLiteralAlignmentNop");
2855 EXPECT_EQ(__ GetLabelLocation(literal1->GetLabel()), 6 * 4u);
2856 EXPECT_EQ(__ GetLabelLocation(literal2->GetLabel()), 8 * 4u);
2857 EXPECT_EQ(__ GetLabelLocation(literal3->GetLabel()), 10 * 4u);
2858 }
2859
TEST_F(AssemblerMIPS64Test,LongLiteralAlignmentNoNop)2860 TEST_F(AssemblerMIPS64Test, LongLiteralAlignmentNoNop) {
2861 mips64::Literal* literal1 = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF));
2862 mips64::Literal* literal2 = __ NewLiteral<uint64_t>(UINT64_C(0x5555555555555555));
2863 __ LoadLiteral(mips64::A1, mips64::kLoadDoubleword, literal1);
2864 __ LoadLiteral(mips64::A2, mips64::kLoadDoubleword, literal2);
2865 __ LoadLabelAddress(mips64::V0, literal1->GetLabel());
2866 __ LoadLabelAddress(mips64::V1, literal2->GetLabel());
2867
2868 std::string expected =
2869 "ldpc $a1, 1f\n"
2870 // The GNU assembler incorrectly requires the ldpc instruction to be located
2871 // at an address that's a multiple of 8. TODO: Remove this workaround if/when
2872 // the assembler is fixed.
2873 // "ldpc $a2, 2f\n"
2874 ".word 0xECD80003\n"
2875 "lapc $v0, 1f\n"
2876 "lapc $v1, 2f\n"
2877 "1:\n"
2878 ".dword 0x0123456789ABCDEF\n"
2879 "2:\n"
2880 ".dword 0x5555555555555555\n";
2881 DriverStr(expected, "LongLiteralAlignmentNoNop");
2882 EXPECT_EQ(__ GetLabelLocation(literal1->GetLabel()), 4 * 4u);
2883 EXPECT_EQ(__ GetLabelLocation(literal2->GetLabel()), 6 * 4u);
2884 }
2885
TEST_F(AssemblerMIPS64Test,FarLongLiteralAlignmentNop)2886 TEST_F(AssemblerMIPS64Test, FarLongLiteralAlignmentNop) {
2887 mips64::Literal* literal = __ NewLiteral<uint64_t>(UINT64_C(0x0123456789ABCDEF));
2888 __ LoadLiteral(mips64::V0, mips64::kLoadDoubleword, literal);
2889 __ LoadLabelAddress(mips64::V1, literal->GetLabel());
2890 constexpr uint32_t kAdduCount = 0x3FFDF;
2891 for (uint32_t i = 0; i != kAdduCount; ++i) {
2892 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO);
2893 }
2894 // A nop will be inserted here before the 64-bit literal.
2895
2896 std::string expected =
2897 "1:\n"
2898 "auipc $at, %hi(3f - 1b)\n"
2899 "ld $v0, %lo(3f - 1b)($at)\n"
2900 "2:\n"
2901 "auipc $at, %hi(3f - 2b)\n"
2902 "daddiu $v1, $at, %lo(3f - 2b)\n" +
2903 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
2904 "nop\n"
2905 "3:\n"
2906 ".dword 0x0123456789ABCDEF\n";
2907 DriverStr(expected, "FarLongLiteralAlignmentNop");
2908 EXPECT_EQ(__ GetLabelLocation(literal->GetLabel()), (5 + kAdduCount) * 4);
2909 }
2910
2911 // MSA instructions.
2912
TEST_F(AssemblerMIPS64Test,AndV)2913 TEST_F(AssemblerMIPS64Test, AndV) {
2914 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AndV, "and.v ${reg1}, ${reg2}, ${reg3}"), "and.v");
2915 }
2916
TEST_F(AssemblerMIPS64Test,OrV)2917 TEST_F(AssemblerMIPS64Test, OrV) {
2918 DriverStr(RepeatVVV(&mips64::Mips64Assembler::OrV, "or.v ${reg1}, ${reg2}, ${reg3}"), "or.v");
2919 }
2920
TEST_F(AssemblerMIPS64Test,NorV)2921 TEST_F(AssemblerMIPS64Test, NorV) {
2922 DriverStr(RepeatVVV(&mips64::Mips64Assembler::NorV, "nor.v ${reg1}, ${reg2}, ${reg3}"), "nor.v");
2923 }
2924
TEST_F(AssemblerMIPS64Test,XorV)2925 TEST_F(AssemblerMIPS64Test, XorV) {
2926 DriverStr(RepeatVVV(&mips64::Mips64Assembler::XorV, "xor.v ${reg1}, ${reg2}, ${reg3}"), "xor.v");
2927 }
2928
TEST_F(AssemblerMIPS64Test,AddvB)2929 TEST_F(AssemblerMIPS64Test, AddvB) {
2930 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvB, "addv.b ${reg1}, ${reg2}, ${reg3}"),
2931 "addv.b");
2932 }
2933
TEST_F(AssemblerMIPS64Test,AddvH)2934 TEST_F(AssemblerMIPS64Test, AddvH) {
2935 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvH, "addv.h ${reg1}, ${reg2}, ${reg3}"),
2936 "addv.h");
2937 }
2938
TEST_F(AssemblerMIPS64Test,AddvW)2939 TEST_F(AssemblerMIPS64Test, AddvW) {
2940 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvW, "addv.w ${reg1}, ${reg2}, ${reg3}"),
2941 "addv.w");
2942 }
2943
TEST_F(AssemblerMIPS64Test,AddvD)2944 TEST_F(AssemblerMIPS64Test, AddvD) {
2945 DriverStr(RepeatVVV(&mips64::Mips64Assembler::AddvD, "addv.d ${reg1}, ${reg2}, ${reg3}"),
2946 "addv.d");
2947 }
2948
TEST_F(AssemblerMIPS64Test,SubvB)2949 TEST_F(AssemblerMIPS64Test, SubvB) {
2950 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvB, "subv.b ${reg1}, ${reg2}, ${reg3}"),
2951 "subv.b");
2952 }
2953
TEST_F(AssemblerMIPS64Test,SubvH)2954 TEST_F(AssemblerMIPS64Test, SubvH) {
2955 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvH, "subv.h ${reg1}, ${reg2}, ${reg3}"),
2956 "subv.h");
2957 }
2958
TEST_F(AssemblerMIPS64Test,SubvW)2959 TEST_F(AssemblerMIPS64Test, SubvW) {
2960 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvW, "subv.w ${reg1}, ${reg2}, ${reg3}"),
2961 "subv.w");
2962 }
2963
TEST_F(AssemblerMIPS64Test,SubvD)2964 TEST_F(AssemblerMIPS64Test, SubvD) {
2965 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SubvD, "subv.d ${reg1}, ${reg2}, ${reg3}"),
2966 "subv.d");
2967 }
2968
TEST_F(AssemblerMIPS64Test,Asub_sB)2969 TEST_F(AssemblerMIPS64Test, Asub_sB) {
2970 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_sB, "asub_s.b ${reg1}, ${reg2}, ${reg3}"),
2971 "asub_s.b");
2972 }
2973
TEST_F(AssemblerMIPS64Test,Asub_sH)2974 TEST_F(AssemblerMIPS64Test, Asub_sH) {
2975 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_sH, "asub_s.h ${reg1}, ${reg2}, ${reg3}"),
2976 "asub_s.h");
2977 }
2978
TEST_F(AssemblerMIPS64Test,Asub_sW)2979 TEST_F(AssemblerMIPS64Test, Asub_sW) {
2980 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_sW, "asub_s.w ${reg1}, ${reg2}, ${reg3}"),
2981 "asub_s.w");
2982 }
2983
TEST_F(AssemblerMIPS64Test,Asub_sD)2984 TEST_F(AssemblerMIPS64Test, Asub_sD) {
2985 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_sD, "asub_s.d ${reg1}, ${reg2}, ${reg3}"),
2986 "asub_s.d");
2987 }
2988
TEST_F(AssemblerMIPS64Test,Asub_uB)2989 TEST_F(AssemblerMIPS64Test, Asub_uB) {
2990 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_uB, "asub_u.b ${reg1}, ${reg2}, ${reg3}"),
2991 "asub_u.b");
2992 }
2993
TEST_F(AssemblerMIPS64Test,Asub_uH)2994 TEST_F(AssemblerMIPS64Test, Asub_uH) {
2995 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_uH, "asub_u.h ${reg1}, ${reg2}, ${reg3}"),
2996 "asub_u.h");
2997 }
2998
TEST_F(AssemblerMIPS64Test,Asub_uW)2999 TEST_F(AssemblerMIPS64Test, Asub_uW) {
3000 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_uW, "asub_u.w ${reg1}, ${reg2}, ${reg3}"),
3001 "asub_u.w");
3002 }
3003
TEST_F(AssemblerMIPS64Test,Asub_uD)3004 TEST_F(AssemblerMIPS64Test, Asub_uD) {
3005 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Asub_uD, "asub_u.d ${reg1}, ${reg2}, ${reg3}"),
3006 "asub_u.d");
3007 }
3008
TEST_F(AssemblerMIPS64Test,MulvB)3009 TEST_F(AssemblerMIPS64Test, MulvB) {
3010 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvB, "mulv.b ${reg1}, ${reg2}, ${reg3}"),
3011 "mulv.b");
3012 }
3013
TEST_F(AssemblerMIPS64Test,MulvH)3014 TEST_F(AssemblerMIPS64Test, MulvH) {
3015 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvH, "mulv.h ${reg1}, ${reg2}, ${reg3}"),
3016 "mulv.h");
3017 }
3018
TEST_F(AssemblerMIPS64Test,MulvW)3019 TEST_F(AssemblerMIPS64Test, MulvW) {
3020 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvW, "mulv.w ${reg1}, ${reg2}, ${reg3}"),
3021 "mulv.w");
3022 }
3023
TEST_F(AssemblerMIPS64Test,MulvD)3024 TEST_F(AssemblerMIPS64Test, MulvD) {
3025 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MulvD, "mulv.d ${reg1}, ${reg2}, ${reg3}"),
3026 "mulv.d");
3027 }
3028
TEST_F(AssemblerMIPS64Test,Div_sB)3029 TEST_F(AssemblerMIPS64Test, Div_sB) {
3030 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sB, "div_s.b ${reg1}, ${reg2}, ${reg3}"),
3031 "div_s.b");
3032 }
3033
TEST_F(AssemblerMIPS64Test,Div_sH)3034 TEST_F(AssemblerMIPS64Test, Div_sH) {
3035 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sH, "div_s.h ${reg1}, ${reg2}, ${reg3}"),
3036 "div_s.h");
3037 }
3038
TEST_F(AssemblerMIPS64Test,Div_sW)3039 TEST_F(AssemblerMIPS64Test, Div_sW) {
3040 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sW, "div_s.w ${reg1}, ${reg2}, ${reg3}"),
3041 "div_s.w");
3042 }
3043
TEST_F(AssemblerMIPS64Test,Div_sD)3044 TEST_F(AssemblerMIPS64Test, Div_sD) {
3045 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_sD, "div_s.d ${reg1}, ${reg2}, ${reg3}"),
3046 "div_s.d");
3047 }
3048
TEST_F(AssemblerMIPS64Test,Div_uB)3049 TEST_F(AssemblerMIPS64Test, Div_uB) {
3050 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uB, "div_u.b ${reg1}, ${reg2}, ${reg3}"),
3051 "div_u.b");
3052 }
3053
TEST_F(AssemblerMIPS64Test,Div_uH)3054 TEST_F(AssemblerMIPS64Test, Div_uH) {
3055 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uH, "div_u.h ${reg1}, ${reg2}, ${reg3}"),
3056 "div_u.h");
3057 }
3058
TEST_F(AssemblerMIPS64Test,Div_uW)3059 TEST_F(AssemblerMIPS64Test, Div_uW) {
3060 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uW, "div_u.w ${reg1}, ${reg2}, ${reg3}"),
3061 "div_u.w");
3062 }
3063
TEST_F(AssemblerMIPS64Test,Div_uD)3064 TEST_F(AssemblerMIPS64Test, Div_uD) {
3065 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Div_uD, "div_u.d ${reg1}, ${reg2}, ${reg3}"),
3066 "div_u.d");
3067 }
3068
TEST_F(AssemblerMIPS64Test,Mod_sB)3069 TEST_F(AssemblerMIPS64Test, Mod_sB) {
3070 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sB, "mod_s.b ${reg1}, ${reg2}, ${reg3}"),
3071 "mod_s.b");
3072 }
3073
TEST_F(AssemblerMIPS64Test,Mod_sH)3074 TEST_F(AssemblerMIPS64Test, Mod_sH) {
3075 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sH, "mod_s.h ${reg1}, ${reg2}, ${reg3}"),
3076 "mod_s.h");
3077 }
3078
TEST_F(AssemblerMIPS64Test,Mod_sW)3079 TEST_F(AssemblerMIPS64Test, Mod_sW) {
3080 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sW, "mod_s.w ${reg1}, ${reg2}, ${reg3}"),
3081 "mod_s.w");
3082 }
3083
TEST_F(AssemblerMIPS64Test,Mod_sD)3084 TEST_F(AssemblerMIPS64Test, Mod_sD) {
3085 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_sD, "mod_s.d ${reg1}, ${reg2}, ${reg3}"),
3086 "mod_s.d");
3087 }
3088
TEST_F(AssemblerMIPS64Test,Mod_uB)3089 TEST_F(AssemblerMIPS64Test, Mod_uB) {
3090 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uB, "mod_u.b ${reg1}, ${reg2}, ${reg3}"),
3091 "mod_u.b");
3092 }
3093
TEST_F(AssemblerMIPS64Test,Mod_uH)3094 TEST_F(AssemblerMIPS64Test, Mod_uH) {
3095 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uH, "mod_u.h ${reg1}, ${reg2}, ${reg3}"),
3096 "mod_u.h");
3097 }
3098
TEST_F(AssemblerMIPS64Test,Mod_uW)3099 TEST_F(AssemblerMIPS64Test, Mod_uW) {
3100 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uW, "mod_u.w ${reg1}, ${reg2}, ${reg3}"),
3101 "mod_u.w");
3102 }
3103
TEST_F(AssemblerMIPS64Test,Mod_uD)3104 TEST_F(AssemblerMIPS64Test, Mod_uD) {
3105 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Mod_uD, "mod_u.d ${reg1}, ${reg2}, ${reg3}"),
3106 "mod_u.d");
3107 }
3108
TEST_F(AssemblerMIPS64Test,Add_aB)3109 TEST_F(AssemblerMIPS64Test, Add_aB) {
3110 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aB, "add_a.b ${reg1}, ${reg2}, ${reg3}"),
3111 "add_a.b");
3112 }
3113
TEST_F(AssemblerMIPS64Test,Add_aH)3114 TEST_F(AssemblerMIPS64Test, Add_aH) {
3115 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aH, "add_a.h ${reg1}, ${reg2}, ${reg3}"),
3116 "add_a.h");
3117 }
3118
TEST_F(AssemblerMIPS64Test,Add_aW)3119 TEST_F(AssemblerMIPS64Test, Add_aW) {
3120 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aW, "add_a.w ${reg1}, ${reg2}, ${reg3}"),
3121 "add_a.w");
3122 }
3123
TEST_F(AssemblerMIPS64Test,Add_aD)3124 TEST_F(AssemblerMIPS64Test, Add_aD) {
3125 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Add_aD, "add_a.d ${reg1}, ${reg2}, ${reg3}"),
3126 "add_a.d");
3127 }
3128
TEST_F(AssemblerMIPS64Test,Ave_sB)3129 TEST_F(AssemblerMIPS64Test, Ave_sB) {
3130 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sB, "ave_s.b ${reg1}, ${reg2}, ${reg3}"),
3131 "ave_s.b");
3132 }
3133
TEST_F(AssemblerMIPS64Test,Ave_sH)3134 TEST_F(AssemblerMIPS64Test, Ave_sH) {
3135 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sH, "ave_s.h ${reg1}, ${reg2}, ${reg3}"),
3136 "ave_s.h");
3137 }
3138
TEST_F(AssemblerMIPS64Test,Ave_sW)3139 TEST_F(AssemblerMIPS64Test, Ave_sW) {
3140 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sW, "ave_s.w ${reg1}, ${reg2}, ${reg3}"),
3141 "ave_s.w");
3142 }
3143
TEST_F(AssemblerMIPS64Test,Ave_sD)3144 TEST_F(AssemblerMIPS64Test, Ave_sD) {
3145 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_sD, "ave_s.d ${reg1}, ${reg2}, ${reg3}"),
3146 "ave_s.d");
3147 }
3148
TEST_F(AssemblerMIPS64Test,Ave_uB)3149 TEST_F(AssemblerMIPS64Test, Ave_uB) {
3150 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uB, "ave_u.b ${reg1}, ${reg2}, ${reg3}"),
3151 "ave_u.b");
3152 }
3153
TEST_F(AssemblerMIPS64Test,Ave_uH)3154 TEST_F(AssemblerMIPS64Test, Ave_uH) {
3155 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uH, "ave_u.h ${reg1}, ${reg2}, ${reg3}"),
3156 "ave_u.h");
3157 }
3158
TEST_F(AssemblerMIPS64Test,Ave_uW)3159 TEST_F(AssemblerMIPS64Test, Ave_uW) {
3160 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uW, "ave_u.w ${reg1}, ${reg2}, ${reg3}"),
3161 "ave_u.w");
3162 }
3163
TEST_F(AssemblerMIPS64Test,Ave_uD)3164 TEST_F(AssemblerMIPS64Test, Ave_uD) {
3165 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Ave_uD, "ave_u.d ${reg1}, ${reg2}, ${reg3}"),
3166 "ave_u.d");
3167 }
3168
TEST_F(AssemblerMIPS64Test,Aver_sB)3169 TEST_F(AssemblerMIPS64Test, Aver_sB) {
3170 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sB, "aver_s.b ${reg1}, ${reg2}, ${reg3}"),
3171 "aver_s.b");
3172 }
3173
TEST_F(AssemblerMIPS64Test,Aver_sH)3174 TEST_F(AssemblerMIPS64Test, Aver_sH) {
3175 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sH, "aver_s.h ${reg1}, ${reg2}, ${reg3}"),
3176 "aver_s.h");
3177 }
3178
TEST_F(AssemblerMIPS64Test,Aver_sW)3179 TEST_F(AssemblerMIPS64Test, Aver_sW) {
3180 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sW, "aver_s.w ${reg1}, ${reg2}, ${reg3}"),
3181 "aver_s.w");
3182 }
3183
TEST_F(AssemblerMIPS64Test,Aver_sD)3184 TEST_F(AssemblerMIPS64Test, Aver_sD) {
3185 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_sD, "aver_s.d ${reg1}, ${reg2}, ${reg3}"),
3186 "aver_s.d");
3187 }
3188
TEST_F(AssemblerMIPS64Test,Aver_uB)3189 TEST_F(AssemblerMIPS64Test, Aver_uB) {
3190 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uB, "aver_u.b ${reg1}, ${reg2}, ${reg3}"),
3191 "aver_u.b");
3192 }
3193
TEST_F(AssemblerMIPS64Test,Aver_uH)3194 TEST_F(AssemblerMIPS64Test, Aver_uH) {
3195 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uH, "aver_u.h ${reg1}, ${reg2}, ${reg3}"),
3196 "aver_u.h");
3197 }
3198
TEST_F(AssemblerMIPS64Test,Aver_uW)3199 TEST_F(AssemblerMIPS64Test, Aver_uW) {
3200 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uW, "aver_u.w ${reg1}, ${reg2}, ${reg3}"),
3201 "aver_u.w");
3202 }
3203
TEST_F(AssemblerMIPS64Test,Aver_uD)3204 TEST_F(AssemblerMIPS64Test, Aver_uD) {
3205 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Aver_uD, "aver_u.d ${reg1}, ${reg2}, ${reg3}"),
3206 "aver_u.d");
3207 }
3208
TEST_F(AssemblerMIPS64Test,Max_sB)3209 TEST_F(AssemblerMIPS64Test, Max_sB) {
3210 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sB, "max_s.b ${reg1}, ${reg2}, ${reg3}"),
3211 "max_s.b");
3212 }
3213
TEST_F(AssemblerMIPS64Test,Max_sH)3214 TEST_F(AssemblerMIPS64Test, Max_sH) {
3215 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sH, "max_s.h ${reg1}, ${reg2}, ${reg3}"),
3216 "max_s.h");
3217 }
3218
TEST_F(AssemblerMIPS64Test,Max_sW)3219 TEST_F(AssemblerMIPS64Test, Max_sW) {
3220 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sW, "max_s.w ${reg1}, ${reg2}, ${reg3}"),
3221 "max_s.w");
3222 }
3223
TEST_F(AssemblerMIPS64Test,Max_sD)3224 TEST_F(AssemblerMIPS64Test, Max_sD) {
3225 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_sD, "max_s.d ${reg1}, ${reg2}, ${reg3}"),
3226 "max_s.d");
3227 }
3228
TEST_F(AssemblerMIPS64Test,Max_uB)3229 TEST_F(AssemblerMIPS64Test, Max_uB) {
3230 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uB, "max_u.b ${reg1}, ${reg2}, ${reg3}"),
3231 "max_u.b");
3232 }
3233
TEST_F(AssemblerMIPS64Test,Max_uH)3234 TEST_F(AssemblerMIPS64Test, Max_uH) {
3235 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uH, "max_u.h ${reg1}, ${reg2}, ${reg3}"),
3236 "max_u.h");
3237 }
3238
TEST_F(AssemblerMIPS64Test,Max_uW)3239 TEST_F(AssemblerMIPS64Test, Max_uW) {
3240 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uW, "max_u.w ${reg1}, ${reg2}, ${reg3}"),
3241 "max_u.w");
3242 }
3243
TEST_F(AssemblerMIPS64Test,Max_uD)3244 TEST_F(AssemblerMIPS64Test, Max_uD) {
3245 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Max_uD, "max_u.d ${reg1}, ${reg2}, ${reg3}"),
3246 "max_u.d");
3247 }
3248
TEST_F(AssemblerMIPS64Test,Min_sB)3249 TEST_F(AssemblerMIPS64Test, Min_sB) {
3250 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sB, "min_s.b ${reg1}, ${reg2}, ${reg3}"),
3251 "min_s.b");
3252 }
3253
TEST_F(AssemblerMIPS64Test,Min_sH)3254 TEST_F(AssemblerMIPS64Test, Min_sH) {
3255 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sH, "min_s.h ${reg1}, ${reg2}, ${reg3}"),
3256 "min_s.h");
3257 }
3258
TEST_F(AssemblerMIPS64Test,Min_sW)3259 TEST_F(AssemblerMIPS64Test, Min_sW) {
3260 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sW, "min_s.w ${reg1}, ${reg2}, ${reg3}"),
3261 "min_s.w");
3262 }
3263
TEST_F(AssemblerMIPS64Test,Min_sD)3264 TEST_F(AssemblerMIPS64Test, Min_sD) {
3265 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_sD, "min_s.d ${reg1}, ${reg2}, ${reg3}"),
3266 "min_s.d");
3267 }
3268
TEST_F(AssemblerMIPS64Test,Min_uB)3269 TEST_F(AssemblerMIPS64Test, Min_uB) {
3270 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uB, "min_u.b ${reg1}, ${reg2}, ${reg3}"),
3271 "min_u.b");
3272 }
3273
TEST_F(AssemblerMIPS64Test,Min_uH)3274 TEST_F(AssemblerMIPS64Test, Min_uH) {
3275 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uH, "min_u.h ${reg1}, ${reg2}, ${reg3}"),
3276 "min_u.h");
3277 }
3278
TEST_F(AssemblerMIPS64Test,Min_uW)3279 TEST_F(AssemblerMIPS64Test, Min_uW) {
3280 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uW, "min_u.w ${reg1}, ${reg2}, ${reg3}"),
3281 "min_u.w");
3282 }
3283
TEST_F(AssemblerMIPS64Test,Min_uD)3284 TEST_F(AssemblerMIPS64Test, Min_uD) {
3285 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Min_uD, "min_u.d ${reg1}, ${reg2}, ${reg3}"),
3286 "min_u.d");
3287 }
3288
TEST_F(AssemblerMIPS64Test,FaddW)3289 TEST_F(AssemblerMIPS64Test, FaddW) {
3290 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FaddW, "fadd.w ${reg1}, ${reg2}, ${reg3}"),
3291 "fadd.w");
3292 }
3293
TEST_F(AssemblerMIPS64Test,FaddD)3294 TEST_F(AssemblerMIPS64Test, FaddD) {
3295 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FaddD, "fadd.d ${reg1}, ${reg2}, ${reg3}"),
3296 "fadd.d");
3297 }
3298
TEST_F(AssemblerMIPS64Test,FsubW)3299 TEST_F(AssemblerMIPS64Test, FsubW) {
3300 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FsubW, "fsub.w ${reg1}, ${reg2}, ${reg3}"),
3301 "fsub.w");
3302 }
3303
TEST_F(AssemblerMIPS64Test,FsubD)3304 TEST_F(AssemblerMIPS64Test, FsubD) {
3305 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FsubD, "fsub.d ${reg1}, ${reg2}, ${reg3}"),
3306 "fsub.d");
3307 }
3308
TEST_F(AssemblerMIPS64Test,FmulW)3309 TEST_F(AssemblerMIPS64Test, FmulW) {
3310 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmulW, "fmul.w ${reg1}, ${reg2}, ${reg3}"),
3311 "fmul.w");
3312 }
3313
TEST_F(AssemblerMIPS64Test,FmulD)3314 TEST_F(AssemblerMIPS64Test, FmulD) {
3315 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmulD, "fmul.d ${reg1}, ${reg2}, ${reg3}"),
3316 "fmul.d");
3317 }
3318
TEST_F(AssemblerMIPS64Test,FdivW)3319 TEST_F(AssemblerMIPS64Test, FdivW) {
3320 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FdivW, "fdiv.w ${reg1}, ${reg2}, ${reg3}"),
3321 "fdiv.w");
3322 }
3323
TEST_F(AssemblerMIPS64Test,FdivD)3324 TEST_F(AssemblerMIPS64Test, FdivD) {
3325 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FdivD, "fdiv.d ${reg1}, ${reg2}, ${reg3}"),
3326 "fdiv.d");
3327 }
3328
TEST_F(AssemblerMIPS64Test,FmaxW)3329 TEST_F(AssemblerMIPS64Test, FmaxW) {
3330 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaxW, "fmax.w ${reg1}, ${reg2}, ${reg3}"),
3331 "fmax.w");
3332 }
3333
TEST_F(AssemblerMIPS64Test,FmaxD)3334 TEST_F(AssemblerMIPS64Test, FmaxD) {
3335 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaxD, "fmax.d ${reg1}, ${reg2}, ${reg3}"),
3336 "fmax.d");
3337 }
3338
TEST_F(AssemblerMIPS64Test,FminW)3339 TEST_F(AssemblerMIPS64Test, FminW) {
3340 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FminW, "fmin.w ${reg1}, ${reg2}, ${reg3}"),
3341 "fmin.w");
3342 }
3343
TEST_F(AssemblerMIPS64Test,FminD)3344 TEST_F(AssemblerMIPS64Test, FminD) {
3345 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FminD, "fmin.d ${reg1}, ${reg2}, ${reg3}"),
3346 "fmin.d");
3347 }
3348
TEST_F(AssemblerMIPS64Test,Ffint_sW)3349 TEST_F(AssemblerMIPS64Test, Ffint_sW) {
3350 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ffint_sW, "ffint_s.w ${reg1}, ${reg2}"),
3351 "ffint_s.w");
3352 }
3353
TEST_F(AssemblerMIPS64Test,Ffint_sD)3354 TEST_F(AssemblerMIPS64Test, Ffint_sD) {
3355 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ffint_sD, "ffint_s.d ${reg1}, ${reg2}"),
3356 "ffint_s.d");
3357 }
3358
TEST_F(AssemblerMIPS64Test,Ftint_sW)3359 TEST_F(AssemblerMIPS64Test, Ftint_sW) {
3360 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ftint_sW, "ftint_s.w ${reg1}, ${reg2}"),
3361 "ftint_s.w");
3362 }
3363
TEST_F(AssemblerMIPS64Test,Ftint_sD)3364 TEST_F(AssemblerMIPS64Test, Ftint_sD) {
3365 DriverStr(RepeatVV(&mips64::Mips64Assembler::Ftint_sD, "ftint_s.d ${reg1}, ${reg2}"),
3366 "ftint_s.d");
3367 }
3368
TEST_F(AssemblerMIPS64Test,SllB)3369 TEST_F(AssemblerMIPS64Test, SllB) {
3370 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllB, "sll.b ${reg1}, ${reg2}, ${reg3}"), "sll.b");
3371 }
3372
TEST_F(AssemblerMIPS64Test,SllH)3373 TEST_F(AssemblerMIPS64Test, SllH) {
3374 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllH, "sll.h ${reg1}, ${reg2}, ${reg3}"), "sll.h");
3375 }
3376
TEST_F(AssemblerMIPS64Test,SllW)3377 TEST_F(AssemblerMIPS64Test, SllW) {
3378 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllW, "sll.w ${reg1}, ${reg2}, ${reg3}"), "sll.w");
3379 }
3380
TEST_F(AssemblerMIPS64Test,SllD)3381 TEST_F(AssemblerMIPS64Test, SllD) {
3382 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SllD, "sll.d ${reg1}, ${reg2}, ${reg3}"), "sll.d");
3383 }
3384
TEST_F(AssemblerMIPS64Test,SraB)3385 TEST_F(AssemblerMIPS64Test, SraB) {
3386 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraB, "sra.b ${reg1}, ${reg2}, ${reg3}"), "sra.b");
3387 }
3388
TEST_F(AssemblerMIPS64Test,SraH)3389 TEST_F(AssemblerMIPS64Test, SraH) {
3390 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraH, "sra.h ${reg1}, ${reg2}, ${reg3}"), "sra.h");
3391 }
3392
TEST_F(AssemblerMIPS64Test,SraW)3393 TEST_F(AssemblerMIPS64Test, SraW) {
3394 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraW, "sra.w ${reg1}, ${reg2}, ${reg3}"), "sra.w");
3395 }
3396
TEST_F(AssemblerMIPS64Test,SraD)3397 TEST_F(AssemblerMIPS64Test, SraD) {
3398 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SraD, "sra.d ${reg1}, ${reg2}, ${reg3}"), "sra.d");
3399 }
3400
TEST_F(AssemblerMIPS64Test,SrlB)3401 TEST_F(AssemblerMIPS64Test, SrlB) {
3402 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlB, "srl.b ${reg1}, ${reg2}, ${reg3}"), "srl.b");
3403 }
3404
TEST_F(AssemblerMIPS64Test,SrlH)3405 TEST_F(AssemblerMIPS64Test, SrlH) {
3406 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlH, "srl.h ${reg1}, ${reg2}, ${reg3}"), "srl.h");
3407 }
3408
TEST_F(AssemblerMIPS64Test,SrlW)3409 TEST_F(AssemblerMIPS64Test, SrlW) {
3410 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlW, "srl.w ${reg1}, ${reg2}, ${reg3}"), "srl.w");
3411 }
3412
TEST_F(AssemblerMIPS64Test,SrlD)3413 TEST_F(AssemblerMIPS64Test, SrlD) {
3414 DriverStr(RepeatVVV(&mips64::Mips64Assembler::SrlD, "srl.d ${reg1}, ${reg2}, ${reg3}"), "srl.d");
3415 }
3416
TEST_F(AssemblerMIPS64Test,SlliB)3417 TEST_F(AssemblerMIPS64Test, SlliB) {
3418 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliB, 3, "slli.b ${reg1}, ${reg2}, {imm}"),
3419 "slli.b");
3420 }
3421
TEST_F(AssemblerMIPS64Test,SlliH)3422 TEST_F(AssemblerMIPS64Test, SlliH) {
3423 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliH, 4, "slli.h ${reg1}, ${reg2}, {imm}"),
3424 "slli.h");
3425 }
3426
TEST_F(AssemblerMIPS64Test,SlliW)3427 TEST_F(AssemblerMIPS64Test, SlliW) {
3428 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliW, 5, "slli.w ${reg1}, ${reg2}, {imm}"),
3429 "slli.w");
3430 }
3431
TEST_F(AssemblerMIPS64Test,SlliD)3432 TEST_F(AssemblerMIPS64Test, SlliD) {
3433 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SlliD, 6, "slli.d ${reg1}, ${reg2}, {imm}"),
3434 "slli.d");
3435 }
3436
TEST_F(AssemblerMIPS64Test,MoveV)3437 TEST_F(AssemblerMIPS64Test, MoveV) {
3438 DriverStr(RepeatVV(&mips64::Mips64Assembler::MoveV, "move.v ${reg1}, ${reg2}"), "move.v");
3439 }
3440
TEST_F(AssemblerMIPS64Test,SplatiB)3441 TEST_F(AssemblerMIPS64Test, SplatiB) {
3442 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiB, 4, "splati.b ${reg1}, ${reg2}[{imm}]"),
3443 "splati.b");
3444 }
3445
TEST_F(AssemblerMIPS64Test,SplatiH)3446 TEST_F(AssemblerMIPS64Test, SplatiH) {
3447 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiH, 3, "splati.h ${reg1}, ${reg2}[{imm}]"),
3448 "splati.h");
3449 }
3450
TEST_F(AssemblerMIPS64Test,SplatiW)3451 TEST_F(AssemblerMIPS64Test, SplatiW) {
3452 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiW, 2, "splati.w ${reg1}, ${reg2}[{imm}]"),
3453 "splati.w");
3454 }
3455
TEST_F(AssemblerMIPS64Test,SplatiD)3456 TEST_F(AssemblerMIPS64Test, SplatiD) {
3457 DriverStr(RepeatVVIb(&mips64::Mips64Assembler::SplatiD, 1, "splati.d ${reg1}, ${reg2}[{imm}]"),
3458 "splati.d");
3459 }
3460
TEST_F(AssemblerMIPS64Test,Copy_sB)3461 TEST_F(AssemblerMIPS64Test, Copy_sB) {
3462 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_sB, 4, "copy_s.b ${reg1}, ${reg2}[{imm}]"),
3463 "copy_s.b");
3464 }
3465
TEST_F(AssemblerMIPS64Test,Copy_sH)3466 TEST_F(AssemblerMIPS64Test, Copy_sH) {
3467 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_sH, 3, "copy_s.h ${reg1}, ${reg2}[{imm}]"),
3468 "copy_s.h");
3469 }
3470
TEST_F(AssemblerMIPS64Test,Copy_sW)3471 TEST_F(AssemblerMIPS64Test, Copy_sW) {
3472 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_sW, 2, "copy_s.w ${reg1}, ${reg2}[{imm}]"),
3473 "copy_s.w");
3474 }
3475
TEST_F(AssemblerMIPS64Test,Copy_sD)3476 TEST_F(AssemblerMIPS64Test, Copy_sD) {
3477 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_sD, 1, "copy_s.d ${reg1}, ${reg2}[{imm}]"),
3478 "copy_s.d");
3479 }
3480
TEST_F(AssemblerMIPS64Test,Copy_uB)3481 TEST_F(AssemblerMIPS64Test, Copy_uB) {
3482 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_uB, 4, "copy_u.b ${reg1}, ${reg2}[{imm}]"),
3483 "copy_u.b");
3484 }
3485
TEST_F(AssemblerMIPS64Test,Copy_uH)3486 TEST_F(AssemblerMIPS64Test, Copy_uH) {
3487 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_uH, 3, "copy_u.h ${reg1}, ${reg2}[{imm}]"),
3488 "copy_u.h");
3489 }
3490
TEST_F(AssemblerMIPS64Test,Copy_uW)3491 TEST_F(AssemblerMIPS64Test, Copy_uW) {
3492 DriverStr(RepeatRVIb(&mips64::Mips64Assembler::Copy_uW, 2, "copy_u.w ${reg1}, ${reg2}[{imm}]"),
3493 "copy_u.w");
3494 }
3495
TEST_F(AssemblerMIPS64Test,InsertB)3496 TEST_F(AssemblerMIPS64Test, InsertB) {
3497 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::InsertB, 4, "insert.b ${reg1}[{imm}], ${reg2}"),
3498 "insert.b");
3499 }
3500
TEST_F(AssemblerMIPS64Test,InsertH)3501 TEST_F(AssemblerMIPS64Test, InsertH) {
3502 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::InsertH, 3, "insert.h ${reg1}[{imm}], ${reg2}"),
3503 "insert.h");
3504 }
3505
TEST_F(AssemblerMIPS64Test,InsertW)3506 TEST_F(AssemblerMIPS64Test, InsertW) {
3507 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::InsertW, 2, "insert.w ${reg1}[{imm}], ${reg2}"),
3508 "insert.w");
3509 }
3510
TEST_F(AssemblerMIPS64Test,InsertD)3511 TEST_F(AssemblerMIPS64Test, InsertD) {
3512 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::InsertD, 1, "insert.d ${reg1}[{imm}], ${reg2}"),
3513 "insert.d");
3514 }
3515
TEST_F(AssemblerMIPS64Test,FillB)3516 TEST_F(AssemblerMIPS64Test, FillB) {
3517 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillB, "fill.b ${reg1}, ${reg2}"), "fill.b");
3518 }
3519
TEST_F(AssemblerMIPS64Test,FillH)3520 TEST_F(AssemblerMIPS64Test, FillH) {
3521 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillH, "fill.h ${reg1}, ${reg2}"), "fill.h");
3522 }
3523
TEST_F(AssemblerMIPS64Test,FillW)3524 TEST_F(AssemblerMIPS64Test, FillW) {
3525 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillW, "fill.w ${reg1}, ${reg2}"), "fill.w");
3526 }
3527
TEST_F(AssemblerMIPS64Test,FillD)3528 TEST_F(AssemblerMIPS64Test, FillD) {
3529 DriverStr(RepeatVR(&mips64::Mips64Assembler::FillD, "fill.d ${reg1}, ${reg2}"), "fill.d");
3530 }
3531
TEST_F(AssemblerMIPS64Test,LdiB)3532 TEST_F(AssemblerMIPS64Test, LdiB) {
3533 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiB, -8, "ldi.b ${reg}, {imm}"), "ldi.b");
3534 }
3535
TEST_F(AssemblerMIPS64Test,LdiH)3536 TEST_F(AssemblerMIPS64Test, LdiH) {
3537 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiH, -10, "ldi.h ${reg}, {imm}"), "ldi.h");
3538 }
3539
TEST_F(AssemblerMIPS64Test,LdiW)3540 TEST_F(AssemblerMIPS64Test, LdiW) {
3541 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiW, -10, "ldi.w ${reg}, {imm}"), "ldi.w");
3542 }
3543
TEST_F(AssemblerMIPS64Test,LdiD)3544 TEST_F(AssemblerMIPS64Test, LdiD) {
3545 DriverStr(RepeatVIb(&mips64::Mips64Assembler::LdiD, -10, "ldi.d ${reg}, {imm}"), "ldi.d");
3546 }
3547
TEST_F(AssemblerMIPS64Test,LdB)3548 TEST_F(AssemblerMIPS64Test, LdB) {
3549 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdB, -10, "ld.b ${reg1}, {imm}(${reg2})"), "ld.b");
3550 }
3551
TEST_F(AssemblerMIPS64Test,LdH)3552 TEST_F(AssemblerMIPS64Test, LdH) {
3553 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdH, -10, "ld.h ${reg1}, {imm}(${reg2})", 0, 2),
3554 "ld.h");
3555 }
3556
TEST_F(AssemblerMIPS64Test,LdW)3557 TEST_F(AssemblerMIPS64Test, LdW) {
3558 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdW, -10, "ld.w ${reg1}, {imm}(${reg2})", 0, 4),
3559 "ld.w");
3560 }
3561
TEST_F(AssemblerMIPS64Test,LdD)3562 TEST_F(AssemblerMIPS64Test, LdD) {
3563 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::LdD, -10, "ld.d ${reg1}, {imm}(${reg2})", 0, 8),
3564 "ld.d");
3565 }
3566
TEST_F(AssemblerMIPS64Test,StB)3567 TEST_F(AssemblerMIPS64Test, StB) {
3568 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StB, -10, "st.b ${reg1}, {imm}(${reg2})"), "st.b");
3569 }
3570
TEST_F(AssemblerMIPS64Test,StH)3571 TEST_F(AssemblerMIPS64Test, StH) {
3572 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StH, -10, "st.h ${reg1}, {imm}(${reg2})", 0, 2),
3573 "st.h");
3574 }
3575
TEST_F(AssemblerMIPS64Test,StW)3576 TEST_F(AssemblerMIPS64Test, StW) {
3577 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StW, -10, "st.w ${reg1}, {imm}(${reg2})", 0, 4),
3578 "st.w");
3579 }
3580
TEST_F(AssemblerMIPS64Test,StD)3581 TEST_F(AssemblerMIPS64Test, StD) {
3582 DriverStr(RepeatVRIb(&mips64::Mips64Assembler::StD, -10, "st.d ${reg1}, {imm}(${reg2})", 0, 8),
3583 "st.d");
3584 }
3585
TEST_F(AssemblerMIPS64Test,IlvlB)3586 TEST_F(AssemblerMIPS64Test, IlvlB) {
3587 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvlB, "ilvl.b ${reg1}, ${reg2}, ${reg3}"),
3588 "ilvl.b");
3589 }
3590
TEST_F(AssemblerMIPS64Test,IlvlH)3591 TEST_F(AssemblerMIPS64Test, IlvlH) {
3592 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvlH, "ilvl.h ${reg1}, ${reg2}, ${reg3}"),
3593 "ilvl.h");
3594 }
3595
TEST_F(AssemblerMIPS64Test,IlvlW)3596 TEST_F(AssemblerMIPS64Test, IlvlW) {
3597 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvlW, "ilvl.w ${reg1}, ${reg2}, ${reg3}"),
3598 "ilvl.w");
3599 }
3600
TEST_F(AssemblerMIPS64Test,IlvlD)3601 TEST_F(AssemblerMIPS64Test, IlvlD) {
3602 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvlD, "ilvl.d ${reg1}, ${reg2}, ${reg3}"),
3603 "ilvl.d");
3604 }
3605
TEST_F(AssemblerMIPS64Test,IlvrB)3606 TEST_F(AssemblerMIPS64Test, IlvrB) {
3607 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrB, "ilvr.b ${reg1}, ${reg2}, ${reg3}"),
3608 "ilvr.b");
3609 }
3610
TEST_F(AssemblerMIPS64Test,IlvrH)3611 TEST_F(AssemblerMIPS64Test, IlvrH) {
3612 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrH, "ilvr.h ${reg1}, ${reg2}, ${reg3}"),
3613 "ilvr.h");
3614 }
3615
TEST_F(AssemblerMIPS64Test,IlvrW)3616 TEST_F(AssemblerMIPS64Test, IlvrW) {
3617 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrW, "ilvr.w ${reg1}, ${reg2}, ${reg3}"),
3618 "ilvr.w");
3619 }
3620
TEST_F(AssemblerMIPS64Test,IlvrD)3621 TEST_F(AssemblerMIPS64Test, IlvrD) {
3622 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvrD, "ilvr.d ${reg1}, ${reg2}, ${reg3}"),
3623 "ilvr.d");
3624 }
3625
TEST_F(AssemblerMIPS64Test,IlvevB)3626 TEST_F(AssemblerMIPS64Test, IlvevB) {
3627 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvevB, "ilvev.b ${reg1}, ${reg2}, ${reg3}"),
3628 "ilvev.b");
3629 }
3630
TEST_F(AssemblerMIPS64Test,IlvevH)3631 TEST_F(AssemblerMIPS64Test, IlvevH) {
3632 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvevH, "ilvev.h ${reg1}, ${reg2}, ${reg3}"),
3633 "ilvev.h");
3634 }
3635
TEST_F(AssemblerMIPS64Test,IlvevW)3636 TEST_F(AssemblerMIPS64Test, IlvevW) {
3637 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvevW, "ilvev.w ${reg1}, ${reg2}, ${reg3}"),
3638 "ilvev.w");
3639 }
3640
TEST_F(AssemblerMIPS64Test,IlvevD)3641 TEST_F(AssemblerMIPS64Test, IlvevD) {
3642 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvevD, "ilvev.d ${reg1}, ${reg2}, ${reg3}"),
3643 "ilvev.d");
3644 }
3645
TEST_F(AssemblerMIPS64Test,IlvodB)3646 TEST_F(AssemblerMIPS64Test, IlvodB) {
3647 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvodB, "ilvod.b ${reg1}, ${reg2}, ${reg3}"),
3648 "ilvod.b");
3649 }
3650
TEST_F(AssemblerMIPS64Test,IlvodH)3651 TEST_F(AssemblerMIPS64Test, IlvodH) {
3652 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvodH, "ilvod.h ${reg1}, ${reg2}, ${reg3}"),
3653 "ilvod.h");
3654 }
3655
TEST_F(AssemblerMIPS64Test,IlvodW)3656 TEST_F(AssemblerMIPS64Test, IlvodW) {
3657 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvodW, "ilvod.w ${reg1}, ${reg2}, ${reg3}"),
3658 "ilvod.w");
3659 }
3660
TEST_F(AssemblerMIPS64Test,IlvodD)3661 TEST_F(AssemblerMIPS64Test, IlvodD) {
3662 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvodD, "ilvod.d ${reg1}, ${reg2}, ${reg3}"),
3663 "ilvod.d");
3664 }
3665
TEST_F(AssemblerMIPS64Test,MaddvB)3666 TEST_F(AssemblerMIPS64Test, MaddvB) {
3667 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvB, "maddv.b ${reg1}, ${reg2}, ${reg3}"),
3668 "maddv.b");
3669 }
3670
TEST_F(AssemblerMIPS64Test,MaddvH)3671 TEST_F(AssemblerMIPS64Test, MaddvH) {
3672 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvH, "maddv.h ${reg1}, ${reg2}, ${reg3}"),
3673 "maddv.h");
3674 }
3675
TEST_F(AssemblerMIPS64Test,MaddvW)3676 TEST_F(AssemblerMIPS64Test, MaddvW) {
3677 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvW, "maddv.w ${reg1}, ${reg2}, ${reg3}"),
3678 "maddv.w");
3679 }
3680
TEST_F(AssemblerMIPS64Test,MaddvD)3681 TEST_F(AssemblerMIPS64Test, MaddvD) {
3682 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MaddvD, "maddv.d ${reg1}, ${reg2}, ${reg3}"),
3683 "maddv.d");
3684 }
3685
TEST_F(AssemblerMIPS64Test,Hadd_sH)3686 TEST_F(AssemblerMIPS64Test, Hadd_sH) {
3687 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Hadd_sH, "hadd_s.h ${reg1}, ${reg2}, ${reg3}"),
3688 "hadd_s.h");
3689 }
3690
TEST_F(AssemblerMIPS64Test,Hadd_sW)3691 TEST_F(AssemblerMIPS64Test, Hadd_sW) {
3692 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Hadd_sW, "hadd_s.w ${reg1}, ${reg2}, ${reg3}"),
3693 "hadd_s.w");
3694 }
3695
TEST_F(AssemblerMIPS64Test,Hadd_sD)3696 TEST_F(AssemblerMIPS64Test, Hadd_sD) {
3697 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Hadd_sD, "hadd_s.d ${reg1}, ${reg2}, ${reg3}"),
3698 "hadd_s.d");
3699 }
3700
TEST_F(AssemblerMIPS64Test,Hadd_uH)3701 TEST_F(AssemblerMIPS64Test, Hadd_uH) {
3702 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Hadd_uH, "hadd_u.h ${reg1}, ${reg2}, ${reg3}"),
3703 "hadd_u.h");
3704 }
3705
TEST_F(AssemblerMIPS64Test,Hadd_uW)3706 TEST_F(AssemblerMIPS64Test, Hadd_uW) {
3707 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Hadd_uW, "hadd_u.w ${reg1}, ${reg2}, ${reg3}"),
3708 "hadd_u.w");
3709 }
3710
TEST_F(AssemblerMIPS64Test,Hadd_uD)3711 TEST_F(AssemblerMIPS64Test, Hadd_uD) {
3712 DriverStr(RepeatVVV(&mips64::Mips64Assembler::Hadd_uD, "hadd_u.d ${reg1}, ${reg2}, ${reg3}"),
3713 "hadd_u.d");
3714 }
3715
TEST_F(AssemblerMIPS64Test,MsubvB)3716 TEST_F(AssemblerMIPS64Test, MsubvB) {
3717 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvB, "msubv.b ${reg1}, ${reg2}, ${reg3}"),
3718 "msubv.b");
3719 }
3720
TEST_F(AssemblerMIPS64Test,MsubvH)3721 TEST_F(AssemblerMIPS64Test, MsubvH) {
3722 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvH, "msubv.h ${reg1}, ${reg2}, ${reg3}"),
3723 "msubv.h");
3724 }
3725
TEST_F(AssemblerMIPS64Test,MsubvW)3726 TEST_F(AssemblerMIPS64Test, MsubvW) {
3727 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvW, "msubv.w ${reg1}, ${reg2}, ${reg3}"),
3728 "msubv.w");
3729 }
3730
TEST_F(AssemblerMIPS64Test,MsubvD)3731 TEST_F(AssemblerMIPS64Test, MsubvD) {
3732 DriverStr(RepeatVVV(&mips64::Mips64Assembler::MsubvD, "msubv.d ${reg1}, ${reg2}, ${reg3}"),
3733 "msubv.d");
3734 }
3735
TEST_F(AssemblerMIPS64Test,FmaddW)3736 TEST_F(AssemblerMIPS64Test, FmaddW) {
3737 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaddW, "fmadd.w ${reg1}, ${reg2}, ${reg3}"),
3738 "fmadd.w");
3739 }
3740
TEST_F(AssemblerMIPS64Test,FmaddD)3741 TEST_F(AssemblerMIPS64Test, FmaddD) {
3742 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmaddD, "fmadd.d ${reg1}, ${reg2}, ${reg3}"),
3743 "fmadd.d");
3744 }
3745
TEST_F(AssemblerMIPS64Test,FmsubW)3746 TEST_F(AssemblerMIPS64Test, FmsubW) {
3747 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmsubW, "fmsub.w ${reg1}, ${reg2}, ${reg3}"),
3748 "fmsub.w");
3749 }
3750
TEST_F(AssemblerMIPS64Test,FmsubD)3751 TEST_F(AssemblerMIPS64Test, FmsubD) {
3752 DriverStr(RepeatVVV(&mips64::Mips64Assembler::FmsubD, "fmsub.d ${reg1}, ${reg2}, ${reg3}"),
3753 "fmsub.d");
3754 }
3755
3756 #undef __
3757
3758 } // namespace art
3759