1 // Copyright (c) 2012 The Chromium Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "base/cpu.h"
6
7 #include <limits.h>
8 #include <stddef.h>
9 #include <stdint.h>
10 #include <string.h>
11
12 #include <algorithm>
13
14 #include "base/macros.h"
15 #include "build/build_config.h"
16
17 #if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
18 #include "base/files/file_util.h"
19 #endif
20
21 #if defined(ARCH_CPU_X86_FAMILY)
22 #if defined(_MSC_VER)
23 #include <intrin.h>
24 #include <immintrin.h> // For _xgetbv()
25 #endif
26 #endif
27
28 namespace base {
29
CPU()30 CPU::CPU()
31 : signature_(0),
32 type_(0),
33 family_(0),
34 model_(0),
35 stepping_(0),
36 ext_model_(0),
37 ext_family_(0),
38 has_mmx_(false),
39 has_sse_(false),
40 has_sse2_(false),
41 has_sse3_(false),
42 has_ssse3_(false),
43 has_sse41_(false),
44 has_sse42_(false),
45 has_popcnt_(false),
46 has_avx_(false),
47 has_avx2_(false),
48 has_aesni_(false),
49 has_non_stop_time_stamp_counter_(false),
50 cpu_vendor_("unknown") {
51 Initialize();
52 }
53
54 namespace {
55
56 #if defined(ARCH_CPU_X86_FAMILY)
57 #ifndef _MSC_VER
58
59 #if defined(__pic__) && defined(__i386__)
60
__cpuid(int cpu_info[4],int info_type)61 void __cpuid(int cpu_info[4], int info_type) {
62 __asm__ volatile(
63 "mov %%ebx, %%edi\n"
64 "cpuid\n"
65 "xchg %%edi, %%ebx\n"
66 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]),
67 "=d"(cpu_info[3])
68 : "a"(info_type), "c"(0));
69 }
70
71 #else
72
73 void __cpuid(int cpu_info[4], int info_type) {
74 __asm__ volatile("cpuid\n"
75 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
76 "=d"(cpu_info[3])
77 : "a"(info_type), "c"(0));
78 }
79
80 #endif
81
82 // _xgetbv returns the value of an Intel Extended Control Register (XCR).
83 // Currently only XCR0 is defined by Intel so |xcr| should always be zero.
_xgetbv(uint32_t xcr)84 uint64_t _xgetbv(uint32_t xcr) {
85 uint32_t eax, edx;
86
87 __asm__ volatile (
88 "xgetbv" : "=a"(eax), "=d"(edx) : "c"(xcr));
89 return (static_cast<uint64_t>(edx) << 32) | eax;
90 }
91
92 #endif // !_MSC_VER
93 #endif // ARCH_CPU_X86_FAMILY
94
95 #if defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
CpuInfoBrand()96 std::string* CpuInfoBrand() {
97 static std::string* brand = []() {
98 // This function finds the value from /proc/cpuinfo under the key "model
99 // name" or "Processor". "model name" is used in Linux 3.8 and later (3.7
100 // and later for arm64) and is shown once per CPU. "Processor" is used in
101 // earler versions and is shown only once at the top of /proc/cpuinfo
102 // regardless of the number CPUs.
103 const char kModelNamePrefix[] = "model name\t: ";
104 const char kProcessorPrefix[] = "Processor\t: ";
105
106 std::string contents;
107 ReadFileToString(FilePath("/proc/cpuinfo"), &contents);
108 DCHECK(!contents.empty());
109 if (contents.empty()) {
110 return new std::string();
111 }
112
113 std::istringstream iss(contents);
114 std::string line;
115 while (std::getline(iss, line)) {
116 if ((line.compare(0, strlen(kModelNamePrefix), kModelNamePrefix) == 0 ||
117 line.compare(0, strlen(kProcessorPrefix), kProcessorPrefix) == 0)) {
118 return new std::string(line.substr(strlen(kModelNamePrefix)));
119 }
120 }
121
122 return new std::string();
123 }();
124
125 return brand;
126 }
127 #endif // defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) ||
128 // defined(OS_LINUX))
129
130 } // anonymous namespace
131
Initialize()132 void CPU::Initialize() {
133 #if defined(ARCH_CPU_X86_FAMILY)
134 int cpu_info[4] = {-1};
135 char cpu_string[48];
136
137 // __cpuid with an InfoType argument of 0 returns the number of
138 // valid Ids in CPUInfo[0] and the CPU identification string in
139 // the other three array elements. The CPU identification string is
140 // not in linear order. The code below arranges the information
141 // in a human readable form. The human readable order is CPUInfo[1] |
142 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
143 // before using memcpy to copy these three array elements to cpu_string.
144 __cpuid(cpu_info, 0);
145 int num_ids = cpu_info[0];
146 std::swap(cpu_info[2], cpu_info[3]);
147 memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1]));
148 cpu_vendor_.assign(cpu_string, 3 * sizeof(cpu_info[1]));
149
150 // Interpret CPU feature information.
151 if (num_ids > 0) {
152 int cpu_info7[4] = {0};
153 __cpuid(cpu_info, 1);
154 if (num_ids >= 7) {
155 __cpuid(cpu_info7, 7);
156 }
157 signature_ = cpu_info[0];
158 stepping_ = cpu_info[0] & 0xf;
159 model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
160 family_ = (cpu_info[0] >> 8) & 0xf;
161 type_ = (cpu_info[0] >> 12) & 0x3;
162 ext_model_ = (cpu_info[0] >> 16) & 0xf;
163 ext_family_ = (cpu_info[0] >> 20) & 0xff;
164 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
165 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
166 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
167 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
168 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
169 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
170 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
171 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0;
172
173 // AVX instructions will generate an illegal instruction exception unless
174 // a) they are supported by the CPU,
175 // b) XSAVE is supported by the CPU and
176 // c) XSAVE is enabled by the kernel.
177 // See http://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled
178 //
179 // In addition, we have observed some crashes with the xgetbv instruction
180 // even after following Intel's example code. (See crbug.com/375968.)
181 // Because of that, we also test the XSAVE bit because its description in
182 // the CPUID documentation suggests that it signals xgetbv support.
183 has_avx_ =
184 (cpu_info[2] & 0x10000000) != 0 &&
185 (cpu_info[2] & 0x04000000) != 0 /* XSAVE */ &&
186 (cpu_info[2] & 0x08000000) != 0 /* OSXSAVE */ &&
187 (_xgetbv(0) & 6) == 6 /* XSAVE enabled by kernel */;
188 has_aesni_ = (cpu_info[2] & 0x02000000) != 0;
189 has_avx2_ = has_avx_ && (cpu_info7[1] & 0x00000020) != 0;
190 }
191
192 // Get the brand string of the cpu.
193 __cpuid(cpu_info, 0x80000000);
194 const int parameter_end = 0x80000004;
195 int max_parameter = cpu_info[0];
196
197 if (cpu_info[0] >= parameter_end) {
198 char* cpu_string_ptr = cpu_string;
199
200 for (int parameter = 0x80000002; parameter <= parameter_end &&
201 cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) {
202 __cpuid(cpu_info, parameter);
203 memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info));
204 cpu_string_ptr += sizeof(cpu_info);
205 }
206 cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string);
207 }
208
209 const int parameter_containing_non_stop_time_stamp_counter = 0x80000007;
210 if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) {
211 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter);
212 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0;
213 }
214 #elif defined(ARCH_CPU_ARM_FAMILY) && (defined(OS_ANDROID) || defined(OS_LINUX))
215 cpu_brand_.assign(*CpuInfoBrand());
216 #endif
217 }
218
GetIntelMicroArchitecture() const219 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const {
220 if (has_avx2()) return AVX2;
221 if (has_avx()) return AVX;
222 if (has_sse42()) return SSE42;
223 if (has_sse41()) return SSE41;
224 if (has_ssse3()) return SSSE3;
225 if (has_sse3()) return SSE3;
226 if (has_sse2()) return SSE2;
227 if (has_sse()) return SSE;
228 return PENTIUM;
229 }
230
231 } // namespace base
232