1## 2## Copyright (c) 2015 The WebM project authors. All Rights Reserved. 3## 4## Use of this source code is governed by a BSD-style license 5## that can be found in the LICENSE file in the root of the source 6## tree. An additional intellectual property rights grant can be found 7## in the file PATENTS. All contributing project authors may 8## be found in the AUTHORS file in the root of the source tree. 9## 10 11DSP_SRCS-yes += vpx_dsp.mk 12DSP_SRCS-yes += vpx_dsp_common.h 13 14DSP_SRCS-$(HAVE_MSA) += mips/macros_msa.h 15 16DSP_SRCS-$(HAVE_AVX2) += x86/bitdepth_conversion_avx2.h 17DSP_SRCS-$(HAVE_SSE2) += x86/bitdepth_conversion_sse2.h 18# This file is included in libs.mk. Including it here would cause it to be 19# compiled into an object. Even as an empty file, this would create an 20# executable section on the stack. 21#DSP_SRCS-$(HAVE_SSE2) += x86/bitdepth_conversion_sse2$(ASM) 22 23# bit reader 24DSP_SRCS-yes += prob.h 25DSP_SRCS-yes += prob.c 26 27ifeq ($(CONFIG_ENCODERS),yes) 28DSP_SRCS-yes += bitwriter.h 29DSP_SRCS-yes += bitwriter.c 30DSP_SRCS-yes += bitwriter_buffer.c 31DSP_SRCS-yes += bitwriter_buffer.h 32DSP_SRCS-yes += psnr.c 33DSP_SRCS-yes += psnr.h 34DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c 35DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h 36DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c 37DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c 38endif 39 40ifeq ($(CONFIG_DECODERS),yes) 41DSP_SRCS-yes += bitreader.h 42DSP_SRCS-yes += bitreader.c 43DSP_SRCS-yes += bitreader_buffer.c 44DSP_SRCS-yes += bitreader_buffer.h 45endif 46 47# intra predictions 48DSP_SRCS-yes += intrapred.c 49 50DSP_SRCS-$(HAVE_SSE) += x86/intrapred_sse2.asm 51DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm 52DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm 53DSP_SRCS-$(HAVE_VSX) += ppc/intrapred_vsx.c 54 55ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 56DSP_SRCS-$(HAVE_SSE) += x86/highbd_intrapred_sse2.asm 57DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm 58DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_intrin_sse2.c 59DSP_SRCS-$(HAVE_SSSE3) += x86/highbd_intrapred_intrin_ssse3.c 60DSP_SRCS-$(HAVE_NEON) += arm/highbd_intrapred_neon.c 61endif # CONFIG_VP9_HIGHBITDEPTH 62 63ifneq ($(filter yes,$(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),) 64DSP_SRCS-yes += add_noise.c 65DSP_SRCS-yes += deblock.c 66DSP_SRCS-yes += postproc.h 67DSP_SRCS-$(HAVE_MSA) += mips/add_noise_msa.c 68DSP_SRCS-$(HAVE_MSA) += mips/deblock_msa.c 69DSP_SRCS-$(HAVE_NEON) += arm/deblock_neon.c 70DSP_SRCS-$(HAVE_SSE2) += x86/add_noise_sse2.asm 71DSP_SRCS-$(HAVE_SSE2) += x86/deblock_sse2.asm 72endif # CONFIG_POSTPROC 73 74DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM) 75DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c 76DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c 77DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred4_dspr2.c 78DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred8_dspr2.c 79DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred16_dspr2.c 80 81DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.h 82DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c 83 84# interpolation filters 85DSP_SRCS-yes += vpx_convolve.c 86DSP_SRCS-yes += vpx_convolve.h 87DSP_SRCS-yes += vpx_filter.h 88 89DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h 90DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c 91DSP_SRCS-$(HAVE_SSSE3) += x86/convolve_ssse3.h 92DSP_SRCS-$(HAVE_AVX2) += x86/convolve_avx2.h 93DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_8t_sse2.asm 94DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_bilinear_sse2.asm 95DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm 96DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm 97DSP_SRCS-$(HAVE_AVX2) += x86/vpx_subpixel_8t_intrin_avx2.c 98DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c 99ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 100DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_8t_sse2.asm 101DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_bilinear_sse2.asm 102DSP_SRCS-$(HAVE_AVX2) += x86/highbd_convolve_avx2.c 103DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve_copy_neon.c 104DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve_avg_neon.c 105DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve8_neon.c 106DSP_SRCS-$(HAVE_NEON) += arm/highbd_vpx_convolve_neon.c 107endif 108 109DSP_SRCS-$(HAVE_SSE2) += x86/vpx_convolve_copy_sse2.asm 110DSP_SRCS-$(HAVE_NEON) += arm/vpx_scaled_convolve8_neon.c 111 112ifeq ($(HAVE_NEON_ASM),yes) 113DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM) 114DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM) 115DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM) 116DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM) 117DSP_SRCS-yes += arm/vpx_convolve_neon.c 118else 119ifeq ($(HAVE_NEON),yes) 120DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c 121DSP_SRCS-yes += arm/vpx_convolve8_neon.c 122DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c 123DSP_SRCS-yes += arm/vpx_convolve_neon.c 124endif # HAVE_NEON 125endif # HAVE_NEON_ASM 126 127# common (msa) 128DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c 129DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c 130DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c 131DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c 132DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c 133DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c 134DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c 135DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c 136DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h 137 138# common (dspr2) 139DSP_SRCS-$(HAVE_DSPR2) += mips/convolve_common_dspr2.h 140DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_dspr2.c 141DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_horiz_dspr2.c 142DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_dspr2.c 143DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_horiz_dspr2.c 144DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_vert_dspr2.c 145DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_dspr2.c 146DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_horiz_dspr2.c 147DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_dspr2.c 148DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_horiz_dspr2.c 149DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_vert_dspr2.c 150 151DSP_SRCS-$(HAVE_VSX) += ppc/vpx_convolve_vsx.c 152 153# loop filters 154DSP_SRCS-yes += loopfilter.c 155 156DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/loopfilter_sse2.c 157DSP_SRCS-$(HAVE_AVX2) += x86/loopfilter_avx2.c 158 159ifeq ($(HAVE_NEON_ASM),yes) 160DSP_SRCS-yes += arm/loopfilter_16_neon$(ASM) 161DSP_SRCS-yes += arm/loopfilter_8_neon$(ASM) 162DSP_SRCS-yes += arm/loopfilter_4_neon$(ASM) 163else 164DSP_SRCS-$(HAVE_NEON) += arm/loopfilter_neon.c 165endif # HAVE_NEON_ASM 166 167DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_msa.h 168DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_16_msa.c 169DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_8_msa.c 170DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_4_msa.c 171DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.h 172DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.c 173DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_macros_dspr2.h 174DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_masks_dspr2.h 175DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_dspr2.c 176DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_horiz_dspr2.c 177DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_vert_dspr2.c 178 179ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 180DSP_SRCS-$(HAVE_NEON) += arm/highbd_loopfilter_neon.c 181DSP_SRCS-$(HAVE_SSE2) += x86/highbd_loopfilter_sse2.c 182endif # CONFIG_VP9_HIGHBITDEPTH 183 184DSP_SRCS-yes += txfm_common.h 185DSP_SRCS-$(HAVE_SSE2) += x86/txfm_common_sse2.h 186DSP_SRCS-$(HAVE_MSA) += mips/txfm_macros_msa.h 187# forward transform 188ifeq ($(CONFIG_VP9_ENCODER),yes) 189DSP_SRCS-yes += fwd_txfm.c 190DSP_SRCS-yes += fwd_txfm.h 191DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.h 192DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.c 193DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_impl_sse2.h 194DSP_SRCS-$(HAVE_SSE2) += x86/fwd_dct32x32_impl_sse2.h 195ifeq ($(ARCH_X86_64),yes) 196DSP_SRCS-$(HAVE_SSSE3) += x86/fwd_txfm_ssse3_x86_64.asm 197endif 198DSP_SRCS-$(HAVE_AVX2) += x86/fwd_txfm_avx2.c 199DSP_SRCS-$(HAVE_AVX2) += x86/fwd_dct32x32_impl_avx2.h 200DSP_SRCS-$(HAVE_NEON) += arm/fdct_neon.c 201DSP_SRCS-$(HAVE_NEON) += arm/fdct16x16_neon.c 202DSP_SRCS-$(HAVE_NEON) += arm/fdct32x32_neon.c 203DSP_SRCS-$(HAVE_NEON) += arm/fdct_partial_neon.c 204DSP_SRCS-$(HAVE_NEON) += arm/fwd_txfm_neon.c 205DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.h 206DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.c 207DSP_SRCS-$(HAVE_MSA) += mips/fwd_dct32x32_msa.c 208endif # CONFIG_VP9_ENCODER 209 210# inverse transform 211ifeq ($(CONFIG_VP9),yes) 212DSP_SRCS-yes += inv_txfm.h 213DSP_SRCS-yes += inv_txfm.c 214DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.h 215DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.c 216DSP_SRCS-$(HAVE_SSE2) += x86/inv_wht_sse2.asm 217DSP_SRCS-$(HAVE_SSSE3) += x86/inv_txfm_ssse3.h 218DSP_SRCS-$(HAVE_SSSE3) += x86/inv_txfm_ssse3.c 219 220DSP_SRCS-$(HAVE_NEON_ASM) += arm/save_reg_neon$(ASM) 221 222DSP_SRCS-$(HAVE_VSX) += ppc/inv_txfm_vsx.c 223 224ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 225DSP_SRCS-$(HAVE_MSA) += mips/inv_txfm_msa.h 226DSP_SRCS-$(HAVE_MSA) += mips/idct4x4_msa.c 227DSP_SRCS-$(HAVE_MSA) += mips/idct8x8_msa.c 228DSP_SRCS-$(HAVE_MSA) += mips/idct16x16_msa.c 229DSP_SRCS-$(HAVE_MSA) += mips/idct32x32_msa.c 230 231DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h 232DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c 233DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c 234DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c 235DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c 236DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c 237else # CONFIG_VP9_HIGHBITDEPTH 238DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct4x4_add_neon.c 239DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct8x8_add_neon.c 240DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct16x16_add_neon.c 241DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct32x32_add_neon.c 242DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct32x32_34_add_neon.c 243DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct32x32_135_add_neon.c 244DSP_SRCS-$(HAVE_NEON) += arm/highbd_idct32x32_1024_add_neon.c 245DSP_SRCS-$(HAVE_SSE2) += x86/highbd_inv_txfm_sse2.h 246DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct4x4_add_sse2.c 247DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct8x8_add_sse2.c 248DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct16x16_add_sse2.c 249DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct32x32_add_sse2.c 250DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_inv_txfm_sse4.h 251DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct4x4_add_sse4.c 252DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct8x8_add_sse4.c 253DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct16x16_add_sse4.c 254DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct32x32_add_sse4.c 255endif # !CONFIG_VP9_HIGHBITDEPTH 256 257ifeq ($(HAVE_NEON_ASM),yes) 258DSP_SRCS-yes += arm/idct_neon$(ASM) 259DSP_SRCS-yes += arm/idct4x4_1_add_neon$(ASM) 260DSP_SRCS-yes += arm/idct4x4_add_neon$(ASM) 261else 262DSP_SRCS-$(HAVE_NEON) += arm/idct4x4_1_add_neon.c 263DSP_SRCS-$(HAVE_NEON) += arm/idct4x4_add_neon.c 264endif # HAVE_NEON_ASM 265DSP_SRCS-$(HAVE_NEON) += arm/idct_neon.h 266DSP_SRCS-$(HAVE_NEON) += arm/idct8x8_1_add_neon.c 267DSP_SRCS-$(HAVE_NEON) += arm/idct8x8_add_neon.c 268DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_1_add_neon.c 269DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_add_neon.c 270DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_1_add_neon.c 271DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_34_add_neon.c 272DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_135_add_neon.c 273DSP_SRCS-$(HAVE_NEON) += arm/idct32x32_add_neon.c 274 275endif # CONFIG_VP9 276 277# quantization 278ifeq ($(CONFIG_VP9_ENCODER),yes) 279DSP_SRCS-yes += quantize.c 280DSP_SRCS-yes += quantize.h 281 282DSP_SRCS-$(HAVE_SSE2) += x86/quantize_x86.h 283DSP_SRCS-$(HAVE_SSE2) += x86/quantize_sse2.c 284DSP_SRCS-$(HAVE_SSSE3) += x86/quantize_ssse3.c 285DSP_SRCS-$(HAVE_AVX) += x86/quantize_avx.c 286DSP_SRCS-$(HAVE_NEON) += arm/quantize_neon.c 287ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 288DSP_SRCS-$(HAVE_SSE2) += x86/highbd_quantize_intrin_sse2.c 289endif 290 291# avg 292DSP_SRCS-yes += avg.c 293DSP_SRCS-$(HAVE_SSE2) += x86/avg_intrin_sse2.c 294DSP_SRCS-$(HAVE_AVX2) += x86/avg_intrin_avx2.c 295DSP_SRCS-$(HAVE_NEON) += arm/avg_neon.c 296DSP_SRCS-$(HAVE_NEON) += arm/hadamard_neon.c 297DSP_SRCS-$(HAVE_MSA) += mips/avg_msa.c 298ifeq ($(ARCH_X86_64),yes) 299DSP_SRCS-$(HAVE_SSSE3) += x86/avg_ssse3_x86_64.asm 300endif 301DSP_SRCS-$(HAVE_VSX) += ppc/hadamard_vsx.c 302 303endif # CONFIG_VP9_ENCODER 304 305# skin detection 306DSP_SRCS-yes += skin_detection.h 307DSP_SRCS-yes += skin_detection.c 308 309ifeq ($(CONFIG_ENCODERS),yes) 310DSP_SRCS-yes += sad.c 311DSP_SRCS-yes += subtract.c 312DSP_SRCS-yes += sum_squares.c 313DSP_SRCS-$(HAVE_SSE2) += x86/sum_squares_sse2.c 314DSP_SRCS-$(HAVE_MSA) += mips/sum_squares_msa.c 315 316DSP_SRCS-$(HAVE_NEON) += arm/sad4d_neon.c 317DSP_SRCS-$(HAVE_NEON) += arm/sad_neon.c 318DSP_SRCS-$(HAVE_NEON) += arm/subtract_neon.c 319 320DSP_SRCS-$(HAVE_MSA) += mips/sad_msa.c 321DSP_SRCS-$(HAVE_MSA) += mips/subtract_msa.c 322 323DSP_SRCS-$(HAVE_MMI) += mips/sad_mmi.c 324DSP_SRCS-$(HAVE_MMI) += mips/subtract_mmi.c 325 326DSP_SRCS-$(HAVE_SSE3) += x86/sad_sse3.asm 327DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm 328DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm 329DSP_SRCS-$(HAVE_AVX2) += x86/sad4d_avx2.c 330DSP_SRCS-$(HAVE_AVX2) += x86/sad_avx2.c 331DSP_SRCS-$(HAVE_AVX512) += x86/sad4d_avx512.c 332 333DSP_SRCS-$(HAVE_SSE) += x86/sad4d_sse2.asm 334DSP_SRCS-$(HAVE_SSE) += x86/sad_sse2.asm 335DSP_SRCS-$(HAVE_SSE2) += x86/sad4d_sse2.asm 336DSP_SRCS-$(HAVE_SSE2) += x86/sad_sse2.asm 337DSP_SRCS-$(HAVE_SSE2) += x86/subtract_sse2.asm 338 339DSP_SRCS-$(HAVE_VSX) += ppc/sad_vsx.c 340 341ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 342DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm 343DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm 344endif # CONFIG_VP9_HIGHBITDEPTH 345 346endif # CONFIG_ENCODERS 347 348ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),) 349DSP_SRCS-yes += variance.c 350DSP_SRCS-yes += variance.h 351 352DSP_SRCS-$(HAVE_NEON) += arm/avg_pred_neon.c 353DSP_SRCS-$(HAVE_NEON) += arm/subpel_variance_neon.c 354DSP_SRCS-$(HAVE_NEON) += arm/variance_neon.c 355 356DSP_SRCS-$(HAVE_MSA) += mips/variance_msa.c 357DSP_SRCS-$(HAVE_MSA) += mips/sub_pixel_variance_msa.c 358 359DSP_SRCS-$(HAVE_MMI) += mips/variance_mmi.c 360 361DSP_SRCS-$(HAVE_SSE) += x86/variance_sse2.c 362DSP_SRCS-$(HAVE_SSE2) += x86/avg_pred_sse2.c 363DSP_SRCS-$(HAVE_SSE2) += x86/variance_sse2.c # Contains SSE2 and SSSE3 364DSP_SRCS-$(HAVE_AVX2) += x86/variance_avx2.c 365DSP_SRCS-$(HAVE_VSX) += ppc/variance_vsx.c 366 367ifeq ($(ARCH_X86_64),yes) 368DSP_SRCS-$(HAVE_SSE2) += x86/ssim_opt_x86_64.asm 369endif # ARCH_X86_64 370 371DSP_SRCS-$(HAVE_SSE) += x86/subpel_variance_sse2.asm 372DSP_SRCS-$(HAVE_SSE2) += x86/subpel_variance_sse2.asm # Contains SSE2 and SSSE3 373 374ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 375DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_sse2.c 376DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_impl_sse2.asm 377DSP_SRCS-$(HAVE_SSE2) += x86/highbd_subpel_variance_impl_sse2.asm 378endif # CONFIG_VP9_HIGHBITDEPTH 379endif # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC 380 381# Neon utilities 382DSP_SRCS-$(HAVE_NEON) += arm/mem_neon.h 383DSP_SRCS-$(HAVE_NEON) += arm/sum_neon.h 384DSP_SRCS-$(HAVE_NEON) += arm/transpose_neon.h 385DSP_SRCS-$(HAVE_NEON) += arm/vpx_convolve8_neon.h 386 387# PPC VSX utilities 388DSP_SRCS-$(HAVE_VSX) += ppc/types_vsx.h 389DSP_SRCS-$(HAVE_VSX) += ppc/transpose_vsx.h 390DSP_SRCS-$(HAVE_VSX) += ppc/bitdepth_conversion_vsx.h 391 392# X86 utilities 393DSP_SRCS-$(HAVE_SSE2) += x86/mem_sse2.h 394DSP_SRCS-$(HAVE_SSE2) += x86/transpose_sse2.h 395 396DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes) 397 398DSP_SRCS-yes += vpx_dsp_rtcd.c 399DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl 400 401$(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl)) 402