• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1;RUN: llc < %s -march=r600 -mcpu=cayman
2
3; CHECK-LABEL: {{^}}main:
4; CHECK: PRED_SETE_INT * Pred,
5; CHECK: DOT4 T{{[0-9]+}}.X, T0.X, T0.X, Pred_sel_one
6define amdgpu_ps void @main(<4 x float> inreg) {
7main_body:
8  %1 = extractelement <4 x float> %0, i32 0
9  %2 = bitcast float %1 to i32
10  %3 = icmp eq i32 %2, 0
11  br i1 %3, label %IF, label %ENDIF
12
13IF:                                             ; preds = %main_body
14  %4 = call float @llvm.r600.dot4(<4 x float> %0, <4 x float> %0)
15  br label %ENDIF
16
17ENDIF:                                            ; preds = %IF, %main_body
18  %5 = phi float [%4, %IF], [0.000000e+00, %main_body]
19  %6 = insertelement <4 x float> undef, float %5, i32 0
20  call void @llvm.R600.store.swizzle(<4 x float> %6, i32 0, i32 0)
21  ret void
22}
23
24declare float @llvm.r600.dot4(<4 x float>, <4 x float>) #1
25declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
26attributes #1 = { readnone }
27