1; Test 8-bit GPR stores. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5; Test an i8 store, which should get converted into an i32 truncation. 6define void @f1(i8 *%dst, i8 %val) { 7; CHECK-LABEL: f1: 8; CHECK: stc %r3, 0(%r2) 9; CHECK: br %r14 10 store i8 %val, i8 *%dst 11 ret void 12} 13 14; Test an i32 truncating store. 15define void @f2(i8 *%dst, i32 %val) { 16; CHECK-LABEL: f2: 17; CHECK: stc %r3, 0(%r2) 18; CHECK: br %r14 19 %trunc = trunc i32 %val to i8 20 store i8 %trunc, i8 *%dst 21 ret void 22} 23 24; Test an i64 truncating store. 25define void @f3(i8 *%dst, i64 %val) { 26; CHECK-LABEL: f3: 27; CHECK: stc %r3, 0(%r2) 28; CHECK: br %r14 29 %trunc = trunc i64 %val to i8 30 store i8 %trunc, i8 *%dst 31 ret void 32} 33 34; Check the high end of the STC range. 35define void @f4(i8 *%dst, i8 %val) { 36; CHECK-LABEL: f4: 37; CHECK: stc %r3, 4095(%r2) 38; CHECK: br %r14 39 %ptr = getelementptr i8, i8 *%dst, i64 4095 40 store i8 %val, i8 *%ptr 41 ret void 42} 43 44; Check the next byte up, which should use STCY instead of STC. 45define void @f5(i8 *%dst, i8 %val) { 46; CHECK-LABEL: f5: 47; CHECK: stcy %r3, 4096(%r2) 48; CHECK: br %r14 49 %ptr = getelementptr i8, i8 *%dst, i64 4096 50 store i8 %val, i8 *%ptr 51 ret void 52} 53 54; Check the high end of the STCY range. 55define void @f6(i8 *%dst, i8 %val) { 56; CHECK-LABEL: f6: 57; CHECK: stcy %r3, 524287(%r2) 58; CHECK: br %r14 59 %ptr = getelementptr i8, i8 *%dst, i64 524287 60 store i8 %val, i8 *%ptr 61 ret void 62} 63 64; Check the next byte up, which needs separate address logic. 65; Other sequences besides this one would be OK. 66define void @f7(i8 *%dst, i8 %val) { 67; CHECK-LABEL: f7: 68; CHECK: agfi %r2, 524288 69; CHECK: stc %r3, 0(%r2) 70; CHECK: br %r14 71 %ptr = getelementptr i8, i8 *%dst, i64 524288 72 store i8 %val, i8 *%ptr 73 ret void 74} 75 76; Check the high end of the negative STCY range. 77define void @f8(i8 *%dst, i8 %val) { 78; CHECK-LABEL: f8: 79; CHECK: stcy %r3, -1(%r2) 80; CHECK: br %r14 81 %ptr = getelementptr i8, i8 *%dst, i64 -1 82 store i8 %val, i8 *%ptr 83 ret void 84} 85 86; Check the low end of the STCY range. 87define void @f9(i8 *%dst, i8 %val) { 88; CHECK-LABEL: f9: 89; CHECK: stcy %r3, -524288(%r2) 90; CHECK: br %r14 91 %ptr = getelementptr i8, i8 *%dst, i64 -524288 92 store i8 %val, i8 *%ptr 93 ret void 94} 95 96; Check the next byte down, which needs separate address logic. 97; Other sequences besides this one would be OK. 98define void @f10(i8 *%dst, i8 %val) { 99; CHECK-LABEL: f10: 100; CHECK: agfi %r2, -524289 101; CHECK: stc %r3, 0(%r2) 102; CHECK: br %r14 103 %ptr = getelementptr i8, i8 *%dst, i64 -524289 104 store i8 %val, i8 *%ptr 105 ret void 106} 107 108; Check that STC allows an index. 109define void @f11(i64 %dst, i64 %index, i8 %val) { 110; CHECK-LABEL: f11: 111; CHECK: stc %r4, 4095(%r3,%r2) 112; CHECK: br %r14 113 %add1 = add i64 %dst, %index 114 %add2 = add i64 %add1, 4095 115 %ptr = inttoptr i64 %add2 to i8 * 116 store i8 %val, i8 *%ptr 117 ret void 118} 119 120; Check that STCY allows an index. 121define void @f12(i64 %dst, i64 %index, i8 %val) { 122; CHECK-LABEL: f12: 123; CHECK: stcy %r4, 4096(%r3,%r2) 124; CHECK: br %r14 125 %add1 = add i64 %dst, %index 126 %add2 = add i64 %add1, 4096 127 %ptr = inttoptr i64 %add2 to i8 * 128 store i8 %val, i8 *%ptr 129 ret void 130} 131