1;RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s 2;RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX %s 3 4;CHECK-LABEL: shift_16_i32 5;CHECK: vpsrld 6;CHECK: vpslld 7;CHECK: vpsrad 8;CHECK: ret 9define <16 x i32> @shift_16_i32(<16 x i32> %a) { 10 %b = lshr <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 11 %c = shl <16 x i32> %b, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> 12 %d = ashr <16 x i32> %c, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> 13 ret <16 x i32> %d; 14} 15 16;CHECK-LABEL: shift_8_i64 17;CHECK: vpsrlq 18;CHECK: vpsllq 19;CHECK: vpsraq 20;CHECK: ret 21define <8 x i64> @shift_8_i64(<8 x i64> %a) { 22 %b = lshr <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1> 23 %c = shl <8 x i64> %b, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12> 24 %d = ashr <8 x i64> %c, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12> 25 ret <8 x i64> %d; 26} 27 28;SKX-LABEL: shift_4_i64 29;SKX: vpsrlq 30;SKX: vpsllq 31;SKX: vpsraq 32;SKX: ret 33define <4 x i64> @shift_4_i64(<4 x i64> %a) { 34 %b = lshr <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 35 %c = shl <4 x i64> %b, <i64 12, i64 12, i64 12, i64 12> 36 %d = ashr <4 x i64> %c, <i64 12, i64 12, i64 12, i64 12> 37 ret <4 x i64> %d; 38} 39 40; CHECK-LABEL: variable_shl4 41; CHECK: vpsllvq %zmm 42; CHECK: ret 43define <8 x i64> @variable_shl4(<8 x i64> %x, <8 x i64> %y) { 44 %k = shl <8 x i64> %x, %y 45 ret <8 x i64> %k 46} 47 48; CHECK-LABEL: variable_shl5 49; CHECK: vpsllvd %zmm 50; CHECK: ret 51define <16 x i32> @variable_shl5(<16 x i32> %x, <16 x i32> %y) { 52 %k = shl <16 x i32> %x, %y 53 ret <16 x i32> %k 54} 55 56; CHECK-LABEL: variable_srl0 57; CHECK: vpsrlvd 58; CHECK: ret 59define <16 x i32> @variable_srl0(<16 x i32> %x, <16 x i32> %y) { 60 %k = lshr <16 x i32> %x, %y 61 ret <16 x i32> %k 62} 63 64; CHECK-LABEL: variable_srl2 65; CHECK: psrlvq 66; CHECK: ret 67define <8 x i64> @variable_srl2(<8 x i64> %x, <8 x i64> %y) { 68 %k = lshr <8 x i64> %x, %y 69 ret <8 x i64> %k 70} 71 72; CHECK-LABEL: variable_sra1 73; CHECK: vpsravd 74; CHECK: ret 75define <16 x i32> @variable_sra1(<16 x i32> %x, <16 x i32> %y) { 76 %k = ashr <16 x i32> %x, %y 77 ret <16 x i32> %k 78} 79 80; CHECK-LABEL: variable_sra2 81; CHECK: vpsravq %zmm 82; CHECK: ret 83define <8 x i64> @variable_sra2(<8 x i64> %x, <8 x i64> %y) { 84 %k = ashr <8 x i64> %x, %y 85 ret <8 x i64> %k 86} 87 88; SKX-LABEL: variable_sra3 89; SKX: vpsravq %ymm 90; SKX: ret 91define <4 x i64> @variable_sra3(<4 x i64> %x, <4 x i64> %y) { 92 %k = ashr <4 x i64> %x, %y 93 ret <4 x i64> %k 94} 95 96; SKX-LABEL: variable_sra4 97; SKX: vpsravw %xmm 98; SKX: ret 99define <8 x i16> @variable_sra4(<8 x i16> %x, <8 x i16> %y) { 100 %k = ashr <8 x i16> %x, %y 101 ret <8 x i16> %k 102} 103 104; CHECK-LABEL: variable_sra01_load 105; CHECK: vpsravd (% 106; CHECK: ret 107define <16 x i32> @variable_sra01_load(<16 x i32> %x, <16 x i32>* %y) { 108 %y1 = load <16 x i32>, <16 x i32>* %y 109 %k = ashr <16 x i32> %x, %y1 110 ret <16 x i32> %k 111} 112 113; CHECK-LABEL: variable_shl1_load 114; CHECK: vpsllvd (% 115; CHECK: ret 116define <16 x i32> @variable_shl1_load(<16 x i32> %x, <16 x i32>* %y) { 117 %y1 = load <16 x i32>, <16 x i32>* %y 118 %k = shl <16 x i32> %x, %y1 119 ret <16 x i32> %k 120} 121; CHECK: variable_srl0_load 122; CHECK: vpsrlvd (% 123; CHECK: ret 124define <16 x i32> @variable_srl0_load(<16 x i32> %x, <16 x i32>* %y) { 125 %y1 = load <16 x i32>, <16 x i32>* %y 126 %k = lshr <16 x i32> %x, %y1 127 ret <16 x i32> %k 128} 129 130; CHECK: variable_srl3_load 131; CHECK: vpsrlvq (% 132; CHECK: ret 133define <8 x i64> @variable_srl3_load(<8 x i64> %x, <8 x i64>* %y) { 134 %y1 = load <8 x i64>, <8 x i64>* %y 135 %k = lshr <8 x i64> %x, %y1 136 ret <8 x i64> %k 137} 138