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1; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s
2
3%SA = type <{ %union.anon, i32, [4 x i8], i8*, i8*, i8*, i32, [4 x i8] }>
4%union.anon = type { <1 x i64> }
5
6; Check that extra movd (copy) instructions aren't generated.
7
8define i32 @test(%SA* %pSA, i16* %A, i32 %B, i32 %C, i32 %D, i8* %E) {
9entry:
10; CHECK-LABEL: test
11; CHECK:       # BB#0:
12; CHECK-NEXT:  pshufw
13; CHECK-NEXT:  movd
14; CHECK-NOT:  movd
15; CHECK-NEXT:  testl
16  %shl = shl i32 1, %B
17  %shl1 = shl i32 %C, %B
18  %shl2 = shl i32 1, %D
19  %v = getelementptr inbounds %SA, %SA* %pSA, i64 0, i32 0, i32 0
20  %v0 = load <1 x i64>, <1 x i64>* %v, align 8
21  %SA0 = getelementptr inbounds %SA, %SA* %pSA, i64 0, i32 1
22  %v1 = load i32, i32* %SA0, align 4
23  %SA1 = getelementptr inbounds %SA, %SA* %pSA, i64 0, i32 3
24  %v2 = load i8*, i8** %SA1, align 8
25  %SA2 = getelementptr inbounds %SA, %SA* %pSA, i64 0, i32 4
26  %v3 = load i8*, i8** %SA2, align 8
27  %v4 = bitcast <1 x i64> %v0 to <4 x i16>
28  %v5 = bitcast <4 x i16> %v4 to x86_mmx
29  %v6 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %v5, i8 -18)
30  %v7 = bitcast x86_mmx %v6 to <4 x i16>
31  %v8 = bitcast <4 x i16> %v7 to <1 x i64>
32  %v9 = extractelement <1 x i64> %v8, i32 0
33  %v10 = bitcast i64 %v9 to <2 x i32>
34  %v11 = extractelement <2 x i32> %v10, i32 0
35  %cmp = icmp eq i32 %v11, 0
36  br i1 %cmp, label %if.A, label %if.B
37
38if.A:
39; CHECK: %if.A
40; CHECK-NEXT:  movd
41; CHECK-NEXT:  psllq
42  %pa = phi <1 x i64> [ %v8, %entry ], [ %vx, %if.C ]
43  %v17 = extractelement <1 x i64> %pa, i32 0
44  %v18 = bitcast i64 %v17 to x86_mmx
45  %v19 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %v18, i32 %B) #2
46  %v20 = bitcast x86_mmx %v19 to i64
47  %v21 = insertelement <1 x i64> undef, i64 %v20, i32 0
48  %cmp3 = icmp eq i64 %v20, 0
49  br i1 %cmp3, label %if.C, label %merge
50
51if.B:
52  %v34 = bitcast <1 x i64> %v8 to <4 x i16>
53  %v35 = bitcast <4 x i16> %v34 to x86_mmx
54  %v36 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %v35, i8 -18)
55  %v37 = bitcast x86_mmx %v36 to <4 x i16>
56  %v38 = bitcast <4 x i16> %v37 to <1 x i64>
57  br label %if.C
58
59if.C:
60  %vx = phi <1 x i64> [ %v21, %if.A ], [ %v38, %if.B ]
61  %cvt = bitcast <1 x i64> %vx to <2 x i32>
62  %ex = extractelement <2 x i32> %cvt, i32 0
63  %cmp2 = icmp eq i32 %ex, 0
64  br i1 %cmp2, label %if.A, label %merge
65
66merge:
67; CHECK: %merge
68; CHECK-NOT:  movd
69; CHECK-NEXT:  pshufw
70  %vy = phi <1 x i64> [ %v21, %if.A ], [ %vx, %if.C ]
71  %v130 = bitcast <1 x i64> %vy to <4 x i16>
72  %v131 = bitcast <4 x i16> %v130 to x86_mmx
73  %v132 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %v131, i8 -18)
74  %v133 = bitcast x86_mmx %v132 to <4 x i16>
75  %v134 = bitcast <4 x i16> %v133 to <1 x i64>
76  %v135 = extractelement <1 x i64> %v134, i32 0
77  %v136 = bitcast i64 %v135 to <2 x i32>
78  %v137 = extractelement <2 x i32> %v136, i32 0
79  ret i32 %v137
80}
81
82
83declare x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx, i8)
84declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
85