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1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx                                   | FileCheck -check-prefix=PATCH %s
3;
4; Note: Print verbose stackmaps using -debug-only=stackmaps.
5
6; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
7; CHECK-NEXT:   __LLVM_StackMaps:
8; Header
9; CHECK-NEXT:   .byte 1
10; CHECK-NEXT:   .byte 0
11; CHECK-NEXT:   .short 0
12; Num Functions
13; CHECK-NEXT:   .long 2
14; Num LargeConstants
15; CHECK-NEXT:   .long   0
16; Num Callsites
17; CHECK-NEXT:   .long   5
18
19; Functions and stack size
20; CHECK-NEXT:   .quad _stackmap_liveness
21; CHECK-NEXT:   .quad 8
22; CHECK-NEXT:   .quad _mixed_liveness
23; CHECK-NEXT:   .quad 8
24
25define void @stackmap_liveness() {
26entry:
27  %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
28; StackMap 1 (no liveness information available)
29; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
30; CHECK-NEXT:   .short  0
31; CHECK-NEXT:   .short  0
32; Padding
33; CHECK-NEXT:   .short  0
34; Num LiveOut Entries: 0
35; CHECK-NEXT:   .short  0
36; Align
37; CHECK-NEXT:   .p2align  3
38
39; StackMap 1 (patchpoint liveness information enabled)
40; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
41; PATCH-NEXT:   .short  0
42; PATCH-NEXT:   .short  0
43; Padding
44; PATCH-NEXT:   .short  0
45; Num LiveOut Entries: 1
46; PATCH-NEXT:   .short  1
47; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
48; PATCH-NEXT:   .short  19
49; PATCH-NEXT:   .byte 0
50; PATCH-NEXT:   .byte 16
51; Align
52; PATCH-NEXT:   .p2align  3
53  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0)
54  %a2 = call i64 asm sideeffect "", "={r8}"() nounwind
55  %a3 = call i8 asm sideeffect "", "={ah}"() nounwind
56  %a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind
57  %a5 = call <4 x double> asm sideeffect "", "={ymm1}"() nounwind
58
59; StackMap 2 (no liveness information available)
60; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
61; CHECK-NEXT:   .short  0
62; CHECK-NEXT:   .short  0
63; Padding
64; CHECK-NEXT:   .short  0
65; Num LiveOut Entries: 0
66; CHECK-NEXT:   .short  0
67; Align
68; CHECK-NEXT:   .p2align  3
69
70; StackMap 2 (patchpoint liveness information enabled)
71; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
72; PATCH-NEXT:   .short  0
73; PATCH-NEXT:   .short  0
74; Padding
75; PATCH-NEXT:   .short  0
76; Num LiveOut Entries: 5
77; PATCH-NEXT:   .short  5
78; LiveOut Entry 1: %RAX (1 bytes) --> %AL or %AH
79; PATCH-NEXT:   .short  0
80; PATCH-NEXT:   .byte 0
81; PATCH-NEXT:   .byte 1
82; LiveOut Entry 2: %R8 (8 bytes)
83; PATCH-NEXT:   .short  8
84; PATCH-NEXT:   .byte 0
85; PATCH-NEXT:   .byte 8
86; LiveOut Entry 3: %YMM0 (32 bytes)
87; PATCH-NEXT:   .short  17
88; PATCH-NEXT:   .byte 0
89; PATCH-NEXT:   .byte 32
90; LiveOut Entry 4: %YMM1 (32 bytes)
91; PATCH-NEXT:   .short  18
92; PATCH-NEXT:   .byte 0
93; PATCH-NEXT:   .byte 32
94; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
95; PATCH-NEXT:   .short  19
96; PATCH-NEXT:   .byte 0
97; PATCH-NEXT:   .byte 16
98; Align
99; PATCH-NEXT:   .p2align  3
100  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0)
101  call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind
102
103; StackMap 3 (no liveness information available)
104; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
105; CHECK-NEXT:   .short  0
106; CHECK-NEXT:   .short  0
107; Padding
108; CHECK-NEXT:   .short  0
109; Num LiveOut Entries: 0
110; CHECK-NEXT:   .short  0
111; Align
112; CHECK-NEXT:   .p2align  3
113
114; StackMap 3 (patchpoint liveness information enabled)
115; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
116; PATCH-NEXT:   .short  0
117; PATCH-NEXT:   .short  0
118; Padding
119; PATCH-NEXT:   .short  0
120; Num LiveOut Entries: 2
121; PATCH-NEXT:   .short  2
122; LiveOut Entry 1: %RSP (8 bytes)
123; PATCH-NEXT:   .short  7
124; PATCH-NEXT:   .byte 0
125; PATCH-NEXT:   .byte 8
126; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
127; PATCH-NEXT:   .short  19
128; PATCH-NEXT:   .byte 0
129; PATCH-NEXT:   .byte 16
130; Align
131; PATCH-NEXT:   .p2align  3
132  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0)
133  call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
134  ret void
135}
136
137define void @mixed_liveness() {
138entry:
139  %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
140; StackMap 4 (patchpoint liveness information enabled)
141; PATCH-LABEL:  .long L{{.*}}-_mixed_liveness
142; PATCH-NEXT:   .short  0
143; PATCH-NEXT:   .short  0
144; Padding
145; PATCH-NEXT:   .short  0
146; Num LiveOut Entries: 0
147; PATCH-NEXT:   .short  0
148; Align
149; PATCH-NEXT:   .p2align  3
150
151; StackMap 5 (patchpoint liveness information enabled)
152; PATCH-LABEL:  .long L{{.*}}-_mixed_liveness
153; PATCH-NEXT:   .short  0
154; PATCH-NEXT:   .short  0
155; Padding
156; PATCH-NEXT:   .short  0
157; Num LiveOut Entries: 2
158; PATCH-NEXT:   .short  2
159; LiveOut Entry 1: %RSP (8 bytes)
160; PATCH-NEXT:   .short  7
161; PATCH-NEXT:   .byte 0
162; PATCH-NEXT:   .byte 8
163; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
164; PATCH-NEXT:   .short  19
165; PATCH-NEXT:   .byte 0
166; PATCH-NEXT:   .byte 16
167; Align
168; PATCH-NEXT:   .p2align  3
169  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 5)
170  call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 5, i32 0, i8* null, i32 0)
171  call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
172  ret void
173}
174
175declare void @llvm.experimental.stackmap(i64, i32, ...)
176declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
177