1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 4 5; Inserts and extracts with variable indices must be lowered 6; to memory accesses. 7 8define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 9; X32-LABEL: t0: 10; X32: # BB#0: 11; X32-NEXT: pushl %ebp 12; X32-NEXT: movl %esp, %ebp 13; X32-NEXT: andl $-16, %esp 14; X32-NEXT: subl $32, %esp 15; X32-NEXT: movaps %xmm0, (%esp) 16; X32-NEXT: movl $76, (%esp,%eax,4) 17; X32-NEXT: movl (%esp), %eax 18; X32-NEXT: movl %ebp, %esp 19; X32-NEXT: popl %ebp 20; X32-NEXT: retl 21; 22; X64-LABEL: t0: 23; X64: # BB#0: 24; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 25; X64-NEXT: movslq %edi, %rax 26; X64-NEXT: movl $76, -24(%rsp,%rax,4) 27; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax 28; X64-NEXT: retq 29 %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7 30 %t9 = extractelement <4 x i32> %t13, i32 0 31 ret i32 %t9 32} 33 34define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 35; X32-LABEL: t1: 36; X32: # BB#0: 37; X32-NEXT: pushl %ebp 38; X32-NEXT: movl %esp, %ebp 39; X32-NEXT: andl $-16, %esp 40; X32-NEXT: subl $32, %esp 41; X32-NEXT: movl $76, %ecx 42; X32-NEXT: pinsrd $0, %ecx, %xmm0 43; X32-NEXT: movdqa %xmm0, (%esp) 44; X32-NEXT: movl (%esp,%eax,4), %eax 45; X32-NEXT: movl %ebp, %esp 46; X32-NEXT: popl %ebp 47; X32-NEXT: retl 48; 49; X64-LABEL: t1: 50; X64: # BB#0: 51; X64-NEXT: movl $76, %eax 52; X64-NEXT: pinsrd $0, %eax, %xmm0 53; X64-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp) 54; X64-NEXT: movslq %edi, %rax 55; X64-NEXT: movl -24(%rsp,%rax,4), %eax 56; X64-NEXT: retq 57 %t13 = insertelement <4 x i32> %t8, i32 76, i32 0 58 %t9 = extractelement <4 x i32> %t13, i32 %t7 59 ret i32 %t9 60} 61 62define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 63; X32-LABEL: t2: 64; X32: # BB#0: 65; X32-NEXT: pushl %ebp 66; X32-NEXT: movl %esp, %ebp 67; X32-NEXT: andl $-16, %esp 68; X32-NEXT: subl $32, %esp 69; X32-NEXT: movdqa %xmm0, (%esp) 70; X32-NEXT: pinsrd $0, (%esp,%eax,4), %xmm0 71; X32-NEXT: movl %ebp, %esp 72; X32-NEXT: popl %ebp 73; X32-NEXT: retl 74; 75; X64-LABEL: t2: 76; X64: # BB#0: 77; X64-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp) 78; X64-NEXT: movslq %edi, %rax 79; X64-NEXT: pinsrd $0, -24(%rsp,%rax,4), %xmm0 80; X64-NEXT: retq 81 %t9 = extractelement <4 x i32> %t8, i32 %t7 82 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 0 83 ret <4 x i32> %t13 84} 85 86define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind { 87; X32-LABEL: t3: 88; X32: # BB#0: 89; X32-NEXT: pushl %ebp 90; X32-NEXT: movl %esp, %ebp 91; X32-NEXT: andl $-16, %esp 92; X32-NEXT: subl $32, %esp 93; X32-NEXT: movaps %xmm0, (%esp) 94; X32-NEXT: movd %xmm0, (%esp,%eax,4) 95; X32-NEXT: movaps (%esp), %xmm0 96; X32-NEXT: movl %ebp, %esp 97; X32-NEXT: popl %ebp 98; X32-NEXT: retl 99; 100; X64-LABEL: t3: 101; X64: # BB#0: 102; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 103; X64-NEXT: movslq %edi, %rax 104; X64-NEXT: movd %xmm0, -24(%rsp,%rax,4) 105; X64-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0 106; X64-NEXT: retq 107 %t9 = extractelement <4 x i32> %t8, i32 0 108 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7 109 ret <4 x i32> %t13 110} 111