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1 /**************************************************************************
2  *
3  * Copyright 2008 VMware, Inc.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27 
28 
29 #include "draw/draw_context.h"
30 #include "os/os_misc.h"
31 #include "util/u_format.h"
32 #include "util/u_format_s3tc.h"
33 #include "util/u_inlines.h"
34 #include "util/u_memory.h"
35 #include "util/u_string.h"
36 
37 #include "i915_reg.h"
38 #include "i915_debug.h"
39 #include "i915_context.h"
40 #include "i915_screen.h"
41 #include "i915_resource.h"
42 #include "i915_winsys.h"
43 #include "i915_public.h"
44 
45 
46 /*
47  * Probe functions
48  */
49 
50 
51 static const char *
i915_get_vendor(struct pipe_screen * screen)52 i915_get_vendor(struct pipe_screen *screen)
53 {
54    return "Mesa Project";
55 }
56 
57 static const char *
i915_get_device_vendor(struct pipe_screen * screen)58 i915_get_device_vendor(struct pipe_screen *screen)
59 {
60    return "Intel";
61 }
62 
63 static const char *
i915_get_name(struct pipe_screen * screen)64 i915_get_name(struct pipe_screen *screen)
65 {
66    static char buffer[128];
67    const char *chipset;
68 
69    switch (i915_screen(screen)->iws->pci_id) {
70    case PCI_CHIP_I915_G:
71       chipset = "915G";
72       break;
73    case PCI_CHIP_I915_GM:
74       chipset = "915GM";
75       break;
76    case PCI_CHIP_I945_G:
77       chipset = "945G";
78       break;
79    case PCI_CHIP_I945_GM:
80       chipset = "945GM";
81       break;
82    case PCI_CHIP_I945_GME:
83       chipset = "945GME";
84       break;
85    case PCI_CHIP_G33_G:
86       chipset = "G33";
87       break;
88    case PCI_CHIP_Q35_G:
89       chipset = "Q35";
90       break;
91    case PCI_CHIP_Q33_G:
92       chipset = "Q33";
93       break;
94    case PCI_CHIP_PINEVIEW_G:
95       chipset = "Pineview G";
96       break;
97    case PCI_CHIP_PINEVIEW_M:
98       chipset = "Pineview M";
99       break;
100    default:
101       chipset = "unknown";
102       break;
103    }
104 
105    util_snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
106    return buffer;
107 }
108 
109 static int
i915_get_shader_param(struct pipe_screen * screen,unsigned shader,enum pipe_shader_cap cap)110 i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap cap)
111 {
112    switch(shader) {
113    case PIPE_SHADER_VERTEX:
114       switch (cap) {
115       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
116       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
117          if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
118             return PIPE_MAX_SAMPLERS;
119          else
120             return 0;
121        default:
122          return draw_get_shader_param(shader, cap);
123       }
124    case PIPE_SHADER_FRAGMENT:
125       /* XXX: some of these are just shader model 2.0 values, fix this! */
126       switch(cap) {
127       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
128          return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
129       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
130          return I915_MAX_ALU_INSN;
131       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
132          return I915_MAX_TEX_INSN;
133       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
134          return 8;
135       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
136          return 0;
137       case PIPE_SHADER_CAP_MAX_INPUTS:
138          return 10;
139       case PIPE_SHADER_CAP_MAX_OUTPUTS:
140          return 1;
141       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
142          return 32 * sizeof(float[4]);
143       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
144          return 1;
145       case PIPE_SHADER_CAP_MAX_TEMPS:
146          return 12; /* XXX: 12 -> 32 ? */
147       case PIPE_SHADER_CAP_MAX_PREDS:
148          return 0;
149       case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
150       case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
151          return 0;
152       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
153       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
154       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
155       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
156          return 1;
157       case PIPE_SHADER_CAP_SUBROUTINES:
158          return 0;
159       case PIPE_SHADER_CAP_INTEGERS:
160          return 0;
161       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
162       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
163          return I915_TEX_UNITS;
164       case PIPE_SHADER_CAP_DOUBLES:
165       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
166       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
167       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
168       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
169          return 0;
170       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
171          return 32;
172       default:
173          debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
174          return 0;
175       }
176       break;
177    default:
178       return 0;
179    }
180 
181 }
182 
183 static int
i915_get_param(struct pipe_screen * screen,enum pipe_cap cap)184 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
185 {
186    struct i915_screen *is = i915_screen(screen);
187 
188    switch (cap) {
189    /* Supported features (boolean caps). */
190    case PIPE_CAP_ANISOTROPIC_FILTER:
191    case PIPE_CAP_NPOT_TEXTURES:
192    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
193    case PIPE_CAP_POINT_SPRITE:
194    case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
195    case PIPE_CAP_TEXTURE_SHADOW_MAP:
196    case PIPE_CAP_TWO_SIDED_STENCIL:
197    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
198    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
199    case PIPE_CAP_TGSI_INSTANCEID:
200    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
201    case PIPE_CAP_USER_VERTEX_BUFFERS:
202    case PIPE_CAP_USER_INDEX_BUFFERS:
203    case PIPE_CAP_USER_CONSTANT_BUFFERS:
204    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
205       return 1;
206 
207    /* Unsupported features (boolean caps). */
208    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
209    case PIPE_CAP_DEPTH_CLIP_DISABLE:
210    case PIPE_CAP_INDEP_BLEND_ENABLE:
211    case PIPE_CAP_INDEP_BLEND_FUNC:
212    case PIPE_CAP_SHADER_STENCIL_EXPORT:
213    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
214    case PIPE_CAP_TEXTURE_SWIZZLE:
215    case PIPE_CAP_QUERY_TIME_ELAPSED:
216    case PIPE_CAP_SM3:
217    case PIPE_CAP_SEAMLESS_CUBE_MAP:
218    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
219    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
220    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
221    case PIPE_CAP_CONDITIONAL_RENDER:
222    case PIPE_CAP_TEXTURE_BARRIER:
223    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
224    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
225    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
226    case PIPE_CAP_START_INSTANCE:
227    case PIPE_CAP_QUERY_TIMESTAMP:
228    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
229    case PIPE_CAP_TEXTURE_MULTISAMPLE:
230    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
231    case PIPE_CAP_CUBE_MAP_ARRAY:
232    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
233    case PIPE_CAP_TGSI_TEXCOORD:
234    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
235    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
236    case PIPE_CAP_TEXTURE_GATHER_SM5:
237    case PIPE_CAP_FAKE_SW_MSAA:
238    case PIPE_CAP_TEXTURE_QUERY_LOD:
239    case PIPE_CAP_SAMPLE_SHADING:
240    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
241    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
242    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
243    case PIPE_CAP_CLIP_HALFZ:
244    case PIPE_CAP_VERTEXID_NOBASE:
245    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
246    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
247    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
248    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
249    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
250    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
251    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
252    case PIPE_CAP_DEPTH_BOUNDS_TEST:
253    case PIPE_CAP_TGSI_TXQS:
254    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
255    case PIPE_CAP_SHAREABLE_SHADERS:
256    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
257    case PIPE_CAP_CLEAR_TEXTURE:
258    case PIPE_CAP_DRAW_PARAMETERS:
259    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
260    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
261    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
262    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
263    case PIPE_CAP_INVALIDATE_BUFFER:
264    case PIPE_CAP_GENERATE_MIPMAP:
265    case PIPE_CAP_STRING_MARKER:
266    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
267    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
268    case PIPE_CAP_QUERY_MEMORY_INFO:
269    case PIPE_CAP_PCI_GROUP:
270    case PIPE_CAP_PCI_BUS:
271    case PIPE_CAP_PCI_DEVICE:
272    case PIPE_CAP_PCI_FUNCTION:
273    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
274    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
275    case PIPE_CAP_CULL_DISTANCE:
276    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
277    case PIPE_CAP_TGSI_VOTE:
278    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
279    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
280    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
281       return 0;
282 
283    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
284    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
285    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
286    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
287    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
288    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
289    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
290    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
291    case PIPE_CAP_DRAW_INDIRECT:
292    case PIPE_CAP_MULTI_DRAW_INDIRECT:
293    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
294    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
295    case PIPE_CAP_SAMPLER_VIEW_TARGET:
296    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
297    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
298    case PIPE_CAP_NATIVE_FENCE_FD:
299    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
300    case PIPE_CAP_TGSI_FS_FBFETCH:
301       return 0;
302 
303    case PIPE_CAP_MAX_VIEWPORTS:
304       return 1;
305 
306    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
307       return 64;
308 
309    case PIPE_CAP_GLSL_FEATURE_LEVEL:
310       return 120;
311 
312    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
313       return 16;
314 
315    /* Features we can lie about (boolean caps). */
316    case PIPE_CAP_OCCLUSION_QUERY:
317       return is->debug.lie ? 1 : 0;
318 
319    /* Texturing. */
320    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
321       return I915_MAX_TEXTURE_2D_LEVELS;
322    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
323       return I915_MAX_TEXTURE_3D_LEVELS;
324    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
325       return I915_MAX_TEXTURE_2D_LEVELS;
326    case PIPE_CAP_MIN_TEXEL_OFFSET:
327    case PIPE_CAP_MAX_TEXEL_OFFSET:
328    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
329    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
330    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
331    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
332    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
333       return 0;
334 
335    /* Render targets. */
336    case PIPE_CAP_MAX_RENDER_TARGETS:
337       return 1;
338 
339    /* Geometry shader output, unsupported. */
340    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
341    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
342    case PIPE_CAP_MAX_VERTEX_STREAMS:
343       return 0;
344 
345    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
346       return 2048;
347 
348    /* Fragment coordinate conventions. */
349    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
350    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
351       return 1;
352    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
353    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
354       return 0;
355    case PIPE_CAP_ENDIANNESS:
356       return PIPE_ENDIAN_LITTLE;
357 
358    case PIPE_CAP_VENDOR_ID:
359       return 0x8086;
360    case PIPE_CAP_DEVICE_ID:
361       return is->iws->pci_id;
362    case PIPE_CAP_ACCELERATED:
363       return 1;
364    case PIPE_CAP_VIDEO_MEMORY: {
365       /* Once a batch uses more than 75% of the maximum mappable size, we
366        * assume that there's some fragmentation, and we start doing extra
367        * flushing, etc.  That's the big cliff apps will care about.
368        */
369       const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
370       uint64_t system_memory;
371 
372       if (!os_get_total_physical_memory(&system_memory))
373          return 0;
374 
375       return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20));
376    }
377    case PIPE_CAP_UMA:
378       return 1;
379 
380    default:
381       debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
382       return 0;
383    }
384 }
385 
386 static float
i915_get_paramf(struct pipe_screen * screen,enum pipe_capf cap)387 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
388 {
389    switch(cap) {
390    case PIPE_CAPF_MAX_LINE_WIDTH:
391       /* fall-through */
392    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
393       return 7.5;
394 
395    case PIPE_CAPF_MAX_POINT_WIDTH:
396       /* fall-through */
397    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
398       return 255.0;
399 
400    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
401       return 4.0;
402 
403    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
404       return 16.0;
405 
406    default:
407       debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
408       return 0;
409    }
410 }
411 
412 boolean
i915_is_format_supported(struct pipe_screen * screen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned tex_usage)413 i915_is_format_supported(struct pipe_screen *screen,
414                          enum pipe_format format,
415                          enum pipe_texture_target target,
416                          unsigned sample_count,
417                          unsigned tex_usage)
418 {
419    static const enum pipe_format tex_supported[] = {
420       PIPE_FORMAT_B8G8R8A8_UNORM,
421       PIPE_FORMAT_B8G8R8A8_SRGB,
422       PIPE_FORMAT_B8G8R8X8_UNORM,
423       PIPE_FORMAT_R8G8B8A8_UNORM,
424       PIPE_FORMAT_R8G8B8X8_UNORM,
425       PIPE_FORMAT_B4G4R4A4_UNORM,
426       PIPE_FORMAT_B5G6R5_UNORM,
427       PIPE_FORMAT_B5G5R5A1_UNORM,
428       PIPE_FORMAT_B10G10R10A2_UNORM,
429       PIPE_FORMAT_L8_UNORM,
430       PIPE_FORMAT_A8_UNORM,
431       PIPE_FORMAT_I8_UNORM,
432       PIPE_FORMAT_L8A8_UNORM,
433       PIPE_FORMAT_UYVY,
434       PIPE_FORMAT_YUYV,
435       /* XXX why not?
436       PIPE_FORMAT_Z16_UNORM, */
437       PIPE_FORMAT_DXT1_RGB,
438       PIPE_FORMAT_DXT1_RGBA,
439       PIPE_FORMAT_DXT3_RGBA,
440       PIPE_FORMAT_DXT5_RGBA,
441       PIPE_FORMAT_Z24X8_UNORM,
442       PIPE_FORMAT_Z24_UNORM_S8_UINT,
443       PIPE_FORMAT_NONE  /* list terminator */
444    };
445    static const enum pipe_format render_supported[] = {
446       PIPE_FORMAT_B8G8R8A8_UNORM,
447       PIPE_FORMAT_B8G8R8X8_UNORM,
448       PIPE_FORMAT_R8G8B8A8_UNORM,
449       PIPE_FORMAT_R8G8B8X8_UNORM,
450       PIPE_FORMAT_B5G6R5_UNORM,
451       PIPE_FORMAT_B5G5R5A1_UNORM,
452       PIPE_FORMAT_B4G4R4A4_UNORM,
453       PIPE_FORMAT_B10G10R10A2_UNORM,
454       PIPE_FORMAT_L8_UNORM,
455       PIPE_FORMAT_A8_UNORM,
456       PIPE_FORMAT_I8_UNORM,
457       PIPE_FORMAT_NONE  /* list terminator */
458    };
459    static const enum pipe_format depth_supported[] = {
460       /* XXX why not?
461       PIPE_FORMAT_Z16_UNORM, */
462       PIPE_FORMAT_Z24X8_UNORM,
463       PIPE_FORMAT_Z24_UNORM_S8_UINT,
464       PIPE_FORMAT_NONE  /* list terminator */
465    };
466    const enum pipe_format *list;
467    uint i;
468 
469    if (!util_format_is_supported(format, tex_usage))
470       return FALSE;
471 
472    if (sample_count > 1)
473       return FALSE;
474 
475    if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
476       list = depth_supported;
477    else if (tex_usage & PIPE_BIND_RENDER_TARGET)
478       list = render_supported;
479    else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
480       list = tex_supported;
481    else
482       return TRUE; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
483 
484    for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
485       if (list[i] == format)
486          return TRUE;
487    }
488 
489    return FALSE;
490 }
491 
492 
493 /*
494  * Fence functions
495  */
496 
497 
498 static void
i915_fence_reference(struct pipe_screen * screen,struct pipe_fence_handle ** ptr,struct pipe_fence_handle * fence)499 i915_fence_reference(struct pipe_screen *screen,
500                      struct pipe_fence_handle **ptr,
501                      struct pipe_fence_handle *fence)
502 {
503    struct i915_screen *is = i915_screen(screen);
504 
505    is->iws->fence_reference(is->iws, ptr, fence);
506 }
507 
508 static boolean
i915_fence_finish(struct pipe_screen * screen,struct pipe_context * ctx,struct pipe_fence_handle * fence,uint64_t timeout)509 i915_fence_finish(struct pipe_screen *screen,
510                   struct pipe_context *ctx,
511                   struct pipe_fence_handle *fence,
512                   uint64_t timeout)
513 {
514    struct i915_screen *is = i915_screen(screen);
515 
516    if (!timeout)
517       return is->iws->fence_signalled(is->iws, fence) == 1;
518 
519    return is->iws->fence_finish(is->iws, fence) == 1;
520 }
521 
522 
523 /*
524  * Generic functions
525  */
526 
527 
528 static void
i915_flush_frontbuffer(struct pipe_screen * screen,struct pipe_resource * resource,unsigned level,unsigned layer,void * winsys_drawable_handle,struct pipe_box * sub_box)529 i915_flush_frontbuffer(struct pipe_screen *screen,
530                        struct pipe_resource *resource,
531                        unsigned level, unsigned layer,
532                        void *winsys_drawable_handle,
533                        struct pipe_box *sub_box)
534 {
535    /* XXX: Dummy right now. */
536    (void)screen;
537    (void)resource;
538    (void)level;
539    (void)layer;
540    (void)winsys_drawable_handle;
541    (void)sub_box;
542 }
543 
544 static void
i915_destroy_screen(struct pipe_screen * screen)545 i915_destroy_screen(struct pipe_screen *screen)
546 {
547    struct i915_screen *is = i915_screen(screen);
548 
549    if (is->iws)
550       is->iws->destroy(is->iws);
551 
552    FREE(is);
553 }
554 
555 /**
556  * Create a new i915_screen object
557  */
558 struct pipe_screen *
i915_screen_create(struct i915_winsys * iws)559 i915_screen_create(struct i915_winsys *iws)
560 {
561    struct i915_screen *is = CALLOC_STRUCT(i915_screen);
562 
563    if (!is)
564       return NULL;
565 
566    switch (iws->pci_id) {
567    case PCI_CHIP_I915_G:
568    case PCI_CHIP_I915_GM:
569       is->is_i945 = FALSE;
570       break;
571 
572    case PCI_CHIP_I945_G:
573    case PCI_CHIP_I945_GM:
574    case PCI_CHIP_I945_GME:
575    case PCI_CHIP_G33_G:
576    case PCI_CHIP_Q33_G:
577    case PCI_CHIP_Q35_G:
578    case PCI_CHIP_PINEVIEW_G:
579    case PCI_CHIP_PINEVIEW_M:
580       is->is_i945 = TRUE;
581       break;
582 
583    default:
584       debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
585                    __FUNCTION__, iws->pci_id);
586       FREE(is);
587       return NULL;
588    }
589 
590    is->iws = iws;
591 
592    is->base.destroy = i915_destroy_screen;
593    is->base.flush_frontbuffer = i915_flush_frontbuffer;
594 
595    is->base.get_name = i915_get_name;
596    is->base.get_vendor = i915_get_vendor;
597    is->base.get_device_vendor = i915_get_device_vendor;
598    is->base.get_param = i915_get_param;
599    is->base.get_shader_param = i915_get_shader_param;
600    is->base.get_paramf = i915_get_paramf;
601    is->base.is_format_supported = i915_is_format_supported;
602 
603    is->base.context_create = i915_create_context;
604 
605    is->base.fence_reference = i915_fence_reference;
606    is->base.fence_finish = i915_fence_finish;
607 
608    i915_init_screen_resource_functions(is);
609 
610    i915_debug_init(is);
611 
612    util_format_s3tc_init();
613 
614    return &is->base;
615 }
616