1 //===-- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the abstract interface for register coalescers, 11 // allowing them to interact with and query register allocators. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_CODEGEN_REGISTER_COALESCER_H 16 #define LLVM_CODEGEN_REGISTER_COALESCER_H 17 18 namespace llvm { 19 20 class MachineInstr; 21 class TargetRegisterInfo; 22 class TargetRegisterClass; 23 class TargetInstrInfo; 24 25 /// CoalescerPair - A helper class for register coalescers. When deciding if 26 /// two registers can be coalesced, CoalescerPair can determine if a copy 27 /// instruction would become an identity copy after coalescing. 28 class CoalescerPair { 29 const TargetInstrInfo &TII; 30 const TargetRegisterInfo &TRI; 31 32 /// DstReg - The register that will be left after coalescing. It can be a 33 /// virtual or physical register. 34 unsigned DstReg; 35 36 /// SrcReg - the virtual register that will be coalesced into dstReg. 37 unsigned SrcReg; 38 39 /// subReg_ - The subregister index of srcReg in DstReg. It is possible the 40 /// coalesce SrcReg into a subreg of the larger DstReg when DstReg is a 41 /// virtual register. 42 unsigned SubIdx; 43 44 /// Partial - True when the original copy was a partial subregister copy. 45 bool Partial; 46 47 /// CrossClass - True when both regs are virtual, and newRC is constrained. 48 bool CrossClass; 49 50 /// Flipped - True when DstReg and SrcReg are reversed from the oriignal 51 /// copy instruction. 52 bool Flipped; 53 54 /// NewRC - The register class of the coalesced register, or NULL if DstReg 55 /// is a physreg. 56 const TargetRegisterClass *NewRC; 57 58 public: CoalescerPair(const TargetInstrInfo & tii,const TargetRegisterInfo & tri)59 CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri) 60 : TII(tii), TRI(tri), DstReg(0), SrcReg(0), SubIdx(0), 61 Partial(false), CrossClass(false), Flipped(false), NewRC(0) {} 62 63 /// setRegisters - set registers to match the copy instruction MI. Return 64 /// false if MI is not a coalescable copy instruction. 65 bool setRegisters(const MachineInstr*); 66 67 /// flip - Swap SrcReg and DstReg. Return false if swapping is impossible 68 /// because DstReg is a physical register, or SubIdx is set. 69 bool flip(); 70 71 /// isCoalescable - Return true if MI is a copy instruction that will become 72 /// an identity copy after coalescing. 73 bool isCoalescable(const MachineInstr*) const; 74 75 /// isPhys - Return true if DstReg is a physical register. isPhys()76 bool isPhys() const { return !NewRC; } 77 78 /// isPartial - Return true if the original copy instruction did not copy 79 /// the full register, but was a subreg operation. isPartial()80 bool isPartial() const { return Partial; } 81 82 /// isCrossClass - Return true if DstReg is virtual and NewRC is a smaller 83 /// register class than DstReg's. isCrossClass()84 bool isCrossClass() const { return CrossClass; } 85 86 /// isFlipped - Return true when getSrcReg is the register being defined by 87 /// the original copy instruction. isFlipped()88 bool isFlipped() const { return Flipped; } 89 90 /// getDstReg - Return the register (virtual or physical) that will remain 91 /// after coalescing. getDstReg()92 unsigned getDstReg() const { return DstReg; } 93 94 /// getSrcReg - Return the virtual register that will be coalesced away. getSrcReg()95 unsigned getSrcReg() const { return SrcReg; } 96 97 /// getSubIdx - Return the subregister index in DstReg that SrcReg will be 98 /// coalesced into, or 0. getSubIdx()99 unsigned getSubIdx() const { return SubIdx; } 100 101 /// getNewRC - Return the register class of the coalesced register. getNewRC()102 const TargetRegisterClass *getNewRC() const { return NewRC; } 103 }; 104 } // End llvm namespace 105 106 #endif 107