1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides PowerPC specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "PPCMCTargetDesc.h"
15 #include "PPCMCAsmInfo.h"
16 #include "InstPrinter/PPCInstPrinter.h"
17 #include "llvm/MC/MachineLocation.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/Support/TargetRegistry.h"
24
25 #define GET_INSTRINFO_MC_DESC
26 #include "PPCGenInstrInfo.inc"
27
28 #define GET_SUBTARGETINFO_MC_DESC
29 #include "PPCGenSubtargetInfo.inc"
30
31 #define GET_REGINFO_MC_DESC
32 #include "PPCGenRegisterInfo.inc"
33
34 using namespace llvm;
35
createPPCMCInstrInfo()36 static MCInstrInfo *createPPCMCInstrInfo() {
37 MCInstrInfo *X = new MCInstrInfo();
38 InitPPCMCInstrInfo(X);
39 return X;
40 }
41
createPPCMCRegisterInfo(StringRef TT)42 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
43 Triple TheTriple(TT);
44 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
45 unsigned Flavour = isPPC64 ? 0 : 1;
46 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
47
48 MCRegisterInfo *X = new MCRegisterInfo();
49 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
50 return X;
51 }
52
createPPCMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)53 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
54 StringRef FS) {
55 MCSubtargetInfo *X = new MCSubtargetInfo();
56 InitPPCMCSubtargetInfo(X, TT, CPU, FS);
57 return X;
58 }
59
createPPCMCAsmInfo(const Target & T,StringRef TT)60 static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
61 Triple TheTriple(TT);
62 bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
63
64 MCAsmInfo *MAI;
65 if (TheTriple.isOSDarwin())
66 MAI = new PPCMCAsmInfoDarwin(isPPC64);
67 else
68 MAI = new PPCLinuxMCAsmInfo(isPPC64);
69
70 // Initial state of the frame pointer is R1.
71 MachineLocation Dst(MachineLocation::VirtualFP);
72 MachineLocation Src(PPC::R1, 0);
73 MAI->addInitialFrameState(0, Dst, Src);
74
75 return MAI;
76 }
77
createPPCMCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM)78 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
79 CodeModel::Model CM) {
80 MCCodeGenInfo *X = new MCCodeGenInfo();
81
82 if (RM == Reloc::Default) {
83 Triple T(TT);
84 if (T.isOSDarwin())
85 RM = Reloc::DynamicNoPIC;
86 else
87 RM = Reloc::Static;
88 }
89 X->InitMCCodeGenInfo(RM, CM);
90 return X;
91 }
92
93 // This is duplicated code. Refactor this.
createMCStreamer(const Target & T,StringRef TT,MCContext & Ctx,MCAsmBackend & MAB,raw_ostream & OS,MCCodeEmitter * Emitter,bool RelaxAll,bool NoExecStack)94 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
95 MCContext &Ctx, MCAsmBackend &MAB,
96 raw_ostream &OS,
97 MCCodeEmitter *Emitter,
98 bool RelaxAll,
99 bool NoExecStack) {
100 if (Triple(TT).isOSDarwin())
101 return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
102
103 return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
104 }
105
createPPCMCInstPrinter(const Target & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCSubtargetInfo & STI)106 static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
107 unsigned SyntaxVariant,
108 const MCAsmInfo &MAI,
109 const MCSubtargetInfo &STI) {
110 return new PPCInstPrinter(MAI, SyntaxVariant);
111 }
112
LLVMInitializePowerPCTargetMC()113 extern "C" void LLVMInitializePowerPCTargetMC() {
114 // Register the MC asm info.
115 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
116 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
117
118 // Register the MC codegen info.
119 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
120 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
121
122 // Register the MC instruction info.
123 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
124 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
125
126 // Register the MC register info.
127 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
128 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
129
130 // Register the MC subtarget info.
131 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
132 createPPCMCSubtargetInfo);
133 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
134 createPPCMCSubtargetInfo);
135
136 // Register the MC Code Emitter
137 TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
138 TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
139
140 // Register the asm backend.
141 TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
142 TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
143
144 // Register the object streamer.
145 TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
146 TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
147
148 // Register the MCInstPrinter.
149 TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
150 TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
151 }
152