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1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
16 
17 #include "llvm/Target/TargetRegisterInfo.h"
18 
19 #define GET_REGINFO_HEADER
20 #include "X86GenRegisterInfo.inc"
21 
22 namespace llvm {
23   class Type;
24   class TargetInstrInfo;
25   class X86TargetMachine;
26 
27 class X86RegisterInfo : public X86GenRegisterInfo {
28 public:
29   X86TargetMachine &TM;
30   const TargetInstrInfo &TII;
31 
32 private:
33   /// Is64Bit - Is the target 64-bits.
34   ///
35   bool Is64Bit;
36 
37   /// IsWin64 - Is the target on of win64 flavours
38   ///
39   bool IsWin64;
40 
41   /// SlotSize - Stack slot size in bytes.
42   ///
43   unsigned SlotSize;
44 
45   /// StackPtr - X86 physical register used as stack ptr.
46   ///
47   unsigned StackPtr;
48 
49   /// FramePtr - X86 physical register used as frame ptr.
50   ///
51   unsigned FramePtr;
52 
53 public:
54   X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
55 
56   /// getX86RegNum - Returns the native X86 register number for the given LLVM
57   /// register identifier.
58   static unsigned getX86RegNum(unsigned RegNo);
59 
60   // FIXME: This should be tablegen'd like getDwarfRegNum is
61   int getSEHRegNum(unsigned i) const;
62 
63   /// getCompactUnwindRegNum - This function maps the register to the number for
64   /// compact unwind encoding. Return -1 if the register isn't valid.
65   int getCompactUnwindRegNum(unsigned RegNum, bool isEH) const;
66 
67   /// Code Generation virtual methods...
68   ///
69 
70   /// getMatchingSuperRegClass - Return a subclass of the specified register
71   /// class A so that each register in it has a sub-register of the
72   /// specified sub-register index which is in the specified register class B.
73   virtual const TargetRegisterClass *
74   getMatchingSuperRegClass(const TargetRegisterClass *A,
75                            const TargetRegisterClass *B, unsigned Idx) const;
76 
77   virtual const TargetRegisterClass *
78   getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const;
79 
80   const TargetRegisterClass*
81   getLargestLegalSuperClass(const TargetRegisterClass *RC) const;
82 
83   /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
84   /// values.
85   const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
86 
87   /// getCrossCopyRegClass - Returns a legal register class to copy a register
88   /// in the specified class to or from. Returns NULL if it is possible to copy
89   /// between a two registers of the specified class.
90   const TargetRegisterClass *
91   getCrossCopyRegClass(const TargetRegisterClass *RC) const;
92 
93   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
94                                MachineFunction &MF) const;
95 
96   /// getCalleeSavedRegs - Return a null-terminated list of all of the
97   /// callee-save registers on this target.
98   const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
99 
100   /// getReservedRegs - Returns a bitset indexed by physical register number
101   /// indicating if a register is a special register that has particular uses and
102   /// should be considered unavailable at all times, e.g. SP, RA. This is used by
103   /// register scavenger to determine what registers are free.
104   BitVector getReservedRegs(const MachineFunction &MF) const;
105 
106   bool canRealignStack(const MachineFunction &MF) const;
107 
108   bool needsStackRealignment(const MachineFunction &MF) const;
109 
110   bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
111                             int &FrameIdx) const;
112 
113   void eliminateCallFramePseudoInstr(MachineFunction &MF,
114                                      MachineBasicBlock &MBB,
115                                      MachineBasicBlock::iterator MI) const;
116 
117   void eliminateFrameIndex(MachineBasicBlock::iterator MI,
118                            int SPAdj, RegScavenger *RS = NULL) const;
119 
120   // Debug information queries.
121   unsigned getFrameRegister(const MachineFunction &MF) const;
getStackRegister()122   unsigned getStackRegister() const { return StackPtr; }
123   // FIXME: Move to FrameInfok
getSlotSize()124   unsigned getSlotSize() const { return SlotSize; }
125 
126   // Exception handling queries.
127   unsigned getEHExceptionRegister() const;
128   unsigned getEHHandlerRegister() const;
129 };
130 
131 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
132 // register of a specific X86 register.
133 // e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX
134 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
135 
136 } // End llvm namespace
137 
138 #endif
139