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1; Test that we handle select on vectors.
2
3; REQUIRES: allow_dump
4
5; Compile using standalone assembler.
6; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
7; RUN:   | FileCheck %s --check-prefix=ASM
8
9; Show bytes in assembled standalone code.
10; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
11; RUN:   --args -O2 --reg-use=s20  | FileCheck %s --check-prefix=DIS
12
13; Compile using integrated assembler.
14; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \
15; RUN:   --reg-use=s20 \
16; RUN:   | FileCheck %s --check-prefix=IASM
17
18; Show bytes in assembled integrated code.
19; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
20; RUN:   --args -O2 --reg-use=s20 | FileCheck %s --check-prefix=DIS
21
22define internal <4 x float> @select4float(<4 x i1> %s, <4 x float> %a,
23                                          <4 x float> %b) {
24; ASM-LABEL:select4float:
25; DIS-LABEL:00000000 <select4float>:
26; IASM-LABEL:select4float:
27
28entry:
29  %res = select <4 x i1> %s, <4 x float> %a, <4 x float> %b
30
31; ASM:          vshl.u32 [[M:.*]], {{.*}}, #31
32; ASM-NEXT:     vshr.s32 [[M:.*]], {{.*}}, #31
33; ASM-NEXT:     vbsl.i32 [[M]], {{.*}}
34; DIS:       0: f2bf0550
35; DIS-NEXT:  4: f2a10050
36; DIS-NEXT:  8: f3120154
37; IASM-NOT:     vshl
38; IASM-NOT:     vshr
39; IASM-NOT:     vbsl
40
41  ret <4 x float> %res
42}
43
44define internal <4 x i32> @select4i32(<4 x i1> %s, <4 x i32> %a, <4 x i32> %b) {
45; ASM-LABEL:select4i32:
46; DIS-LABEL:00000010 <select4i32>:
47; IASM-LABEL:select4i32:
48
49entry:
50  %res = select <4 x i1> %s, <4 x i32> %a, <4 x i32> %b
51
52; ASM:          vshl.u32 [[M:.*]], {{.*}}, #31
53; ASM-NEXT:     vshr.s32 [[M:.*]], {{.*}}, #31
54; ASM-NEXT:     vbsl.i32 [[M]], {{.*}}
55; DIS:      10: f2bf0550
56; DIS-NEXT: 14: f2a10050
57; DIS_NEXT: 18: f3120154
58; IASM-NOT:     vshl
59; IASM-NOT:     vshr
60; IASM-NOT:     vbsl
61
62  ret <4 x i32> %res
63}
64
65define internal <8 x i16> @select8i16(<8 x i1> %s, <8 x i16> %a, <8 x i16> %b) {
66; ASM-LABEL:select8i16:
67; DIS-LABEL:00000020 <select8i16>:
68; IASM-LABEL:select8i16:
69
70entry:
71  %res = select <8 x i1> %s, <8 x i16> %a, <8 x i16> %b
72
73; ASM:          vshl.u16 [[M:.*]], {{.*}}, #15
74; ASM-NEXT:     vshr.s16 [[M:.*]], {{.*}}, #15
75; ASM-NEXT:     vbsl.i16 [[M]], {{.*}}
76; DIS:      20: f29f0550
77; DIS-NEXT: 24: f2910050
78; DIS-NEXT: 28: f3120154
79; IASM-NOT:     vshl
80; IASM-NOT:     vshr
81; IASM-NOT:     vbsl
82
83  ret <8 x i16> %res
84}
85
86define internal <16 x i8> @select16i8(<16 x i1> %s, <16 x i8> %a,
87                                      <16 x i8> %b) {
88; ASM-LABEL:select16i8:
89; DIS-LABEL:00000030 <select16i8>:
90; IASM-LABEL:select16i8:
91
92entry:
93  %res = select <16 x i1> %s, <16 x i8> %a, <16 x i8> %b
94
95; ASM:          vshl.u8 [[M:.*]], {{.*}}, #7
96; ASM-NEXT:     vshr.s8 [[M:.*]], {{.*}}, #7
97; ASM-NEXT:     vbsl.i8 [[M]], {{.*}}
98; DIS:      30: f28f0550
99; DIS-NEXT: 34: f2890050
100; DIS-NEXT: 38: f3120154
101; IASM-NOT:     vshl
102; IASM-NOT:     vshr
103; IASM-NOT:     vbsl
104
105  ret <16 x i8> %res
106}
107