1; Show that we know how to translate vadd. 2 3; NOTE: Restricts S and D registers to ones that will better test S/D 4; register encodings. 5 6; REQUIRES: allow_dump 7 8; Compile using standalone assembler. 9; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 10; RUN: -reg-use s20,s22,d20,d22 \ 11; RUN: | FileCheck %s --check-prefix=ASM 12 13; Show bytes in assembled standalone code. 14; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 15; RUN: --args -Om1 \ 16; RUN: -reg-use s20,s22,d20,d22 \ 17; RUN: | FileCheck %s --check-prefix=DIS 18 19; Compile using integrated assembler. 20; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 21; RUN: -reg-use s20,s22,d20,d22 \ 22; RUN: | FileCheck %s --check-prefix=IASM 23 24; Show bytes in assembled integrated code. 25; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 26; RUN: --args -Om1 \ 27; RUN: -reg-use s20,s22,d20,d22 \ 28; RUN: | FileCheck %s --check-prefix=DIS 29 30define internal float @testVaddFloat(float %v1, float %v2) { 31; ASM-LABEL: testVaddFloat: 32; DIS-LABEL: 00000000 <testVaddFloat>: 33; IASM-LABEL: testVaddFloat: 34 35entry: 36 %res = fadd float %v1, %v2 37 38; ASM: vadd.f32 s20, s20, s22 39; DIS: 1c: ee3aaa0b 40; IASM-NOT: vadd 41 42 ret float %res 43} 44 45define internal double @testVaddDouble(double %v1, double %v2) { 46; ASM-LABEL: testVaddDouble: 47; DIS-LABEL: 00000040 <testVaddDouble>: 48; IASM-LABEL: .LtestVaddDouble$entry: 49 50entry: 51 %res = fadd double %v1, %v2 52 53; ASM: vadd.f64 d20, d20, d22 54; DIS: 54: ee744ba6 55; IASM-NOT: vadd 56 57 ret double %res 58} 59