1 // Copyright 2016, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 // * Redistributions of source code must retain the above copyright notice,
8 // this list of conditions and the following disclaimer.
9 // * Redistributions in binary form must reproduce the above copyright notice,
10 // this list of conditions and the following disclaimer in the documentation
11 // and/or other materials provided with the distribution.
12 // * Neither the name of ARM Limited nor the names of its contributors may be
13 // used to endorse or promote products derived from this software without
14 // specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28 // -----------------------------------------------------------------------------
29 // This file is auto generated from the
30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using
31 // tools/generate_tests.py.
32 //
33 // PLEASE DO NOT EDIT.
34 // -----------------------------------------------------------------------------
35
36
37 #include "test-runner.h"
38
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
41
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
44
45 #define BUF_SIZE (4096)
46
47 namespace vixl {
48 namespace aarch32 {
49
50 // List of instruction mnemonics.
51 #define FOREACH_INSTRUCTION(M) M(add)
52
53
54 // The following definitions are defined again in each generated test, therefore
55 // we need to place them in an anomymous namespace. It expresses that they are
56 // local to this file only, and the compiler is not allowed to share these types
57 // across test files during template instantiation. Specifically, `Operands` has
58 // various layouts across generated tests so it absolutely cannot be shared.
59
60 #ifdef VIXL_INCLUDE_TARGET_T32
61 namespace {
62
63 // Values to be passed to the assembler to produce the instruction under test.
64 struct Operands {
65 Condition cond;
66 Register rd;
67 Register rn;
68 uint32_t immediate;
69 };
70
71 // This structure contains all data needed to test one specific
72 // instruction.
73 struct TestData {
74 // The `operands` field represents what to pass to the assembler to
75 // produce the instruction.
76 Operands operands;
77 // True if we need to generate an IT instruction for this test to be valid.
78 bool in_it_block;
79 // The condition to give the IT instruction, this will be set to "al" by
80 // default.
81 Condition it_condition;
82 // Description of the operands, used for error reporting.
83 const char* operands_description;
84 // Unique identifier, used for generating traces.
85 const char* identifier;
86 };
87
88 struct TestResult {
89 size_t size;
90 const byte* encoding;
91 };
92
93 // Each element of this array produce one instruction encoding.
94 const TestData kTests[] =
95 {{{al, r0, sp, 0x0}, false, al, "al r0 sp 0x0", "al_r0_sp_0x0"},
96 {{al, r0, sp, 0x4}, false, al, "al r0 sp 0x4", "al_r0_sp_0x4"},
97 {{al, r0, sp, 0x8}, false, al, "al r0 sp 0x8", "al_r0_sp_0x8"},
98 {{al, r0, sp, 0xc}, false, al, "al r0 sp 0xc", "al_r0_sp_0xc"},
99 {{al, r0, sp, 0x10}, false, al, "al r0 sp 0x10", "al_r0_sp_0x10"},
100 {{al, r0, sp, 0x14}, false, al, "al r0 sp 0x14", "al_r0_sp_0x14"},
101 {{al, r0, sp, 0x18}, false, al, "al r0 sp 0x18", "al_r0_sp_0x18"},
102 {{al, r0, sp, 0x1c}, false, al, "al r0 sp 0x1c", "al_r0_sp_0x1c"},
103 {{al, r0, sp, 0x20}, false, al, "al r0 sp 0x20", "al_r0_sp_0x20"},
104 {{al, r0, sp, 0x24}, false, al, "al r0 sp 0x24", "al_r0_sp_0x24"},
105 {{al, r0, sp, 0x28}, false, al, "al r0 sp 0x28", "al_r0_sp_0x28"},
106 {{al, r0, sp, 0x2c}, false, al, "al r0 sp 0x2c", "al_r0_sp_0x2c"},
107 {{al, r0, sp, 0x30}, false, al, "al r0 sp 0x30", "al_r0_sp_0x30"},
108 {{al, r0, sp, 0x34}, false, al, "al r0 sp 0x34", "al_r0_sp_0x34"},
109 {{al, r0, sp, 0x38}, false, al, "al r0 sp 0x38", "al_r0_sp_0x38"},
110 {{al, r0, sp, 0x3c}, false, al, "al r0 sp 0x3c", "al_r0_sp_0x3c"},
111 {{al, r0, sp, 0x40}, false, al, "al r0 sp 0x40", "al_r0_sp_0x40"},
112 {{al, r0, sp, 0x44}, false, al, "al r0 sp 0x44", "al_r0_sp_0x44"},
113 {{al, r0, sp, 0x48}, false, al, "al r0 sp 0x48", "al_r0_sp_0x48"},
114 {{al, r0, sp, 0x4c}, false, al, "al r0 sp 0x4c", "al_r0_sp_0x4c"},
115 {{al, r0, sp, 0x50}, false, al, "al r0 sp 0x50", "al_r0_sp_0x50"},
116 {{al, r0, sp, 0x54}, false, al, "al r0 sp 0x54", "al_r0_sp_0x54"},
117 {{al, r0, sp, 0x58}, false, al, "al r0 sp 0x58", "al_r0_sp_0x58"},
118 {{al, r0, sp, 0x5c}, false, al, "al r0 sp 0x5c", "al_r0_sp_0x5c"},
119 {{al, r0, sp, 0x60}, false, al, "al r0 sp 0x60", "al_r0_sp_0x60"},
120 {{al, r0, sp, 0x64}, false, al, "al r0 sp 0x64", "al_r0_sp_0x64"},
121 {{al, r0, sp, 0x68}, false, al, "al r0 sp 0x68", "al_r0_sp_0x68"},
122 {{al, r0, sp, 0x6c}, false, al, "al r0 sp 0x6c", "al_r0_sp_0x6c"},
123 {{al, r0, sp, 0x70}, false, al, "al r0 sp 0x70", "al_r0_sp_0x70"},
124 {{al, r0, sp, 0x74}, false, al, "al r0 sp 0x74", "al_r0_sp_0x74"},
125 {{al, r0, sp, 0x78}, false, al, "al r0 sp 0x78", "al_r0_sp_0x78"},
126 {{al, r0, sp, 0x7c}, false, al, "al r0 sp 0x7c", "al_r0_sp_0x7c"},
127 {{al, r0, sp, 0x80}, false, al, "al r0 sp 0x80", "al_r0_sp_0x80"},
128 {{al, r0, sp, 0x84}, false, al, "al r0 sp 0x84", "al_r0_sp_0x84"},
129 {{al, r0, sp, 0x88}, false, al, "al r0 sp 0x88", "al_r0_sp_0x88"},
130 {{al, r0, sp, 0x8c}, false, al, "al r0 sp 0x8c", "al_r0_sp_0x8c"},
131 {{al, r0, sp, 0x90}, false, al, "al r0 sp 0x90", "al_r0_sp_0x90"},
132 {{al, r0, sp, 0x94}, false, al, "al r0 sp 0x94", "al_r0_sp_0x94"},
133 {{al, r0, sp, 0x98}, false, al, "al r0 sp 0x98", "al_r0_sp_0x98"},
134 {{al, r0, sp, 0x9c}, false, al, "al r0 sp 0x9c", "al_r0_sp_0x9c"},
135 {{al, r0, sp, 0xa0}, false, al, "al r0 sp 0xa0", "al_r0_sp_0xa0"},
136 {{al, r0, sp, 0xa4}, false, al, "al r0 sp 0xa4", "al_r0_sp_0xa4"},
137 {{al, r0, sp, 0xa8}, false, al, "al r0 sp 0xa8", "al_r0_sp_0xa8"},
138 {{al, r0, sp, 0xac}, false, al, "al r0 sp 0xac", "al_r0_sp_0xac"},
139 {{al, r0, sp, 0xb0}, false, al, "al r0 sp 0xb0", "al_r0_sp_0xb0"},
140 {{al, r0, sp, 0xb4}, false, al, "al r0 sp 0xb4", "al_r0_sp_0xb4"},
141 {{al, r0, sp, 0xb8}, false, al, "al r0 sp 0xb8", "al_r0_sp_0xb8"},
142 {{al, r0, sp, 0xbc}, false, al, "al r0 sp 0xbc", "al_r0_sp_0xbc"},
143 {{al, r0, sp, 0xc0}, false, al, "al r0 sp 0xc0", "al_r0_sp_0xc0"},
144 {{al, r0, sp, 0xc4}, false, al, "al r0 sp 0xc4", "al_r0_sp_0xc4"},
145 {{al, r0, sp, 0xc8}, false, al, "al r0 sp 0xc8", "al_r0_sp_0xc8"},
146 {{al, r0, sp, 0xcc}, false, al, "al r0 sp 0xcc", "al_r0_sp_0xcc"},
147 {{al, r0, sp, 0xd0}, false, al, "al r0 sp 0xd0", "al_r0_sp_0xd0"},
148 {{al, r0, sp, 0xd4}, false, al, "al r0 sp 0xd4", "al_r0_sp_0xd4"},
149 {{al, r0, sp, 0xd8}, false, al, "al r0 sp 0xd8", "al_r0_sp_0xd8"},
150 {{al, r0, sp, 0xdc}, false, al, "al r0 sp 0xdc", "al_r0_sp_0xdc"},
151 {{al, r0, sp, 0xe0}, false, al, "al r0 sp 0xe0", "al_r0_sp_0xe0"},
152 {{al, r0, sp, 0xe4}, false, al, "al r0 sp 0xe4", "al_r0_sp_0xe4"},
153 {{al, r0, sp, 0xe8}, false, al, "al r0 sp 0xe8", "al_r0_sp_0xe8"},
154 {{al, r0, sp, 0xec}, false, al, "al r0 sp 0xec", "al_r0_sp_0xec"},
155 {{al, r0, sp, 0xf0}, false, al, "al r0 sp 0xf0", "al_r0_sp_0xf0"},
156 {{al, r0, sp, 0xf4}, false, al, "al r0 sp 0xf4", "al_r0_sp_0xf4"},
157 {{al, r0, sp, 0xf8}, false, al, "al r0 sp 0xf8", "al_r0_sp_0xf8"},
158 {{al, r0, sp, 0xfc}, false, al, "al r0 sp 0xfc", "al_r0_sp_0xfc"},
159 {{al, r0, sp, 0x100}, false, al, "al r0 sp 0x100", "al_r0_sp_0x100"},
160 {{al, r0, sp, 0x104}, false, al, "al r0 sp 0x104", "al_r0_sp_0x104"},
161 {{al, r0, sp, 0x108}, false, al, "al r0 sp 0x108", "al_r0_sp_0x108"},
162 {{al, r0, sp, 0x10c}, false, al, "al r0 sp 0x10c", "al_r0_sp_0x10c"},
163 {{al, r0, sp, 0x110}, false, al, "al r0 sp 0x110", "al_r0_sp_0x110"},
164 {{al, r0, sp, 0x114}, false, al, "al r0 sp 0x114", "al_r0_sp_0x114"},
165 {{al, r0, sp, 0x118}, false, al, "al r0 sp 0x118", "al_r0_sp_0x118"},
166 {{al, r0, sp, 0x11c}, false, al, "al r0 sp 0x11c", "al_r0_sp_0x11c"},
167 {{al, r0, sp, 0x120}, false, al, "al r0 sp 0x120", "al_r0_sp_0x120"},
168 {{al, r0, sp, 0x124}, false, al, "al r0 sp 0x124", "al_r0_sp_0x124"},
169 {{al, r0, sp, 0x128}, false, al, "al r0 sp 0x128", "al_r0_sp_0x128"},
170 {{al, r0, sp, 0x12c}, false, al, "al r0 sp 0x12c", "al_r0_sp_0x12c"},
171 {{al, r0, sp, 0x130}, false, al, "al r0 sp 0x130", "al_r0_sp_0x130"},
172 {{al, r0, sp, 0x134}, false, al, "al r0 sp 0x134", "al_r0_sp_0x134"},
173 {{al, r0, sp, 0x138}, false, al, "al r0 sp 0x138", "al_r0_sp_0x138"},
174 {{al, r0, sp, 0x13c}, false, al, "al r0 sp 0x13c", "al_r0_sp_0x13c"},
175 {{al, r0, sp, 0x140}, false, al, "al r0 sp 0x140", "al_r0_sp_0x140"},
176 {{al, r0, sp, 0x144}, false, al, "al r0 sp 0x144", "al_r0_sp_0x144"},
177 {{al, r0, sp, 0x148}, false, al, "al r0 sp 0x148", "al_r0_sp_0x148"},
178 {{al, r0, sp, 0x14c}, false, al, "al r0 sp 0x14c", "al_r0_sp_0x14c"},
179 {{al, r0, sp, 0x150}, false, al, "al r0 sp 0x150", "al_r0_sp_0x150"},
180 {{al, r0, sp, 0x154}, false, al, "al r0 sp 0x154", "al_r0_sp_0x154"},
181 {{al, r0, sp, 0x158}, false, al, "al r0 sp 0x158", "al_r0_sp_0x158"},
182 {{al, r0, sp, 0x15c}, false, al, "al r0 sp 0x15c", "al_r0_sp_0x15c"},
183 {{al, r0, sp, 0x160}, false, al, "al r0 sp 0x160", "al_r0_sp_0x160"},
184 {{al, r0, sp, 0x164}, false, al, "al r0 sp 0x164", "al_r0_sp_0x164"},
185 {{al, r0, sp, 0x168}, false, al, "al r0 sp 0x168", "al_r0_sp_0x168"},
186 {{al, r0, sp, 0x16c}, false, al, "al r0 sp 0x16c", "al_r0_sp_0x16c"},
187 {{al, r0, sp, 0x170}, false, al, "al r0 sp 0x170", "al_r0_sp_0x170"},
188 {{al, r0, sp, 0x174}, false, al, "al r0 sp 0x174", "al_r0_sp_0x174"},
189 {{al, r0, sp, 0x178}, false, al, "al r0 sp 0x178", "al_r0_sp_0x178"},
190 {{al, r0, sp, 0x17c}, false, al, "al r0 sp 0x17c", "al_r0_sp_0x17c"},
191 {{al, r0, sp, 0x180}, false, al, "al r0 sp 0x180", "al_r0_sp_0x180"},
192 {{al, r0, sp, 0x184}, false, al, "al r0 sp 0x184", "al_r0_sp_0x184"},
193 {{al, r0, sp, 0x188}, false, al, "al r0 sp 0x188", "al_r0_sp_0x188"},
194 {{al, r0, sp, 0x18c}, false, al, "al r0 sp 0x18c", "al_r0_sp_0x18c"},
195 {{al, r0, sp, 0x190}, false, al, "al r0 sp 0x190", "al_r0_sp_0x190"},
196 {{al, r0, sp, 0x194}, false, al, "al r0 sp 0x194", "al_r0_sp_0x194"},
197 {{al, r0, sp, 0x198}, false, al, "al r0 sp 0x198", "al_r0_sp_0x198"},
198 {{al, r0, sp, 0x19c}, false, al, "al r0 sp 0x19c", "al_r0_sp_0x19c"},
199 {{al, r0, sp, 0x1a0}, false, al, "al r0 sp 0x1a0", "al_r0_sp_0x1a0"},
200 {{al, r0, sp, 0x1a4}, false, al, "al r0 sp 0x1a4", "al_r0_sp_0x1a4"},
201 {{al, r0, sp, 0x1a8}, false, al, "al r0 sp 0x1a8", "al_r0_sp_0x1a8"},
202 {{al, r0, sp, 0x1ac}, false, al, "al r0 sp 0x1ac", "al_r0_sp_0x1ac"},
203 {{al, r0, sp, 0x1b0}, false, al, "al r0 sp 0x1b0", "al_r0_sp_0x1b0"},
204 {{al, r0, sp, 0x1b4}, false, al, "al r0 sp 0x1b4", "al_r0_sp_0x1b4"},
205 {{al, r0, sp, 0x1b8}, false, al, "al r0 sp 0x1b8", "al_r0_sp_0x1b8"},
206 {{al, r0, sp, 0x1bc}, false, al, "al r0 sp 0x1bc", "al_r0_sp_0x1bc"},
207 {{al, r0, sp, 0x1c0}, false, al, "al r0 sp 0x1c0", "al_r0_sp_0x1c0"},
208 {{al, r0, sp, 0x1c4}, false, al, "al r0 sp 0x1c4", "al_r0_sp_0x1c4"},
209 {{al, r0, sp, 0x1c8}, false, al, "al r0 sp 0x1c8", "al_r0_sp_0x1c8"},
210 {{al, r0, sp, 0x1cc}, false, al, "al r0 sp 0x1cc", "al_r0_sp_0x1cc"},
211 {{al, r0, sp, 0x1d0}, false, al, "al r0 sp 0x1d0", "al_r0_sp_0x1d0"},
212 {{al, r0, sp, 0x1d4}, false, al, "al r0 sp 0x1d4", "al_r0_sp_0x1d4"},
213 {{al, r0, sp, 0x1d8}, false, al, "al r0 sp 0x1d8", "al_r0_sp_0x1d8"},
214 {{al, r0, sp, 0x1dc}, false, al, "al r0 sp 0x1dc", "al_r0_sp_0x1dc"},
215 {{al, r0, sp, 0x1e0}, false, al, "al r0 sp 0x1e0", "al_r0_sp_0x1e0"},
216 {{al, r0, sp, 0x1e4}, false, al, "al r0 sp 0x1e4", "al_r0_sp_0x1e4"},
217 {{al, r0, sp, 0x1e8}, false, al, "al r0 sp 0x1e8", "al_r0_sp_0x1e8"},
218 {{al, r0, sp, 0x1ec}, false, al, "al r0 sp 0x1ec", "al_r0_sp_0x1ec"},
219 {{al, r0, sp, 0x1f0}, false, al, "al r0 sp 0x1f0", "al_r0_sp_0x1f0"},
220 {{al, r0, sp, 0x1f4}, false, al, "al r0 sp 0x1f4", "al_r0_sp_0x1f4"},
221 {{al, r0, sp, 0x1f8}, false, al, "al r0 sp 0x1f8", "al_r0_sp_0x1f8"},
222 {{al, r0, sp, 0x1fc}, false, al, "al r0 sp 0x1fc", "al_r0_sp_0x1fc"},
223 {{al, r0, sp, 0x200}, false, al, "al r0 sp 0x200", "al_r0_sp_0x200"},
224 {{al, r0, sp, 0x204}, false, al, "al r0 sp 0x204", "al_r0_sp_0x204"},
225 {{al, r0, sp, 0x208}, false, al, "al r0 sp 0x208", "al_r0_sp_0x208"},
226 {{al, r0, sp, 0x20c}, false, al, "al r0 sp 0x20c", "al_r0_sp_0x20c"},
227 {{al, r0, sp, 0x210}, false, al, "al r0 sp 0x210", "al_r0_sp_0x210"},
228 {{al, r0, sp, 0x214}, false, al, "al r0 sp 0x214", "al_r0_sp_0x214"},
229 {{al, r0, sp, 0x218}, false, al, "al r0 sp 0x218", "al_r0_sp_0x218"},
230 {{al, r0, sp, 0x21c}, false, al, "al r0 sp 0x21c", "al_r0_sp_0x21c"},
231 {{al, r0, sp, 0x220}, false, al, "al r0 sp 0x220", "al_r0_sp_0x220"},
232 {{al, r0, sp, 0x224}, false, al, "al r0 sp 0x224", "al_r0_sp_0x224"},
233 {{al, r0, sp, 0x228}, false, al, "al r0 sp 0x228", "al_r0_sp_0x228"},
234 {{al, r0, sp, 0x22c}, false, al, "al r0 sp 0x22c", "al_r0_sp_0x22c"},
235 {{al, r0, sp, 0x230}, false, al, "al r0 sp 0x230", "al_r0_sp_0x230"},
236 {{al, r0, sp, 0x234}, false, al, "al r0 sp 0x234", "al_r0_sp_0x234"},
237 {{al, r0, sp, 0x238}, false, al, "al r0 sp 0x238", "al_r0_sp_0x238"},
238 {{al, r0, sp, 0x23c}, false, al, "al r0 sp 0x23c", "al_r0_sp_0x23c"},
239 {{al, r0, sp, 0x240}, false, al, "al r0 sp 0x240", "al_r0_sp_0x240"},
240 {{al, r0, sp, 0x244}, false, al, "al r0 sp 0x244", "al_r0_sp_0x244"},
241 {{al, r0, sp, 0x248}, false, al, "al r0 sp 0x248", "al_r0_sp_0x248"},
242 {{al, r0, sp, 0x24c}, false, al, "al r0 sp 0x24c", "al_r0_sp_0x24c"},
243 {{al, r0, sp, 0x250}, false, al, "al r0 sp 0x250", "al_r0_sp_0x250"},
244 {{al, r0, sp, 0x254}, false, al, "al r0 sp 0x254", "al_r0_sp_0x254"},
245 {{al, r0, sp, 0x258}, false, al, "al r0 sp 0x258", "al_r0_sp_0x258"},
246 {{al, r0, sp, 0x25c}, false, al, "al r0 sp 0x25c", "al_r0_sp_0x25c"},
247 {{al, r0, sp, 0x260}, false, al, "al r0 sp 0x260", "al_r0_sp_0x260"},
248 {{al, r0, sp, 0x264}, false, al, "al r0 sp 0x264", "al_r0_sp_0x264"},
249 {{al, r0, sp, 0x268}, false, al, "al r0 sp 0x268", "al_r0_sp_0x268"},
250 {{al, r0, sp, 0x26c}, false, al, "al r0 sp 0x26c", "al_r0_sp_0x26c"},
251 {{al, r0, sp, 0x270}, false, al, "al r0 sp 0x270", "al_r0_sp_0x270"},
252 {{al, r0, sp, 0x274}, false, al, "al r0 sp 0x274", "al_r0_sp_0x274"},
253 {{al, r0, sp, 0x278}, false, al, "al r0 sp 0x278", "al_r0_sp_0x278"},
254 {{al, r0, sp, 0x27c}, false, al, "al r0 sp 0x27c", "al_r0_sp_0x27c"},
255 {{al, r0, sp, 0x280}, false, al, "al r0 sp 0x280", "al_r0_sp_0x280"},
256 {{al, r0, sp, 0x284}, false, al, "al r0 sp 0x284", "al_r0_sp_0x284"},
257 {{al, r0, sp, 0x288}, false, al, "al r0 sp 0x288", "al_r0_sp_0x288"},
258 {{al, r0, sp, 0x28c}, false, al, "al r0 sp 0x28c", "al_r0_sp_0x28c"},
259 {{al, r0, sp, 0x290}, false, al, "al r0 sp 0x290", "al_r0_sp_0x290"},
260 {{al, r0, sp, 0x294}, false, al, "al r0 sp 0x294", "al_r0_sp_0x294"},
261 {{al, r0, sp, 0x298}, false, al, "al r0 sp 0x298", "al_r0_sp_0x298"},
262 {{al, r0, sp, 0x29c}, false, al, "al r0 sp 0x29c", "al_r0_sp_0x29c"},
263 {{al, r0, sp, 0x2a0}, false, al, "al r0 sp 0x2a0", "al_r0_sp_0x2a0"},
264 {{al, r0, sp, 0x2a4}, false, al, "al r0 sp 0x2a4", "al_r0_sp_0x2a4"},
265 {{al, r0, sp, 0x2a8}, false, al, "al r0 sp 0x2a8", "al_r0_sp_0x2a8"},
266 {{al, r0, sp, 0x2ac}, false, al, "al r0 sp 0x2ac", "al_r0_sp_0x2ac"},
267 {{al, r0, sp, 0x2b0}, false, al, "al r0 sp 0x2b0", "al_r0_sp_0x2b0"},
268 {{al, r0, sp, 0x2b4}, false, al, "al r0 sp 0x2b4", "al_r0_sp_0x2b4"},
269 {{al, r0, sp, 0x2b8}, false, al, "al r0 sp 0x2b8", "al_r0_sp_0x2b8"},
270 {{al, r0, sp, 0x2bc}, false, al, "al r0 sp 0x2bc", "al_r0_sp_0x2bc"},
271 {{al, r0, sp, 0x2c0}, false, al, "al r0 sp 0x2c0", "al_r0_sp_0x2c0"},
272 {{al, r0, sp, 0x2c4}, false, al, "al r0 sp 0x2c4", "al_r0_sp_0x2c4"},
273 {{al, r0, sp, 0x2c8}, false, al, "al r0 sp 0x2c8", "al_r0_sp_0x2c8"},
274 {{al, r0, sp, 0x2cc}, false, al, "al r0 sp 0x2cc", "al_r0_sp_0x2cc"},
275 {{al, r0, sp, 0x2d0}, false, al, "al r0 sp 0x2d0", "al_r0_sp_0x2d0"},
276 {{al, r0, sp, 0x2d4}, false, al, "al r0 sp 0x2d4", "al_r0_sp_0x2d4"},
277 {{al, r0, sp, 0x2d8}, false, al, "al r0 sp 0x2d8", "al_r0_sp_0x2d8"},
278 {{al, r0, sp, 0x2dc}, false, al, "al r0 sp 0x2dc", "al_r0_sp_0x2dc"},
279 {{al, r0, sp, 0x2e0}, false, al, "al r0 sp 0x2e0", "al_r0_sp_0x2e0"},
280 {{al, r0, sp, 0x2e4}, false, al, "al r0 sp 0x2e4", "al_r0_sp_0x2e4"},
281 {{al, r0, sp, 0x2e8}, false, al, "al r0 sp 0x2e8", "al_r0_sp_0x2e8"},
282 {{al, r0, sp, 0x2ec}, false, al, "al r0 sp 0x2ec", "al_r0_sp_0x2ec"},
283 {{al, r0, sp, 0x2f0}, false, al, "al r0 sp 0x2f0", "al_r0_sp_0x2f0"},
284 {{al, r0, sp, 0x2f4}, false, al, "al r0 sp 0x2f4", "al_r0_sp_0x2f4"},
285 {{al, r0, sp, 0x2f8}, false, al, "al r0 sp 0x2f8", "al_r0_sp_0x2f8"},
286 {{al, r0, sp, 0x2fc}, false, al, "al r0 sp 0x2fc", "al_r0_sp_0x2fc"},
287 {{al, r0, sp, 0x300}, false, al, "al r0 sp 0x300", "al_r0_sp_0x300"},
288 {{al, r0, sp, 0x304}, false, al, "al r0 sp 0x304", "al_r0_sp_0x304"},
289 {{al, r0, sp, 0x308}, false, al, "al r0 sp 0x308", "al_r0_sp_0x308"},
290 {{al, r0, sp, 0x30c}, false, al, "al r0 sp 0x30c", "al_r0_sp_0x30c"},
291 {{al, r0, sp, 0x310}, false, al, "al r0 sp 0x310", "al_r0_sp_0x310"},
292 {{al, r0, sp, 0x314}, false, al, "al r0 sp 0x314", "al_r0_sp_0x314"},
293 {{al, r0, sp, 0x318}, false, al, "al r0 sp 0x318", "al_r0_sp_0x318"},
294 {{al, r0, sp, 0x31c}, false, al, "al r0 sp 0x31c", "al_r0_sp_0x31c"},
295 {{al, r0, sp, 0x320}, false, al, "al r0 sp 0x320", "al_r0_sp_0x320"},
296 {{al, r0, sp, 0x324}, false, al, "al r0 sp 0x324", "al_r0_sp_0x324"},
297 {{al, r0, sp, 0x328}, false, al, "al r0 sp 0x328", "al_r0_sp_0x328"},
298 {{al, r0, sp, 0x32c}, false, al, "al r0 sp 0x32c", "al_r0_sp_0x32c"},
299 {{al, r0, sp, 0x330}, false, al, "al r0 sp 0x330", "al_r0_sp_0x330"},
300 {{al, r0, sp, 0x334}, false, al, "al r0 sp 0x334", "al_r0_sp_0x334"},
301 {{al, r0, sp, 0x338}, false, al, "al r0 sp 0x338", "al_r0_sp_0x338"},
302 {{al, r0, sp, 0x33c}, false, al, "al r0 sp 0x33c", "al_r0_sp_0x33c"},
303 {{al, r0, sp, 0x340}, false, al, "al r0 sp 0x340", "al_r0_sp_0x340"},
304 {{al, r0, sp, 0x344}, false, al, "al r0 sp 0x344", "al_r0_sp_0x344"},
305 {{al, r0, sp, 0x348}, false, al, "al r0 sp 0x348", "al_r0_sp_0x348"},
306 {{al, r0, sp, 0x34c}, false, al, "al r0 sp 0x34c", "al_r0_sp_0x34c"},
307 {{al, r0, sp, 0x350}, false, al, "al r0 sp 0x350", "al_r0_sp_0x350"},
308 {{al, r0, sp, 0x354}, false, al, "al r0 sp 0x354", "al_r0_sp_0x354"},
309 {{al, r0, sp, 0x358}, false, al, "al r0 sp 0x358", "al_r0_sp_0x358"},
310 {{al, r0, sp, 0x35c}, false, al, "al r0 sp 0x35c", "al_r0_sp_0x35c"},
311 {{al, r0, sp, 0x360}, false, al, "al r0 sp 0x360", "al_r0_sp_0x360"},
312 {{al, r0, sp, 0x364}, false, al, "al r0 sp 0x364", "al_r0_sp_0x364"},
313 {{al, r0, sp, 0x368}, false, al, "al r0 sp 0x368", "al_r0_sp_0x368"},
314 {{al, r0, sp, 0x36c}, false, al, "al r0 sp 0x36c", "al_r0_sp_0x36c"},
315 {{al, r0, sp, 0x370}, false, al, "al r0 sp 0x370", "al_r0_sp_0x370"},
316 {{al, r0, sp, 0x374}, false, al, "al r0 sp 0x374", "al_r0_sp_0x374"},
317 {{al, r0, sp, 0x378}, false, al, "al r0 sp 0x378", "al_r0_sp_0x378"},
318 {{al, r0, sp, 0x37c}, false, al, "al r0 sp 0x37c", "al_r0_sp_0x37c"},
319 {{al, r0, sp, 0x380}, false, al, "al r0 sp 0x380", "al_r0_sp_0x380"},
320 {{al, r0, sp, 0x384}, false, al, "al r0 sp 0x384", "al_r0_sp_0x384"},
321 {{al, r0, sp, 0x388}, false, al, "al r0 sp 0x388", "al_r0_sp_0x388"},
322 {{al, r0, sp, 0x38c}, false, al, "al r0 sp 0x38c", "al_r0_sp_0x38c"},
323 {{al, r0, sp, 0x390}, false, al, "al r0 sp 0x390", "al_r0_sp_0x390"},
324 {{al, r0, sp, 0x394}, false, al, "al r0 sp 0x394", "al_r0_sp_0x394"},
325 {{al, r0, sp, 0x398}, false, al, "al r0 sp 0x398", "al_r0_sp_0x398"},
326 {{al, r0, sp, 0x39c}, false, al, "al r0 sp 0x39c", "al_r0_sp_0x39c"},
327 {{al, r0, sp, 0x3a0}, false, al, "al r0 sp 0x3a0", "al_r0_sp_0x3a0"},
328 {{al, r0, sp, 0x3a4}, false, al, "al r0 sp 0x3a4", "al_r0_sp_0x3a4"},
329 {{al, r0, sp, 0x3a8}, false, al, "al r0 sp 0x3a8", "al_r0_sp_0x3a8"},
330 {{al, r0, sp, 0x3ac}, false, al, "al r0 sp 0x3ac", "al_r0_sp_0x3ac"},
331 {{al, r0, sp, 0x3b0}, false, al, "al r0 sp 0x3b0", "al_r0_sp_0x3b0"},
332 {{al, r0, sp, 0x3b4}, false, al, "al r0 sp 0x3b4", "al_r0_sp_0x3b4"},
333 {{al, r0, sp, 0x3b8}, false, al, "al r0 sp 0x3b8", "al_r0_sp_0x3b8"},
334 {{al, r0, sp, 0x3bc}, false, al, "al r0 sp 0x3bc", "al_r0_sp_0x3bc"},
335 {{al, r0, sp, 0x3c0}, false, al, "al r0 sp 0x3c0", "al_r0_sp_0x3c0"},
336 {{al, r0, sp, 0x3c4}, false, al, "al r0 sp 0x3c4", "al_r0_sp_0x3c4"},
337 {{al, r0, sp, 0x3c8}, false, al, "al r0 sp 0x3c8", "al_r0_sp_0x3c8"},
338 {{al, r0, sp, 0x3cc}, false, al, "al r0 sp 0x3cc", "al_r0_sp_0x3cc"},
339 {{al, r0, sp, 0x3d0}, false, al, "al r0 sp 0x3d0", "al_r0_sp_0x3d0"},
340 {{al, r0, sp, 0x3d4}, false, al, "al r0 sp 0x3d4", "al_r0_sp_0x3d4"},
341 {{al, r0, sp, 0x3d8}, false, al, "al r0 sp 0x3d8", "al_r0_sp_0x3d8"},
342 {{al, r0, sp, 0x3dc}, false, al, "al r0 sp 0x3dc", "al_r0_sp_0x3dc"},
343 {{al, r0, sp, 0x3e0}, false, al, "al r0 sp 0x3e0", "al_r0_sp_0x3e0"},
344 {{al, r0, sp, 0x3e4}, false, al, "al r0 sp 0x3e4", "al_r0_sp_0x3e4"},
345 {{al, r0, sp, 0x3e8}, false, al, "al r0 sp 0x3e8", "al_r0_sp_0x3e8"},
346 {{al, r0, sp, 0x3ec}, false, al, "al r0 sp 0x3ec", "al_r0_sp_0x3ec"},
347 {{al, r0, sp, 0x3f0}, false, al, "al r0 sp 0x3f0", "al_r0_sp_0x3f0"},
348 {{al, r0, sp, 0x3f4}, false, al, "al r0 sp 0x3f4", "al_r0_sp_0x3f4"},
349 {{al, r0, sp, 0x3f8}, false, al, "al r0 sp 0x3f8", "al_r0_sp_0x3f8"},
350 {{al, r0, sp, 0x3fc}, false, al, "al r0 sp 0x3fc", "al_r0_sp_0x3fc"}};
351
352 // These headers each contain an array of `TestResult` with the reference output
353 // values. The reference arrays are names `kReference{mnemonic}`.
354 #include "aarch32/traces/assembler-cond-rd-sp-operand-imm8-add-t32.h"
355
356
357 // The maximum number of errors to report in detail for each test.
358 const unsigned kErrorReportLimit = 8;
359
360 typedef void (MacroAssembler::*Fn)(Condition cond,
361 Register rd,
362 Register rn,
363 const Operand& op);
364
TestHelper(Fn instruction,const char * mnemonic,const TestResult reference[])365 void TestHelper(Fn instruction,
366 const char* mnemonic,
367 const TestResult reference[]) {
368 unsigned total_error_count = 0;
369 MacroAssembler masm(BUF_SIZE);
370
371 masm.UseT32();
372
373 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
374 // Values to pass to the macro-assembler.
375 Condition cond = kTests[i].operands.cond;
376 Register rd = kTests[i].operands.rd;
377 Register rn = kTests[i].operands.rn;
378 uint32_t immediate = kTests[i].operands.immediate;
379 Operand op(immediate);
380
381 int32_t start = masm.GetCursorOffset();
382 {
383 // We never generate more that 4 bytes, as IT instructions are only
384 // allowed for narrow encodings.
385 ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize);
386 if (kTests[i].in_it_block) {
387 masm.it(kTests[i].it_condition);
388 }
389 (masm.*instruction)(cond, rd, rn, op);
390 }
391 int32_t end = masm.GetCursorOffset();
392
393 const byte* result_ptr =
394 masm.GetBuffer()->GetOffsetAddress<const byte*>(start);
395 VIXL_ASSERT(start < end);
396 uint32_t result_size = end - start;
397
398 if (Test::generate_test_trace()) {
399 // Print the result bytes.
400 printf("const byte kInstruction_%s_%s[] = {\n",
401 mnemonic,
402 kTests[i].identifier);
403 for (uint32_t j = 0; j < result_size; j++) {
404 if (j == 0) {
405 printf(" 0x%02" PRIx8, result_ptr[j]);
406 } else {
407 printf(", 0x%02" PRIx8, result_ptr[j]);
408 }
409 }
410 // This comment is meant to be used by external tools to validate
411 // the encoding. We can parse the comment to figure out what
412 // instruction this corresponds to.
413 if (kTests[i].in_it_block) {
414 printf(" // It %s; %s %s\n};\n",
415 kTests[i].it_condition.GetName(),
416 mnemonic,
417 kTests[i].operands_description);
418 } else {
419 printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description);
420 }
421 } else {
422 // Check we've emitted the exact same encoding as present in the
423 // trace file. Only print up to `kErrorReportLimit` errors.
424 if (((result_size != reference[i].size) ||
425 (memcmp(result_ptr, reference[i].encoding, reference[i].size) !=
426 0)) &&
427 (++total_error_count <= kErrorReportLimit)) {
428 printf("Error when testing \"%s\" with operands \"%s\":\n",
429 mnemonic,
430 kTests[i].operands_description);
431 printf(" Expected: ");
432 for (uint32_t j = 0; j < reference[i].size; j++) {
433 if (j == 0) {
434 printf("0x%02" PRIx8, reference[i].encoding[j]);
435 } else {
436 printf(", 0x%02" PRIx8, reference[i].encoding[j]);
437 }
438 }
439 printf("\n");
440 printf(" Found: ");
441 for (uint32_t j = 0; j < result_size; j++) {
442 if (j == 0) {
443 printf("0x%02" PRIx8, result_ptr[j]);
444 } else {
445 printf(", 0x%02" PRIx8, result_ptr[j]);
446 }
447 }
448 printf("\n");
449 }
450 }
451 }
452
453 masm.FinalizeCode();
454
455 if (Test::generate_test_trace()) {
456 // Finalize the trace file by writing the final `TestResult` array
457 // which links all generated instruction encodings.
458 printf("const TestResult kReference%s[] = {\n", mnemonic);
459 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
460 printf(" {\n");
461 printf(" ARRAY_SIZE(kInstruction_%s_%s),\n",
462 mnemonic,
463 kTests[i].identifier);
464 printf(" kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier);
465 printf(" },\n");
466 }
467 printf("};\n");
468 } else {
469 if (total_error_count > kErrorReportLimit) {
470 printf("%u other errors follow.\n",
471 total_error_count - kErrorReportLimit);
472 }
473 // Crash if the test failed.
474 VIXL_CHECK(total_error_count == 0);
475 }
476 }
477
478 // Instantiate tests for each instruction in the list.
479 #define TEST(mnemonic) \
480 void Test_##mnemonic() { \
481 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
482 } \
483 Test test_##mnemonic("AARCH32_ASSEMBLER_COND_RD_SP_OPERAND_IMM8_" #mnemonic \
484 "_T32", \
485 &Test_##mnemonic);
486 FOREACH_INSTRUCTION(TEST)
487 #undef TEST
488
489 } // namespace
490 #endif
491
492 } // namespace aarch32
493 } // namespace vixl
494