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1 #ifndef __UAPI_LINUX_MSM_CAMSENSOR_SDK_H
2 #define __UAPI_LINUX_MSM_CAMSENSOR_SDK_H
3 
4 #include <linux/videodev2.h>
5 
6 #define KVERSION 0x1
7 
8 #define MAX_POWER_CONFIG      12
9 #define GPIO_OUT_LOW          (0 << 1)
10 #define GPIO_OUT_HIGH         (1 << 1)
11 #define CSI_EMBED_DATA        0x12
12 #define CSI_RESERVED_DATA_0   0x13
13 #define CSI_YUV422_8          0x1E
14 #define CSI_RAW8              0x2A
15 #define CSI_RAW10             0x2B
16 #define CSI_RAW12             0x2C
17 #define CSI_DECODE_6BIT         0
18 #define CSI_DECODE_8BIT         1
19 #define CSI_DECODE_10BIT        2
20 #define CSI_DECODE_12BIT        3
21 #define CSI_DECODE_DPCM_10_6_10 4
22 #define CSI_DECODE_DPCM_10_8_10 5
23 #define MAX_CID                 16
24 #define I2C_SEQ_REG_DATA_MAX    1024
25 #define I2C_REG_DATA_MAX       (8*1024)
26 
27 #define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */
28 #define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
29 	/* 14  BGBG.. GRGR.. */
30 #define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
31 	/* 14  GBGB.. RGRG.. */
32 #define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
33 	/* 14  GRGR.. BGBG.. */
34 #define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
35 	/* 14  RGRG.. GBGB.. */
36 
37 #define MAX_ACTUATOR_REG_TBL_SIZE 8
38 #define MAX_ACTUATOR_REGION       5
39 #define NUM_ACTUATOR_DIR          2
40 #define MAX_ACTUATOR_SCENARIO     8
41 #define MAX_ACT_MOD_NAME_SIZE     32
42 #define MAX_ACT_NAME_SIZE         32
43 #define MAX_ACTUATOR_INIT_SET     120
44 #define MAX_I2C_REG_SET           12
45 
46 #define MAX_LED_TRIGGERS          3
47 
48 #define MSM_EEPROM_MEMORY_MAP_MAX_SIZE  80
49 #define MSM_EEPROM_MAX_MEM_MAP_CNT      20
50 
51 enum msm_sensor_camera_id_t {
52 	CAMERA_0,
53 	CAMERA_1,
54 	CAMERA_2,
55 	CAMERA_3,
56 	MAX_CAMERAS,
57 };
58 
59 enum i2c_freq_mode_t {
60 	I2C_STANDARD_MODE,
61 	I2C_FAST_MODE,
62 	I2C_CUSTOM_MODE,
63 	I2C_FAST_PLUS_MODE,
64 	I2C_MAX_MODES,
65 };
66 
67 enum camb_position_t {
68 	BACK_CAMERA_B,
69 	FRONT_CAMERA_B,
70 	AUX_CAMERA_B = 0x100,
71 	INVALID_CAMERA_B,
72 };
73 
74 enum msm_sensor_power_seq_type_t {
75 	SENSOR_CLK,
76 	SENSOR_GPIO,
77 	SENSOR_VREG,
78 	SENSOR_I2C_MUX,
79 	SENSOR_I2C,
80 };
81 
82 enum msm_camera_i2c_reg_addr_type {
83 	MSM_CAMERA_I2C_BYTE_ADDR = 1,
84 	MSM_CAMERA_I2C_WORD_ADDR,
85 	MSM_CAMERA_I2C_3B_ADDR,
86 	MSM_CAMERA_I2C_ADDR_TYPE_MAX,
87 };
88 
89 enum msm_camera_i2c_data_type {
90 	MSM_CAMERA_I2C_BYTE_DATA = 1,
91 	MSM_CAMERA_I2C_WORD_DATA,
92 	MSM_CAMERA_I2C_DWORD_DATA,
93 	MSM_CAMERA_I2C_SET_BYTE_MASK,
94 	MSM_CAMERA_I2C_UNSET_BYTE_MASK,
95 	MSM_CAMERA_I2C_SET_WORD_MASK,
96 	MSM_CAMERA_I2C_UNSET_WORD_MASK,
97 	MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
98 	MSM_CAMERA_I2C_DATA_TYPE_MAX,
99 };
100 
101 enum msm_sensor_power_seq_gpio_t {
102 	SENSOR_GPIO_RESET,
103 	SENSOR_GPIO_STANDBY,
104 	SENSOR_GPIO_AF_PWDM,
105 	SENSOR_GPIO_VIO,
106 	SENSOR_GPIO_VANA,
107 	SENSOR_GPIO_VDIG,
108 	SENSOR_GPIO_VAF,
109 	SENSOR_GPIO_FL_EN,
110 	SENSOR_GPIO_FL_NOW,
111 	SENSOR_GPIO_FL_RESET,
112 	SENSOR_GPIO_CUSTOM1,
113 	SENSOR_GPIO_CUSTOM2,
114 	SENSOR_GPIO_MAX,
115 };
116 
117 enum msm_ir_cut_filter_gpio_t {
118 	IR_CUT_FILTER_GPIO_P = 0,
119 	IR_CUT_FILTER_GPIO_M,
120 	IR_CUT_FILTER_GPIO_MAX,
121 };
122 #define IR_CUT_FILTER_GPIO_P IR_CUT_FILTER_GPIO_P
123 #define IR_CUT_FILTER_GPIO_M IR_CUT_FILTER_GPIO_M
124 #define R_CUT_FILTER_GPIO_MAX IR_CUT_FILTER_GPIO_MAX
125 
126 enum msm_camera_vreg_name_t {
127 	CAM_VDIG,
128 	CAM_VIO,
129 	CAM_VANA,
130 	CAM_VAF,
131 	CAM_V_CUSTOM1,
132 	CAM_V_CUSTOM2,
133 	CAM_VREG_MAX,
134 };
135 
136 enum msm_sensor_clk_type_t {
137 	SENSOR_CAM_MCLK,
138 	SENSOR_CAM_CLK,
139 	SENSOR_CAM_CLK_MAX,
140 };
141 
142 enum camerab_mode_t {
143 	CAMERA_MODE_2D_B = (1<<0),
144 	CAMERA_MODE_3D_B = (1<<1),
145 	CAMERA_MODE_INVALID = (1<<2),
146 };
147 
148 enum msm_actuator_data_type {
149 	MSM_ACTUATOR_BYTE_DATA = 1,
150 	MSM_ACTUATOR_WORD_DATA,
151 };
152 
153 enum msm_actuator_addr_type {
154 	MSM_ACTUATOR_BYTE_ADDR = 1,
155 	MSM_ACTUATOR_WORD_ADDR,
156 };
157 
158 enum msm_actuator_write_type {
159 	MSM_ACTUATOR_WRITE_HW_DAMP,
160 	MSM_ACTUATOR_WRITE_DAC,
161 	MSM_ACTUATOR_WRITE,
162 	MSM_ACTUATOR_WRITE_DIR_REG,
163 	MSM_ACTUATOR_POLL,
164 	MSM_ACTUATOR_READ_WRITE,
165 };
166 
167 enum msm_actuator_i2c_operation {
168 	MSM_ACT_WRITE = 0,
169 	MSM_ACT_POLL,
170 };
171 
172 enum actuator_type {
173 	ACTUATOR_VCM,
174 	ACTUATOR_PIEZO,
175 	ACTUATOR_HVCM,
176 	ACTUATOR_BIVCM,
177 };
178 
179 enum msm_flash_driver_type {
180 	FLASH_DRIVER_PMIC,
181 	FLASH_DRIVER_I2C,
182 	FLASH_DRIVER_GPIO,
183 	FLASH_DRIVER_DEFAULT
184 };
185 
186 enum msm_flash_cfg_type_t {
187 	CFG_FLASH_INIT,
188 	CFG_FLASH_RELEASE,
189 	CFG_FLASH_OFF,
190 	CFG_FLASH_LOW,
191 	CFG_FLASH_HIGH,
192 };
193 
194 enum msm_ir_led_cfg_type_t {
195 	CFG_IR_LED_INIT = 0,
196 	CFG_IR_LED_RELEASE,
197 	CFG_IR_LED_OFF,
198 	CFG_IR_LED_ON,
199 };
200 #define CFG_IR_LED_INIT CFG_IR_LED_INIT
201 #define CFG_IR_LED_RELEASE CFG_IR_LED_RELEASE
202 #define CFG_IR_LED_OFF CFG_IR_LED_OFF
203 #define CFG_IR_LED_ON CFG_IR_LED_ON
204 
205 enum msm_ir_cut_cfg_type_t {
206 	CFG_IR_CUT_INIT = 0,
207 	CFG_IR_CUT_RELEASE,
208 	CFG_IR_CUT_OFF,
209 	CFG_IR_CUT_ON,
210 };
211 #define CFG_IR_CUT_INIT CFG_IR_CUT_INIT
212 #define CFG_IR_CUT_RELEASE CFG_IR_CUT_RELEASE
213 #define CFG_IR_CUT_OFF CFG_IR_CUT_OFF
214 #define CFG_IR_CUT_ON CFG_IR_CUT_ON
215 
216 enum msm_sensor_output_format_t {
217 	MSM_SENSOR_BAYER,
218 	MSM_SENSOR_YCBCR,
219 	MSM_SENSOR_META,
220 };
221 
222 struct msm_sensor_power_setting {
223 	enum msm_sensor_power_seq_type_t seq_type;
224 	unsigned short seq_val;
225 	long config_val;
226 	unsigned short delay;
227 	void *data[10];
228 };
229 
230 struct msm_sensor_power_setting_array {
231 	struct msm_sensor_power_setting  power_setting_a[MAX_POWER_CONFIG];
232 	struct msm_sensor_power_setting *power_setting;
233 	unsigned short size;
234 	struct msm_sensor_power_setting  power_down_setting_a[MAX_POWER_CONFIG];
235 	struct msm_sensor_power_setting *power_down_setting;
236 	unsigned short size_down;
237 };
238 
239 enum msm_camera_i2c_operation {
240 	MSM_CAM_WRITE = 0,
241 	MSM_CAM_POLL,
242 	MSM_CAM_READ,
243 };
244 
245 struct msm_sensor_i2c_sync_params {
246 	unsigned int cid;
247 	int csid;
248 	unsigned short line;
249 	unsigned short delay;
250 };
251 
252 struct msm_camera_reg_settings_t {
253 	uint16_t reg_addr;
254 	enum msm_camera_i2c_reg_addr_type addr_type;
255 	uint16_t reg_data;
256 	enum msm_camera_i2c_data_type data_type;
257 	enum msm_camera_i2c_operation i2c_operation;
258 	uint16_t delay;
259 };
260 
261 struct msm_eeprom_mem_map_t {
262 	int slave_addr;
263 	struct msm_camera_reg_settings_t
264 		mem_settings[MSM_EEPROM_MEMORY_MAP_MAX_SIZE];
265 	int memory_map_size;
266 };
267 
268 struct msm_eeprom_memory_map_array {
269 	struct msm_eeprom_mem_map_t memory_map[MSM_EEPROM_MAX_MEM_MAP_CNT];
270 	uint32_t msm_size_of_max_mappings;
271 };
272 
273 struct msm_sensor_init_params {
274 	/* mask of modes supported: 2D, 3D */
275 	int                 modes_supported;
276 	/* sensor position: front, back */
277 	enum camb_position_t position;
278 	/* sensor mount angle */
279 	unsigned int            sensor_mount_angle;
280 };
281 
282 struct msm_sensor_id_info_t {
283 	unsigned short sensor_id_reg_addr;
284 	unsigned short sensor_id;
285 	unsigned short sensor_id_mask;
286 };
287 
288 struct msm_camera_sensor_slave_info {
289 	char sensor_name[32];
290 	char eeprom_name[32];
291 	char actuator_name[32];
292 	char ois_name[32];
293 	char flash_name[32];
294 	enum msm_sensor_camera_id_t camera_id;
295 	unsigned short slave_addr;
296 	enum i2c_freq_mode_t i2c_freq_mode;
297 	enum msm_camera_i2c_reg_addr_type addr_type;
298 	struct msm_sensor_id_info_t sensor_id_info;
299 	struct msm_sensor_power_setting_array power_setting_array;
300 	unsigned char  is_init_params_valid;
301 	struct msm_sensor_init_params sensor_init_params;
302 	enum msm_sensor_output_format_t output_format;
303 };
304 
305 struct msm_camera_i2c_reg_array {
306 	unsigned short reg_addr;
307 	unsigned short reg_data;
308 	unsigned int delay;
309 };
310 
311 struct msm_camera_i2c_reg_setting {
312 	struct msm_camera_i2c_reg_array *reg_setting;
313 	unsigned short size;
314 	enum msm_camera_i2c_reg_addr_type addr_type;
315 	enum msm_camera_i2c_data_type data_type;
316 	unsigned short delay;
317 };
318 
319 struct msm_camera_csid_vc_cfg {
320 	unsigned char cid;
321 	unsigned char dt;
322 	unsigned char decode_format;
323 };
324 
325 struct msm_camera_csid_lut_params {
326 	unsigned char num_cid;
327 	struct msm_camera_csid_vc_cfg vc_cfg_a[MAX_CID];
328 	struct msm_camera_csid_vc_cfg *vc_cfg[MAX_CID];
329 };
330 
331 struct msm_camera_csid_params {
332 	unsigned char lane_cnt;
333 	unsigned short lane_assign;
334 	unsigned char phy_sel;
335 	unsigned int csi_clk;
336 	struct msm_camera_csid_lut_params lut_params;
337 	unsigned char csi_3p_sel;
338 };
339 
340 struct msm_camera_csid_testmode_parms {
341 	unsigned int num_bytes_per_line;
342 	unsigned int num_lines;
343 	unsigned int h_blanking_count;
344 	unsigned int v_blanking_count;
345 	unsigned int payload_mode;
346 };
347 
348 struct msm_camera_csiphy_params {
349 	unsigned char lane_cnt;
350 	unsigned char settle_cnt;
351 	unsigned short lane_mask;
352 	unsigned char combo_mode;
353 	unsigned char csid_core;
354 	unsigned int csiphy_clk;
355 	unsigned char csi_3phase;
356 };
357 
358 struct msm_camera_i2c_seq_reg_array {
359 	unsigned short reg_addr;
360 	unsigned char reg_data[I2C_SEQ_REG_DATA_MAX];
361 	unsigned short reg_data_size;
362 };
363 
364 struct msm_camera_i2c_seq_reg_setting {
365 	struct msm_camera_i2c_seq_reg_array *reg_setting;
366 	unsigned short size;
367 	enum msm_camera_i2c_reg_addr_type addr_type;
368 	unsigned short delay;
369 };
370 
371 struct msm_actuator_reg_params_t {
372 	enum msm_actuator_write_type reg_write_type;
373 	unsigned int hw_mask;
374 	unsigned short reg_addr;
375 	unsigned short hw_shift;
376 	unsigned short data_shift;
377 	unsigned short data_type;
378 	unsigned short addr_type;
379 	unsigned short reg_data;
380 	unsigned short delay;
381 };
382 
383 
384 struct damping_params_t {
385 	unsigned int damping_step;
386 	unsigned int damping_delay;
387 	unsigned int hw_params;
388 };
389 
390 struct region_params_t {
391 	/* [0] = ForwardDirection Macro boundary
392 	   [1] = ReverseDirection Inf boundary
393 	*/
394 	unsigned short step_bound[2];
395 	unsigned short code_per_step;
396 	/* qvalue for converting float type numbers to integer format */
397 	unsigned int qvalue;
398 };
399 
400 struct reg_settings_t {
401 	unsigned short reg_addr;
402 	enum msm_camera_i2c_reg_addr_type addr_type;
403 	unsigned short reg_data;
404 	enum msm_camera_i2c_data_type data_type;
405 	enum msm_actuator_i2c_operation i2c_operation;
406 	unsigned int delay;
407 };
408 
409 struct msm_camera_i2c_reg_setting_array {
410 	struct msm_camera_i2c_reg_array reg_setting_a[MAX_I2C_REG_SET];
411 	unsigned short size;
412 	enum msm_camera_i2c_reg_addr_type addr_type;
413 	enum msm_camera_i2c_data_type data_type;
414 	unsigned short delay;
415 };
416 
417 #endif
418