1 /*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include <elf.h>
18
19 #include <gtest/gtest.h>
20
21 #include <vector>
22
23 #include <unwindstack/MachineArm.h>
24 #include <unwindstack/RegsArm.h>
25
26 #include "ElfInterfaceArm.h"
27
28 #include "ElfFake.h"
29 #include "MemoryFake.h"
30
31 namespace unwindstack {
32
33 class ElfInterfaceArmTest : public ::testing::Test {
34 protected:
SetUp()35 void SetUp() override {
36 memory_.Clear();
37 process_memory_.Clear();
38 }
39
40 MemoryFake memory_;
41 MemoryFake process_memory_;
42 };
43
TEST_F(ElfInterfaceArmTest,GetPrel32Addr)44 TEST_F(ElfInterfaceArmTest, GetPrel32Addr) {
45 ElfInterfaceArmFake interface(&memory_);
46 memory_.SetData32(0x1000, 0x230000);
47
48 uint32_t value;
49 ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
50 ASSERT_EQ(0x231000U, value);
51
52 memory_.SetData32(0x1000, 0x80001000);
53 ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
54 ASSERT_EQ(0x2000U, value);
55
56 memory_.SetData32(0x1000, 0x70001000);
57 ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
58 ASSERT_EQ(0xf0002000U, value);
59 }
60
TEST_F(ElfInterfaceArmTest,FindEntry_start_zero)61 TEST_F(ElfInterfaceArmTest, FindEntry_start_zero) {
62 ElfInterfaceArmFake interface(&memory_);
63 interface.FakeSetStartOffset(0);
64 interface.FakeSetTotalEntries(10);
65
66 uint64_t entry_offset;
67 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
68 }
69
TEST_F(ElfInterfaceArmTest,FindEntry_no_entries)70 TEST_F(ElfInterfaceArmTest, FindEntry_no_entries) {
71 ElfInterfaceArmFake interface(&memory_);
72 interface.FakeSetStartOffset(0x100);
73 interface.FakeSetTotalEntries(0);
74
75 uint64_t entry_offset;
76 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
77 }
78
TEST_F(ElfInterfaceArmTest,FindEntry_no_valid_memory)79 TEST_F(ElfInterfaceArmTest, FindEntry_no_valid_memory) {
80 ElfInterfaceArmFake interface(&memory_);
81 interface.FakeSetStartOffset(0x100);
82 interface.FakeSetTotalEntries(2);
83
84 uint64_t entry_offset;
85 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
86 }
87
TEST_F(ElfInterfaceArmTest,FindEntry_ip_before_first)88 TEST_F(ElfInterfaceArmTest, FindEntry_ip_before_first) {
89 ElfInterfaceArmFake interface(&memory_);
90 interface.FakeSetStartOffset(0x1000);
91 interface.FakeSetTotalEntries(1);
92 memory_.SetData32(0x1000, 0x6000);
93
94 uint64_t entry_offset;
95 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
96 }
97
TEST_F(ElfInterfaceArmTest,FindEntry_single_entry_negative_value)98 TEST_F(ElfInterfaceArmTest, FindEntry_single_entry_negative_value) {
99 ElfInterfaceArmFake interface(&memory_);
100 interface.FakeSetStartOffset(0x8000);
101 interface.FakeSetTotalEntries(1);
102 memory_.SetData32(0x8000, 0x7fffff00);
103
104 uint64_t entry_offset;
105 ASSERT_TRUE(interface.FindEntry(0x7ff0, &entry_offset));
106 ASSERT_EQ(0x8000U, entry_offset);
107 }
108
TEST_F(ElfInterfaceArmTest,FindEntry_two_entries)109 TEST_F(ElfInterfaceArmTest, FindEntry_two_entries) {
110 ElfInterfaceArmFake interface(&memory_);
111 interface.FakeSetStartOffset(0x1000);
112 interface.FakeSetTotalEntries(2);
113 memory_.SetData32(0x1000, 0x6000);
114 memory_.SetData32(0x1008, 0x7000);
115
116 uint64_t entry_offset;
117 ASSERT_TRUE(interface.FindEntry(0x7000, &entry_offset));
118 ASSERT_EQ(0x1000U, entry_offset);
119 }
120
TEST_F(ElfInterfaceArmTest,FindEntry_last_check_single_entry)121 TEST_F(ElfInterfaceArmTest, FindEntry_last_check_single_entry) {
122 ElfInterfaceArmFake interface(&memory_);
123 interface.FakeSetStartOffset(0x1000);
124 interface.FakeSetTotalEntries(1);
125 memory_.SetData32(0x1000, 0x6000);
126
127 uint64_t entry_offset;
128 ASSERT_TRUE(interface.FindEntry(0x7000, &entry_offset));
129 ASSERT_EQ(0x1000U, entry_offset);
130
131 // To guarantee that we are using the cache on the second run,
132 // set the memory to a different value.
133 memory_.SetData32(0x1000, 0x8000);
134 ASSERT_TRUE(interface.FindEntry(0x7004, &entry_offset));
135 ASSERT_EQ(0x1000U, entry_offset);
136 }
137
TEST_F(ElfInterfaceArmTest,FindEntry_last_check_multiple_entries)138 TEST_F(ElfInterfaceArmTest, FindEntry_last_check_multiple_entries) {
139 ElfInterfaceArmFake interface(&memory_);
140 interface.FakeSetStartOffset(0x1000);
141 interface.FakeSetTotalEntries(2);
142 memory_.SetData32(0x1000, 0x6000);
143 memory_.SetData32(0x1008, 0x8000);
144
145 uint64_t entry_offset;
146 ASSERT_TRUE(interface.FindEntry(0x9008, &entry_offset));
147 ASSERT_EQ(0x1008U, entry_offset);
148
149 // To guarantee that we are using the cache on the second run,
150 // set the memory to a different value.
151 memory_.SetData32(0x1000, 0x16000);
152 memory_.SetData32(0x1008, 0x18000);
153 ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
154 ASSERT_EQ(0x1008U, entry_offset);
155 }
156
TEST_F(ElfInterfaceArmTest,FindEntry_multiple_entries_even)157 TEST_F(ElfInterfaceArmTest, FindEntry_multiple_entries_even) {
158 ElfInterfaceArmFake interface(&memory_);
159 interface.FakeSetStartOffset(0x1000);
160 interface.FakeSetTotalEntries(4);
161 memory_.SetData32(0x1000, 0x6000);
162 memory_.SetData32(0x1008, 0x7000);
163 memory_.SetData32(0x1010, 0x8000);
164 memory_.SetData32(0x1018, 0x9000);
165
166 uint64_t entry_offset;
167 ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
168 ASSERT_EQ(0x1010U, entry_offset);
169
170 // To guarantee that we are using the cache on the second run,
171 // set the memory to a different value.
172 memory_.SetData32(0x1000, 0x16000);
173 memory_.SetData32(0x1008, 0x17000);
174 memory_.SetData32(0x1010, 0x18000);
175 memory_.SetData32(0x1018, 0x19000);
176 ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
177 ASSERT_EQ(0x1010U, entry_offset);
178 }
179
TEST_F(ElfInterfaceArmTest,FindEntry_multiple_entries_odd)180 TEST_F(ElfInterfaceArmTest, FindEntry_multiple_entries_odd) {
181 ElfInterfaceArmFake interface(&memory_);
182 interface.FakeSetStartOffset(0x1000);
183 interface.FakeSetTotalEntries(5);
184 memory_.SetData32(0x1000, 0x5000);
185 memory_.SetData32(0x1008, 0x6000);
186 memory_.SetData32(0x1010, 0x7000);
187 memory_.SetData32(0x1018, 0x8000);
188 memory_.SetData32(0x1020, 0x9000);
189
190 uint64_t entry_offset;
191 ASSERT_TRUE(interface.FindEntry(0x8100, &entry_offset));
192 ASSERT_EQ(0x1010U, entry_offset);
193
194 // To guarantee that we are using the cache on the second run,
195 // set the memory to a different value.
196 memory_.SetData32(0x1000, 0x15000);
197 memory_.SetData32(0x1008, 0x16000);
198 memory_.SetData32(0x1010, 0x17000);
199 memory_.SetData32(0x1018, 0x18000);
200 memory_.SetData32(0x1020, 0x19000);
201 ASSERT_TRUE(interface.FindEntry(0x8100, &entry_offset));
202 ASSERT_EQ(0x1010U, entry_offset);
203 }
204
TEST_F(ElfInterfaceArmTest,iterate)205 TEST_F(ElfInterfaceArmTest, iterate) {
206 ElfInterfaceArmFake interface(&memory_);
207 interface.FakeSetStartOffset(0x1000);
208 interface.FakeSetTotalEntries(5);
209 memory_.SetData32(0x1000, 0x5000);
210 memory_.SetData32(0x1008, 0x6000);
211 memory_.SetData32(0x1010, 0x7000);
212 memory_.SetData32(0x1018, 0x8000);
213 memory_.SetData32(0x1020, 0x9000);
214
215 std::vector<uint32_t> entries;
216 for (auto addr : interface) {
217 entries.push_back(addr);
218 }
219 ASSERT_EQ(5U, entries.size());
220 ASSERT_EQ(0x6000U, entries[0]);
221 ASSERT_EQ(0x7008U, entries[1]);
222 ASSERT_EQ(0x8010U, entries[2]);
223 ASSERT_EQ(0x9018U, entries[3]);
224 ASSERT_EQ(0xa020U, entries[4]);
225
226 // Make sure the iterate cached the entries.
227 memory_.SetData32(0x1000, 0x11000);
228 memory_.SetData32(0x1008, 0x12000);
229 memory_.SetData32(0x1010, 0x13000);
230 memory_.SetData32(0x1018, 0x14000);
231 memory_.SetData32(0x1020, 0x15000);
232
233 entries.clear();
234 for (auto addr : interface) {
235 entries.push_back(addr);
236 }
237 ASSERT_EQ(5U, entries.size());
238 ASSERT_EQ(0x6000U, entries[0]);
239 ASSERT_EQ(0x7008U, entries[1]);
240 ASSERT_EQ(0x8010U, entries[2]);
241 ASSERT_EQ(0x9018U, entries[3]);
242 ASSERT_EQ(0xa020U, entries[4]);
243 }
244
TEST_F(ElfInterfaceArmTest,HandleType_not_arm_exidx)245 TEST_F(ElfInterfaceArmTest, HandleType_not_arm_exidx) {
246 ElfInterfaceArmFake interface(&memory_);
247
248 ASSERT_FALSE(interface.HandleType(0x1000, PT_NULL, 0));
249 ASSERT_FALSE(interface.HandleType(0x1000, PT_LOAD, 0));
250 ASSERT_FALSE(interface.HandleType(0x1000, PT_DYNAMIC, 0));
251 ASSERT_FALSE(interface.HandleType(0x1000, PT_INTERP, 0));
252 ASSERT_FALSE(interface.HandleType(0x1000, PT_NOTE, 0));
253 ASSERT_FALSE(interface.HandleType(0x1000, PT_SHLIB, 0));
254 ASSERT_FALSE(interface.HandleType(0x1000, PT_PHDR, 0));
255 ASSERT_FALSE(interface.HandleType(0x1000, PT_TLS, 0));
256 ASSERT_FALSE(interface.HandleType(0x1000, PT_LOOS, 0));
257 ASSERT_FALSE(interface.HandleType(0x1000, PT_HIOS, 0));
258 ASSERT_FALSE(interface.HandleType(0x1000, PT_LOPROC, 0));
259 ASSERT_FALSE(interface.HandleType(0x1000, PT_HIPROC, 0));
260 ASSERT_FALSE(interface.HandleType(0x1000, PT_GNU_EH_FRAME, 0));
261 ASSERT_FALSE(interface.HandleType(0x1000, PT_GNU_STACK, 0));
262 }
263
TEST_F(ElfInterfaceArmTest,HandleType_arm_exidx)264 TEST_F(ElfInterfaceArmTest, HandleType_arm_exidx) {
265 ElfInterfaceArmFake interface(&memory_);
266
267 Elf32_Phdr phdr;
268 interface.FakeSetStartOffset(0x1000);
269 interface.FakeSetTotalEntries(100);
270 phdr.p_vaddr = 0x2000;
271 phdr.p_memsz = 0xa00;
272
273 // Verify that if reads fail, we don't set the values but still get true.
274 ASSERT_TRUE(interface.HandleType(0x1000, 0x70000001, 0));
275 ASSERT_EQ(0x1000U, interface.start_offset());
276 ASSERT_EQ(100U, interface.total_entries());
277
278 // Verify that if the second read fails, we still don't set the values.
279 memory_.SetData32(
280 0x1000 + reinterpret_cast<uint64_t>(&phdr.p_vaddr) - reinterpret_cast<uint64_t>(&phdr),
281 phdr.p_vaddr);
282 ASSERT_TRUE(interface.HandleType(0x1000, 0x70000001, 0));
283 ASSERT_EQ(0x1000U, interface.start_offset());
284 ASSERT_EQ(100U, interface.total_entries());
285
286 // Everything is correct and present.
287 memory_.SetData32(
288 0x1000 + reinterpret_cast<uint64_t>(&phdr.p_memsz) - reinterpret_cast<uint64_t>(&phdr),
289 phdr.p_memsz);
290 ASSERT_TRUE(interface.HandleType(0x1000, 0x70000001, 0));
291 ASSERT_EQ(0x2000U, interface.start_offset());
292 ASSERT_EQ(320U, interface.total_entries());
293
294 // Non-zero load bias.
295 ASSERT_TRUE(interface.HandleType(0x1000, 0x70000001, 0x1000));
296 ASSERT_EQ(0x1000U, interface.start_offset());
297 ASSERT_EQ(320U, interface.total_entries());
298 }
299
TEST_F(ElfInterfaceArmTest,StepExidx)300 TEST_F(ElfInterfaceArmTest, StepExidx) {
301 ElfInterfaceArmFake interface(&memory_);
302
303 // FindEntry fails.
304 bool finished;
305 ASSERT_FALSE(interface.StepExidx(0x7000, 0, nullptr, nullptr, &finished));
306 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
307
308 // ExtractEntry should fail.
309 interface.FakeSetStartOffset(0x1000);
310 interface.FakeSetTotalEntries(2);
311 memory_.SetData32(0x1000, 0x6000);
312 memory_.SetData32(0x1008, 0x8000);
313
314 RegsArm regs;
315 regs[ARM_REG_SP] = 0x1000;
316 regs[ARM_REG_LR] = 0x20000;
317 regs.set_sp(regs[ARM_REG_SP]);
318 regs.set_pc(0x1234);
319 ASSERT_FALSE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
320 EXPECT_EQ(ERROR_MEMORY_INVALID, interface.LastErrorCode());
321 EXPECT_EQ(0x1004U, interface.LastErrorAddress());
322
323 // Eval should fail.
324 memory_.SetData32(0x1004, 0x81000000);
325 ASSERT_FALSE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
326 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
327
328 // Everything should pass.
329 memory_.SetData32(0x1004, 0x80b0b0b0);
330 ASSERT_TRUE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
331 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
332 ASSERT_FALSE(finished);
333 ASSERT_EQ(0x1000U, regs.sp());
334 ASSERT_EQ(0x1000U, regs[ARM_REG_SP]);
335 ASSERT_EQ(0x20000U, regs.pc());
336 ASSERT_EQ(0x20000U, regs[ARM_REG_PC]);
337
338 // Load bias is non-zero.
339 ASSERT_TRUE(interface.StepExidx(0x8000, 0x1000, ®s, &process_memory_, &finished));
340 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
341
342 // Pc too small.
343 ASSERT_FALSE(interface.StepExidx(0x8000, 0x9000, ®s, &process_memory_, &finished));
344 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
345 }
346
TEST_F(ElfInterfaceArmTest,StepExidx_pc_set)347 TEST_F(ElfInterfaceArmTest, StepExidx_pc_set) {
348 ElfInterfaceArmFake interface(&memory_);
349
350 interface.FakeSetStartOffset(0x1000);
351 interface.FakeSetTotalEntries(2);
352 memory_.SetData32(0x1000, 0x6000);
353 memory_.SetData32(0x1004, 0x808800b0);
354 memory_.SetData32(0x1008, 0x8000);
355 process_memory_.SetData32(0x10000, 0x10);
356
357 RegsArm regs;
358 regs[ARM_REG_SP] = 0x10000;
359 regs[ARM_REG_LR] = 0x20000;
360 regs.set_sp(regs[ARM_REG_SP]);
361 regs.set_pc(0x1234);
362
363 // Everything should pass.
364 bool finished;
365 ASSERT_TRUE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
366 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
367 ASSERT_FALSE(finished);
368 ASSERT_EQ(0x10004U, regs.sp());
369 ASSERT_EQ(0x10004U, regs[ARM_REG_SP]);
370 ASSERT_EQ(0x10U, regs.pc());
371 ASSERT_EQ(0x10U, regs[ARM_REG_PC]);
372 }
373
TEST_F(ElfInterfaceArmTest,StepExidx_cant_unwind)374 TEST_F(ElfInterfaceArmTest, StepExidx_cant_unwind) {
375 ElfInterfaceArmFake interface(&memory_);
376
377 interface.FakeSetStartOffset(0x1000);
378 interface.FakeSetTotalEntries(1);
379 memory_.SetData32(0x1000, 0x6000);
380 memory_.SetData32(0x1004, 1);
381
382 RegsArm regs;
383 regs[ARM_REG_SP] = 0x10000;
384 regs[ARM_REG_LR] = 0x20000;
385 regs.set_sp(regs[ARM_REG_SP]);
386 regs.set_pc(0x1234);
387
388 bool finished;
389 ASSERT_TRUE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
390 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
391 ASSERT_TRUE(finished);
392 ASSERT_EQ(0x10000U, regs.sp());
393 ASSERT_EQ(0x10000U, regs[ARM_REG_SP]);
394 ASSERT_EQ(0x1234U, regs.pc());
395 }
396
TEST_F(ElfInterfaceArmTest,StepExidx_refuse_unwind)397 TEST_F(ElfInterfaceArmTest, StepExidx_refuse_unwind) {
398 ElfInterfaceArmFake interface(&memory_);
399
400 interface.FakeSetStartOffset(0x1000);
401 interface.FakeSetTotalEntries(1);
402 memory_.SetData32(0x1000, 0x6000);
403 memory_.SetData32(0x1004, 0x808000b0);
404
405 RegsArm regs;
406 regs[ARM_REG_SP] = 0x10000;
407 regs[ARM_REG_LR] = 0x20000;
408 regs.set_sp(regs[ARM_REG_SP]);
409 regs.set_pc(0x1234);
410
411 bool finished;
412 ASSERT_TRUE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
413 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
414 ASSERT_TRUE(finished);
415 ASSERT_EQ(0x10000U, regs.sp());
416 ASSERT_EQ(0x10000U, regs[ARM_REG_SP]);
417 ASSERT_EQ(0x1234U, regs.pc());
418 }
419
TEST_F(ElfInterfaceArmTest,StepExidx_pc_zero)420 TEST_F(ElfInterfaceArmTest, StepExidx_pc_zero) {
421 ElfInterfaceArmFake interface(&memory_);
422
423 interface.FakeSetStartOffset(0x1000);
424 interface.FakeSetTotalEntries(1);
425 memory_.SetData32(0x1000, 0x6000);
426 // Set the pc using a pop r15 command.
427 memory_.SetData32(0x1004, 0x808800b0);
428
429 // pc value of zero.
430 process_memory_.SetData32(0x10000, 0);
431
432 RegsArm regs;
433 regs[ARM_REG_SP] = 0x10000;
434 regs[ARM_REG_LR] = 0x20000;
435 regs.set_sp(regs[ARM_REG_SP]);
436 regs.set_pc(0x1234);
437
438 bool finished;
439 ASSERT_TRUE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
440 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
441 ASSERT_TRUE(finished);
442 ASSERT_EQ(0U, regs.pc());
443
444 // Now set the pc from the lr register (pop r14).
445 memory_.SetData32(0x1004, 0x808400b0);
446
447 regs[ARM_REG_SP] = 0x10000;
448 regs[ARM_REG_LR] = 0x20000;
449 regs.set_sp(regs[ARM_REG_SP]);
450 regs.set_pc(0x1234);
451
452 ASSERT_TRUE(interface.StepExidx(0x7000, 0, ®s, &process_memory_, &finished));
453 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
454 ASSERT_TRUE(finished);
455 ASSERT_EQ(0U, regs.pc());
456 }
457
458 } // namespace unwindstack
459