Lines Matching refs:dcr_write
827 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x68782800); in ppc440speA_pciex_init_utl()
950 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0); in ppc460ex_pciex_init_utl()
1034 dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000); /* guarded on */ in ppc405ex_pciex_init_port_hw()
1043 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0); in ppc405ex_pciex_init_utl()
1119 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH, in ppc4xx_pciex_port_init_mapping()
1121 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL, in ppc4xx_pciex_port_init_mapping()
1125 dcr_write(port->dcrs, DCRO_PEGPL_CFGMSK, 0xe0000001); in ppc4xx_pciex_port_init_mapping()
1128 dcr_write(port->dcrs, DCRO_PEGPL_REGBAH, in ppc4xx_pciex_port_init_mapping()
1130 dcr_write(port->dcrs, DCRO_PEGPL_REGBAL, in ppc4xx_pciex_port_init_mapping()
1134 dcr_write(port->dcrs, DCRO_PEGPL_REGMSK, 0x00007001); in ppc4xx_pciex_port_init_mapping()
1137 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 0); in ppc4xx_pciex_port_init_mapping()
1138 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, 0); in ppc4xx_pciex_port_init_mapping()
1139 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0); in ppc4xx_pciex_port_init_mapping()
1140 dcr_write(port->dcrs, DCRO_PEGPL_MSGMSK, 0); in ppc4xx_pciex_port_init_mapping()
1317 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA); in ppc4xx_pciex_read_config()
1347 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg); in ppc4xx_pciex_read_config()
1372 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA); in ppc4xx_pciex_write_config()
1391 dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg); in ppc4xx_pciex_write_config()
1434 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah); in ppc4xx_setup_one_pciex_POM()
1435 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal); in ppc4xx_setup_one_pciex_POM()
1436 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff); in ppc4xx_setup_one_pciex_POM()
1438 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3); in ppc4xx_setup_one_pciex_POM()
1443 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah); in ppc4xx_setup_one_pciex_POM()
1444 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal); in ppc4xx_setup_one_pciex_POM()
1445 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff); in ppc4xx_setup_one_pciex_POM()
1447 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3); in ppc4xx_setup_one_pciex_POM()
1452 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah); in ppc4xx_setup_one_pciex_POM()
1453 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal); in ppc4xx_setup_one_pciex_POM()
1454 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff); in ppc4xx_setup_one_pciex_POM()
1456 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, sa | 3); in ppc4xx_setup_one_pciex_POM()