| /arch/blackfin/kernel/ |
| D | fixed_code.S | 35 R0 = [P0]; define
51 R0 = [P0]; define
69 R0 = R1 + R0; define
84 R0 = R1 - R0; define
99 R0 = R1 | R0; define
114 R0 = R1 & R0; define
129 R0 = R1 ^ R0; define
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| /arch/blackfin/lib/ |
| D | umulsi3_highpart.S | 13 R0 = R1.L * R0.L, R1 = R1.H * R0.L (FU); define
17 R0 = R0 + R3; define
18 R0 = R0 + R1; define
22 R0 = R1 + R2; define
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| D | divsi3.S | 60 R0 = ABS R0; define
95 R0 = R0.L (Z); define
138 R0 = 0 ; /* Clear msw partial remainder */ define
145 R0 = R0 << 1 || R5 = [SP]; define
146 R0 = R0 | R7; /* and add carry */ define
150 R0 = R0 + R5; /* do add or subtract, as indicated by AQ */ define
181 R0 = R2; /* Return an identity value */ define
207 R0 = LSHIFT R0 by R1.L; define
216 R0 = 0; define
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| D | memcmp.S | 65 R0 = [P0++]; define
84 R0 = B[P0++](Z); /* *s1 */ define
91 R0 = R0 - R1; define
111 R0 = 0; define
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| D | outs.S | 74 R0 = B[P1++]; define
75 R0 = R0 << 8; define
76 R0 = R0 + R1; define
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| D | umodsi3.S | 61 R0 = R7 - R0; /* Dividend - (quotient * divisor) */ define
66 R0 = 0; define
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| D | modsi3.S | 71 R0 = R7 - R0; /* Dividend - (quotient * divisor) */ define
77 R0 = 0; define
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| D | muldi3.S | 57 R0 = A1.w; define
63 R0 = PACK (R0.l, R3.l); define
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| D | smulsi3_highpart.S | 14 R0 = R0.H * R1.H, R1 = R0.H * R1.L (IS,M); define
29 R0 = R0 + R1; define
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| D | memset.S | 95 R0 = 4; define
96 R0 = R0 - R2; define
98 R0 = P0; /* Recover return address */ define
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| D | udivsi3.S | 86 R0 = R0.L (Z); define
203 R0 = R2; /* Store quotient */ define
220 R0 = R2; define
243 R0 = LSHIFT R0 by R1.L; define
288 R0 = R3; /* Copy Q into result reg */ define
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| D | memchr.S | 66 R0 = P0; define
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| /arch/blackfin/mach-common/ |
| D | head.S | 40 R0 = SYSCFG_SNEN; define
42 R0 = SYSCFG_SNEN | SYSCFG_CCEN; define
45 R0 = 0; define
97 R0 = R1; define
103 R0 = ~ENICPLB; define
104 R0 = R0 & R1; define
112 R0 = ~ENDCPLB; define
113 R0 = R0 & R1; define
120 R0 = RETX; define
242 R0 = R7; define
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| D | dpmc_modes.S | 20 R0 = 0xFFFF (Z); define
36 R0 = IWR_ENABLE(0); define
61 R0 = IWR_DISABLE_ALL; define
68 R0 = 0xFFFF (Z); define
91 R0 = IWR_ENABLE(0); define
99 R0 = 0xFFFF (Z); define
134 R0 = P3; define
141 R0 = W[P0](z); define
149 R0 = IWR_ENABLE(0); define
291 R0 = W[P0] (Z); define
[all …]
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| D | cache.S | 31 R0 = R0 & R2; define
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| D | interrupt.S | 172 R0 = R0 | R1; define
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| D | lock.S | 176 R0 = R0 << 3; define
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| D | entry.S | 120 R0 = SEQSTAT; define
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| /arch/blackfin/mach-bf561/ |
| D | secondary.S | 38 R0 = 0x36; define
40 R0 = 0; define
85 R0 = ~ENICPLB; define
86 R0 = R0 & R1; define
103 R0 = ~ENDCPLB; define
104 R0 = R0 & R1; define
120 R0 = RETX; define
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 41 #define R0 %rax macro
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| /arch/m32r/kernel/ |
| D | entry.S | 87 #define R0(reg) @(0x10,reg) macro
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| /arch/sh/math-emu/ |
| D | math.c | 50 #define R0 (regs->regs[0]) macro
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| /arch/cris/arch-v10/kernel/ |
| D | kgdb.c | 382 R0, R1, R2, R3, enumerator
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| /arch/cris/arch-v32/kernel/ |
| D | kgdb.c | 311 R0, R1, R2, R3, enumerator
|