Searched refs:CLASS2_ENABLE_MAILBOX_INTR (Results 1 – 4 of 4) sorted by relevance
80 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in spu_hw_mbox_stat_poll()111 spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in spu_hw_ibox_read()
112 CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_mbox_stat_poll()146 ctx->csa.priv1.int_mask_class2_RW |= CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_ibox_read()
1698 spu_int_stat_clear(spu, 2, CLASS2_ENABLE_MAILBOX_INTR); in check_ppuint_mb_stat()
529 #define CLASS2_ENABLE_MAILBOX_INTR 0x1L macro