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Searched refs:DC (Results 1 – 10 of 10) sorted by relevance

/arch/avr32/kernel/
Docd.c41 dc = ocd_read(DC); in ocd_enable()
43 ocd_write(DC, dc); in ocd_enable()
76 dc = ocd_read(DC); in ocd_disable()
78 ocd_write(DC, dc); in ocd_disable()
95 *val = ocd_read(DC); in ocd_DC_get()
100 ocd_write(DC, val); in ocd_DC_set()
Dkprobes.c75 dc = ocd_read(DC); in prepare_singlestep()
77 ocd_write(DC, dc); in prepare_singlestep()
96 dc = ocd_read(DC); in resume_execution()
98 ocd_write(DC, dc); in resume_execution()
Dptrace.c366 ctrl = ocd_read(DC); in do_debug()
368 ocd_write(DC, ctrl); in do_debug()
382 ctrl = ocd_read(DC); in do_debug()
384 ocd_write(DC, ctrl); in do_debug()
Dprocess.c65 ocd_write(DC, (1 << OCD_DC_DBE_BIT)); in machine_restart()
66 ocd_write(DC, (1 << OCD_DC_RES_BIT)); in machine_restart()
/arch/arm/boot/compressed/
Dhead-xscale.S31 bic r0, r0, #0x05 @ clear DC, MMU
/arch/s390/math-emu/
Dmath.c1176 FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DC); FP_DECL_D(DR); in emu_madbr()
1183 FP_UNPACK_DP(DC, &current->thread.fp_regs.fprs[rz].d); in emu_madbr()
1185 FP_ADD_D(DR, DR, DC); in emu_madbr()
1192 FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DC); FP_DECL_D(DR); in emu_madb()
1199 FP_UNPACK_DP(DC, &current->thread.fp_regs.fprs[rz].d); in emu_madb()
1201 FP_ADD_D(DR, DR, DC); in emu_madb()
1240 FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DC); FP_DECL_D(DR); in emu_msdbr()
1247 FP_UNPACK_DP(DC, &current->thread.fp_regs.fprs[rz].d); in emu_msdbr()
1249 FP_SUB_D(DR, DR, DC); in emu_msdbr()
1256 FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DC); FP_DECL_D(DR); in emu_msdb()
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/arch/blackfin/mach-bf537/include/mach/
DdefBF537.h207 #define DC 0x00080000 /* Deferral Check … macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF516.h210 #define DC 0x00080000 /* Deferral Check */ macro
DdefBF518.h210 #define DC 0x00080000 /* Deferral Check */ macro
/arch/blackfin/mach-bf527/include/mach/
DdefBF527.h210 #define DC 0x00080000 /* Deferral Check */ macro