Searched refs:EMAC_MMC_TIRQS (Results 1 – 8 of 8) sorted by relevance
112 #define bfin_read_EMAC_MMC_TIRQS() bfin_read32(EMAC_MMC_TIRQS)113 #define bfin_write_EMAC_MMC_TIRQS(val) bfin_write32(EMAC_MMC_TIRQS, val)
113 #define bfin_read_EMAC_MMC_TIRQS() bfin_read32(EMAC_MMC_TIRQS)114 #define bfin_write_EMAC_MMC_TIRQS(val) bfin_write32(EMAC_MMC_TIRQS, val)
77 #define EMAC_MMC_TIRQS 0xFFC0308C /* MMC TX Interrupt Status Register … macro
105 #define bfin_read_EMAC_MMC_TIRQS() bfin_read32(EMAC_MMC_TIRQS)106 #define bfin_write_EMAC_MMC_TIRQS(val) bfin_write32(EMAC_MMC_TIRQS,val)
78 #define EMAC_MMC_TIRQS 0xFFC0308C /* MMC TX Interrupt Status Register … macro