Searched refs:LO (Results 1 – 8 of 8) sorted by relevance
50 preg.L = LO(TBUFCTL); \56 preg.L = LO(TBUFCTL); \62 preg.L = LO(TBUFCTL); \70 preg.L = LO(TBUFCTL); \
63 #define LO(con32) ((con32) & 0xFFFF) macro
13 #define LO(reg) (reg / 4) macro43 mask = vrc_pciregs[LO(NILE4_PCIINIT1)]; in nile4_pcibios_config_access()44 vrc_pciregs[LO(NILE4_PCIINIT1)] = 0x0000001a | (busnum ? 0x200 : 0); in nile4_pcibios_config_access()48 vrc_pciregs[LO(NILE4_PCIERR)] = 0; in nile4_pcibios_config_access()70 vrc_pciregs[LO(NILE4_PCIINIT1)] = mask; in nile4_pcibios_config_access()
44 P1.L = LO(IMEM_CONTROL);46 P5.L = LO(ICPLB_ADDR0);48 P4.L = LO(ICPLB_DATA0);168 P1.L = LO(IMEM_CONTROL);195 P0.L = LO(IMEM_CONTROL);
125 p5.l = LO(CHIPID);156 p5.l = LO(CHIPID);170 R1.L = LO(VEC_HWERR);182 p0.l = LO(EBIU_ERRMST);
89 p0.L = LO(DTEST_COMMAND);100 p0.l = LO(IMEM_CONTROL);109 p0.l = LO(DMEM_CONTROL);
371 P4.L = LO(IMEM_CONTROL);381 P4.L = LO(DMEM_CONTROL);479 p5.l = LO(CHIPID);819 r2 = LO(~0x37) (Z);1086 p4.l = LO(CHIPID);1094 P4.L = LO(IMEM_CONTROL);1105 P4.L = LO(DMEM_CONTROL);
82 p0.l = LO(IMEM_CONTROL);100 p0.l = LO(DMEM_CONTROL);